Linux ARM-MSM sub-architecture
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From: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
To: Stephen Boyd <swboyd@chromium.org>, <agross@kernel.org>,
	<alsa-devel@alsa-project.org>, <bgoswami@quicinc.com>,
	<bjorn.andersson@linaro.org>, <broonie@kernel.org>,
	<devicetree@vger.kernel.org>, <judyhsiao@chromium.org>,
	<lgirdwood@gmail.com>, <linux-arm-msm@vger.kernel.org>,
	<linux-kernel@vger.kernel.org>, <perex@perex.cz>,
	<quic_plai@quicinc.com>, <quic_rohkumar@quicinc.com>,
	<robh+dt@kernel.org>, <srinivas.kandagatla@linaro.org>,
	<tiwai@suse.com>, <vkoul@kernel.org>
Subject: Re: [PATCH v3 2/2] ASoC: qcom: soundwire: Add software clock gating requirement check
Date: Thu, 9 Jun 2022 10:44:33 +0530	[thread overview]
Message-ID: <39a607ee-180e-b261-46f9-349c70294f4e@quicinc.com> (raw)
In-Reply-To: <CAE-0n53EY1eKqnVLhU__e7t63BbVoKz++6aijOpEw0k5Cxa8-w@mail.gmail.com>


On 6/9/2022 12:59 AM, Stephen Boyd wrote:
Thanks for Your time Stephen!!!
> Quoting Srinivasa Rao Mandadapu (2022-06-08 07:02:09)
>> Validate software clock gating required or not and do software
>> clock gating on hclk if soundwire is operational and keep it
>> running by adding flag in private dat structure.
>> This is to avoid conflict between older architectures,
>> where software clock gating is not required and on latest
>> architectues, where software clock gating is mandatory.
> This talks about software clock gating but the code is getting a reset
> and asserting it. Is that because the power on reset value of the clock
> gating is to have hardware clock gating disabled, but some earlier code
> is enabling hardware clock gating?

Yes Stephen. By Default this resets to HW controlled. As such there is 
no specific code

for enabling hardware clock gating, as these CGCR registers default 
setting is HW control.

>
>> Signed-off-by: Srinivasa Rao Mandadapu <quic_srivasam@quicinc.com>
>> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
>> ---
>>   drivers/soundwire/qcom.c | 27 ++++++++++++++++++++-------
>>   1 file changed, 20 insertions(+), 7 deletions(-)
>>
>> diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c
>> index 38c3bf5..ebd7479 100644
>> --- a/drivers/soundwire/qcom.c
>> +++ b/drivers/soundwire/qcom.c
>> @@ -659,7 +665,8 @@ static int qcom_swrm_init(struct qcom_swrm_ctrl *ctrl)
>>          val = FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_ROW_CTRL_BMSK, ctrl->rows_index);
>>          val |= FIELD_PREP(SWRM_MCP_FRAME_CTRL_BANK_COL_CTRL_BMSK, ctrl->cols_index);
>>
>> -       reset_control_reset(ctrl->audio_cgcr);
>> +       if (ctrl->audio_cgcr)
>> +               reset_control_reset(ctrl->audio_cgcr);
>>
>>          ctrl->reg_write(ctrl, SWRM_MCP_FRAME_CTRL_BANK_ADDR(0), val);
>>
>> @@ -1494,7 +1506,8 @@ static int __maybe_unused swrm_runtime_resume(struct device *dev)
>>                  qcom_swrm_get_device_status(ctrl);
>>                  sdw_handle_slave_status(&ctrl->bus, ctrl->status);
>>          } else {
>> -               reset_control_reset(ctrl->audio_cgcr);
>> +               if (ctrl->audio_cgcr)
>> +                       reset_control_reset(ctrl->audio_cgcr);
> reset_control_reset() is a no-op if the pointer is NULL so the if
> condition is not necessary in the above two statements.
Okay. revert this NULL check here.

      reply	other threads:[~2022-06-09  5:14 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-08 14:02 [PATCH v3 0/2] Add software clock gating requirement check Srinivasa Rao Mandadapu
2022-06-08 14:02 ` [PATCH v3 1/2] soundwire: qcom: Add flag for software clock gating check Srinivasa Rao Mandadapu
2022-06-08 15:39   ` Pierre-Louis Bossart
2022-06-09  4:34     ` Srinivasa Rao Mandadapu
2022-06-08 14:02 ` [PATCH v3 2/2] ASoC: qcom: soundwire: Add software clock gating requirement check Srinivasa Rao Mandadapu
2022-06-08 19:29   ` Stephen Boyd
2022-06-09  5:14     ` Srinivasa Rao Mandadapu [this message]

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