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* [PATCH] bus: mhi: Ensure correct ring update ordering with memory barrier
@ 2020-11-20 10:22 Loic Poulain
  2020-11-25 17:46 ` Jeffrey Hugo
  0 siblings, 1 reply; 2+ messages in thread
From: Loic Poulain @ 2020-11-20 10:22 UTC (permalink / raw)
  To: manivannan.sadhasivam, hemantk; +Cc: linux-arm-msm, jhugo, Loic Poulain

The ring element data, though being part of coherent memory, still need
to be performed before updating the ring context to point to this new
element. That can be guaranteed with a memory barrier (dma_wmb).

Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
---
 drivers/bus/mhi/core/main.c | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
index 94be0f8..188501c0 100644
--- a/drivers/bus/mhi/core/main.c
+++ b/drivers/bus/mhi/core/main.c
@@ -111,7 +111,13 @@ void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,
 	dma_addr_t db;
 
 	db = ring->iommu_base + (ring->wp - ring->base);
+
+	/* Writes to the new ring element must be visible to the hardware
+	 * before letting h/w know there is new element to fetch.
+	 */
+	dma_wmb();
 	*ring->ctxt_wp = db;
+
 	mhi_chan->db_cfg.process_db(mhi_cntrl, &mhi_chan->db_cfg,
 				    ring->db_addr, db);
 }
-- 
2.7.4


^ permalink raw reply related	[flat|nested] 2+ messages in thread

* Re: [PATCH] bus: mhi: Ensure correct ring update ordering with memory barrier
  2020-11-20 10:22 [PATCH] bus: mhi: Ensure correct ring update ordering with memory barrier Loic Poulain
@ 2020-11-25 17:46 ` Jeffrey Hugo
  0 siblings, 0 replies; 2+ messages in thread
From: Jeffrey Hugo @ 2020-11-25 17:46 UTC (permalink / raw)
  To: Loic Poulain, manivannan.sadhasivam, hemantk; +Cc: linux-arm-msm

On 11/20/2020 3:22 AM, Loic Poulain wrote:
> The ring element data, though being part of coherent memory, still need
> to be performed before updating the ring context to point to this new
> element. That can be guaranteed with a memory barrier (dma_wmb).
> 
> Signed-off-by: Loic Poulain <loic.poulain@linaro.org>
> ---
>   drivers/bus/mhi/core/main.c | 6 ++++++
>   1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c
> index 94be0f8..188501c0 100644
> --- a/drivers/bus/mhi/core/main.c
> +++ b/drivers/bus/mhi/core/main.c
> @@ -111,7 +111,13 @@ void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,
>   	dma_addr_t db;
>   
>   	db = ring->iommu_base + (ring->wp - ring->base);
> +
> +	/* Writes to the new ring element must be visible to the hardware
> +	 * before letting h/w know there is new element to fetch.
> +	 */

This doesn't look like the correct style for multi-line comments.

> +	dma_wmb();
>   	*ring->ctxt_wp = db;
> +
>   	mhi_chan->db_cfg.process_db(mhi_cntrl, &mhi_chan->db_cfg,
>   				    ring->db_addr, db);
>   }
> 


-- 
Jeffrey Hugo
Qualcomm Technologies, Inc. is a member of the
Code Aurora Forum, a Linux Foundation Collaborative Project.

^ permalink raw reply	[flat|nested] 2+ messages in thread

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