Linux ARM-MSM sub-architecture
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From: "Slark Xiao" <slark_xiao@163.com>
To: "Jeffrey Hugo" <quic_jhugo@quicinc.com>,
	 "Sergey Ryazanov" <ryazanov.s.a@gmail.com>,
	 "netdev@vger.kernel.org" <netdev@vger.kernel.org>
Cc: manivannan.sadhasivam@linaro.org, loic.poulain@linaro.org,
	 quic_qianyu@quicinc.com, mhi@lists.linux.dev,
	 linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re:Re:Re: [PATCH v1 1/2] bus: mhi: host: Import link_id item
Date: Tue, 11 Jun 2024 09:45:20 +0800 (CST)	[thread overview]
Message-ID: <402e5117.1cb4.19004f89f4f.Coremail.slark_xiao@163.com> (raw)
In-Reply-To: <38a9c3af.1408.19004e530de.Coremail.slark_xiao@163.com>



At 2024-06-11 09:24:07, "Slark Xiao" <slark_xiao@163.com> wrote:
>
>+More maintainer to this first patch list.
>
>At 2024-06-07 23:01:00, "Jeffrey Hugo" <quic_jhugo@quicinc.com> wrote:
>>$Subject says this is patch 1 of 2, but I don't see a second patch nor a 
>>cover letter.
>>
Hi Jeffrey,
I added you in another patch just now. Please help take a view on that.
Thanks.

>>On 6/7/2024 4:01 AM, Slark Xiao wrote:
>>> For SDX72 MBIM mode, it starts data mux id from 112 instead of 0.
>>> This would lead to device can't ping outside successfully.
>>> Also MBIM side would report "bad packet session (112)".
>>> So we add a link id default value for SDX72.
>>> 
>>> Signed-off-by: Slark Xiao <slark_xiao@163.com>
>>> ---
>>>   drivers/bus/mhi/host/pci_generic.c | 3 +++
>>>   include/linux/mhi.h                | 1 +
>>>   2 files changed, 4 insertions(+)
>>> 
>>> diff --git a/drivers/bus/mhi/host/pci_generic.c b/drivers/bus/mhi/host/pci_generic.c
>>> index 0b483c7c76a1..1f9de2730766 100644
>>> --- a/drivers/bus/mhi/host/pci_generic.c
>>> +++ b/drivers/bus/mhi/host/pci_generic.c
>>> @@ -53,6 +53,7 @@ struct mhi_pci_dev_info {
>>>   	unsigned int dma_data_width;
>>>   	unsigned int mru_default;
>>>   	bool sideband_wake;
>>> +	unsigned int link_default;
>>>   };
>>>   
>>>   #define MHI_CHANNEL_CONFIG_UL(ch_num, ch_name, el_count, ev_ring) \
>>> @@ -469,6 +470,7 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx72_info = {
>>>   	.dma_data_width = 32,
>>>   	.mru_default = 32768,
>>>   	.sideband_wake = false,
>>> +	.link_default = 112,
>>>   };
>>>   
>>>   static const struct mhi_channel_config mhi_mv3x_channels[] = {
>>> @@ -1035,6 +1037,7 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
>>>   	mhi_cntrl->runtime_get = mhi_pci_runtime_get;
>>>   	mhi_cntrl->runtime_put = mhi_pci_runtime_put;
>>>   	mhi_cntrl->mru = info->mru_default;
>>> +	mhi_cntrl->link_id = info->link_default;
>>>   
>>>   	if (info->edl_trigger)
>>>   		mhi_cntrl->edl_trigger = mhi_pci_generic_edl_trigger;
>>> diff --git a/include/linux/mhi.h b/include/linux/mhi.h
>>> index b573f15762f8..4da10b99c96e 100644
>>> --- a/include/linux/mhi.h
>>> +++ b/include/linux/mhi.h
>>> @@ -445,6 +445,7 @@ struct mhi_controller {
>>>   	bool wake_set;
>>>   	unsigned long irq_flags;
>>>   	u32 mru;
>>> +	u32 link_id;
>>>   };
>>>   
>>>   /**
>>
>>None of this is actually used.  Dead code is generally not accepted.
>>
>>-Jeff

  reply	other threads:[~2024-06-11  1:45 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-07 10:01 [PATCH v1 1/2] bus: mhi: host: Import link_id item Slark Xiao
2024-06-07 15:01 ` Jeffrey Hugo
2024-06-11  1:24   ` Slark Xiao
2024-06-11  1:45     ` Slark Xiao [this message]
2024-06-08  6:29 ` kernel test robot
2024-06-12  4:33 ` Manivannan Sadhasivam

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