From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Konrad Dybcio <konrad.dybcio@linaro.org>,
linux-arm-msm@vger.kernel.org, andersson@kernel.org,
agross@kernel.org, krzysztof.kozlowski@linaro.org
Cc: marijn.suijten@somainline.org,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v4 1/8] clk: qcom: branch: Add helper functions for setting retain bits
Date: Tue, 31 Jan 2023 11:05:25 +0200 [thread overview]
Message-ID: <4148b98c-8cee-83c5-7212-06326f086f2a@linaro.org> (raw)
In-Reply-To: <20230130235926.2419776-2-konrad.dybcio@linaro.org>
On 31/01/2023 01:59, Konrad Dybcio wrote:
> Most Qualcomm branch clocks come with a pretty usual set of bits that
> can enable memory retention by means of not turning off parts of the
> memory logic. Add them to the common header file and introduce helper
> functions for setting them instead of using magic writes.
>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
> ---
> drivers/clk/qcom/clk-branch.h | 23 +++++++++++++++++++++++
> 1 file changed, 23 insertions(+)
>
> diff --git a/drivers/clk/qcom/clk-branch.h b/drivers/clk/qcom/clk-branch.h
> index 17a58119165e..d8fc7b93ef6d 100644
> --- a/drivers/clk/qcom/clk-branch.h
> +++ b/drivers/clk/qcom/clk-branch.h
> @@ -37,6 +37,29 @@ struct clk_branch {
> struct clk_regmap clkr;
> };
>
> +/* Branch clock common bits for HLOS-owned clocks */
> +#define CBCR_FORCE_MEM_CORE_ON BIT(14)
> +#define CBCR_FORCE_MEM_PERIPH_ON BIT(13)
> +#define CBCR_FORCE_MEM_PERIPH_OFF BIT(12)
It might be a slight bit of pain, but I'd suggest moving these
definitions next to BRANCH_CLK_OFF since they are using the same reg.
(And while you are at it also reworking BRANCH_NOC_FSM_STATUS into a
proper mask and FIELD_* macros.)
> +
> +static inline void qcom_branch_set_force_mem_core(struct regmap *regmap, u32 reg, bool on)
These functions can be more descriptive if they receive struct
clk_branch as an argument instead of just a register.
> +{
> + regmap_update_bits(regmap, reg, CBCR_FORCE_MEM_CORE_ON,
> + on ? CBCR_FORCE_MEM_CORE_ON : 0);
> +}
> +
> +static inline void qcom_branch_set_force_periph_on(struct regmap *regmap, u32 reg, bool on)
> +{
> + regmap_update_bits(regmap, reg, CBCR_FORCE_MEM_PERIPH_ON,
> + on ? CBCR_FORCE_MEM_PERIPH_ON : 0);
> +}
> +
> +static inline void qcom_branch_set_force_periph_off(struct regmap *regmap, u32 reg, bool on)
> +{
> + regmap_update_bits(regmap, reg, CBCR_FORCE_MEM_PERIPH_OFF,
> + on ? CBCR_FORCE_MEM_PERIPH_OFF : 0);
> +}
> +
> extern const struct clk_ops clk_branch_ops;
> extern const struct clk_ops clk_branch2_ops;
> extern const struct clk_ops clk_branch_simple_ops;
--
With best wishes
Dmitry
next prev parent reply other threads:[~2023-01-31 9:09 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-01-30 23:59 [PATCH v4 0/8] SM6(11|12|37)5 GPUCC Konrad Dybcio
2023-01-30 23:59 ` [PATCH v4 1/8] clk: qcom: branch: Add helper functions for setting retain bits Konrad Dybcio
2023-01-31 9:05 ` Dmitry Baryshkov [this message]
2023-01-30 23:59 ` [PATCH v4 2/8] clk: qcom: branch: Add SLEEP/WAKE fields definitions Konrad Dybcio
2023-01-31 9:07 ` Dmitry Baryshkov
2023-01-30 23:59 ` [PATCH v4 3/8] dt-bindings: clock: Add Qcom SM6125 GPUCC Konrad Dybcio
2023-01-30 23:59 ` [PATCH v4 4/8] clk: qcom: Add GPU clock controller driver for SM6125 Konrad Dybcio
2023-01-31 9:00 ` Dmitry Baryshkov
2023-01-31 12:37 ` Konrad Dybcio
2023-01-30 23:59 ` [PATCH v4 5/8] dt-bindings: clock: Add Qcom SM6375 GPUCC Konrad Dybcio
2023-01-30 23:59 ` [PATCH v4 6/8] clk: qcom: Add GPU clock controller driver for SM6375 Konrad Dybcio
2023-01-31 9:08 ` Dmitry Baryshkov
2023-01-30 23:59 ` [PATCH v4 7/8] dt-bindings: clock: Add Qcom SM6115 GPUCC Konrad Dybcio
2023-01-31 19:15 ` Krzysztof Kozlowski
2023-01-30 23:59 ` [PATCH v4 8/8] clk: qcom: Add GPU clock controller driver for SM6115 Konrad Dybcio
2023-01-31 9:25 ` Dmitry Baryshkov
2023-01-31 12:38 ` Konrad Dybcio
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