* [PATCH net-next 0/6] net: final GSI register updates
@ 2023-02-15 19:53 Alex Elder
2023-02-15 19:53 ` [PATCH net-next 1/6] net: ipa: fix an incorrect assignment Alex Elder
` (6 more replies)
0 siblings, 7 replies; 14+ messages in thread
From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw)
To: davem, edumazet, kuba, pabeni
Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa,
quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev,
linux-arm-msm, linux-kernel
I believe this is the last set of changes required to allow IPA v5.0
to be supported. There is a little cleanup work remaining, but that
can happen in the next Linux release cycle. Otherwise we just need
config data and register definitions for IPA v5.0 (and DTS updates).
These are ready but won't be posted without further testing.
The first patch in this series fixes a minor bug in a patch just
posted, which I found too late. The second eliminates the GSI
memory "adjustment"; this was done previously to avoid/delay the
need to implement a more general way to define GSI register offsets.
Note that this patch causes "checkpatch" warnings due to indentation
that aligns with an open parenthesis.
The third patch makes use of the newly-defined register offsets, to
eliminate the need for a function that hid a few details. The next
modifies a different helper function to work properly for IPA v5.0+.
The fifth patch changes the way the event ring size is specified
based on how it's now done for IPA v5.0+. And the last defines a
new register required for IPA v5.0+.
-Alex
Alex Elder (6):
net: ipa: fix an incorrect assignment
net: ipa: kill gsi->virt_raw
net: ipa: kill ev_ch_e_cntxt_1_length_encode()
net: ipa: avoid setting an undefined field
net: ipa: support different event ring encoding
net: ipa: add HW_PARAM_4 GSI register
drivers/net/ipa/gsi.c | 36 ++++-----
drivers/net/ipa/gsi.h | 3 +-
drivers/net/ipa/gsi_reg.c | 35 ++------
drivers/net/ipa/gsi_reg.h | 23 ++++--
drivers/net/ipa/reg/gsi_reg-v3.1.c | 22 ++---
drivers/net/ipa/reg/gsi_reg-v3.5.1.c | 22 ++---
drivers/net/ipa/reg/gsi_reg-v4.0.c | 22 ++---
drivers/net/ipa/reg/gsi_reg-v4.11.c | 116 ++++++++++++++-------------
drivers/net/ipa/reg/gsi_reg-v4.5.c | 64 ++++++++-------
drivers/net/ipa/reg/gsi_reg-v4.9.c | 74 ++++++++---------
10 files changed, 205 insertions(+), 212 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 14+ messages in thread* [PATCH net-next 1/6] net: ipa: fix an incorrect assignment 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder @ 2023-02-15 19:53 ` Alex Elder 2023-02-15 19:53 ` [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw Alex Elder ` (5 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw) To: davem, edumazet, kuba, pabeni Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel I spotted an error in a patch posted this week, unfortunately just after it got accepted. The effect of the bug is that time-based interrupt moderation is disabled. This is not technically a bug, but it is not what is intended. The problem is that a |= assignment got implemented as a simple assignment, so the previously assigned value was ignored. Fixes: edc6158b18af ("net: ipa: define fields for event-ring related registers") Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/gsi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index f44d2d843de12..05ea2502201da 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -762,7 +762,7 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) /* Enable interrupt moderation by setting the moderation delay */ reg = gsi_reg(gsi, EV_CH_E_CNTXT_8); val = reg_encode(reg, EV_MODT, GSI_EVT_RING_INT_MODT); - val = reg_encode(reg, EV_MODC, 1); /* comes from channel */ + val |= reg_encode(reg, EV_MODC, 1); /* comes from channel */ /* EV_MOD_CNT is 0 (no counter-based interrupt coalescing) */ iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id)); -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder 2023-02-15 19:53 ` [PATCH net-next 1/6] net: ipa: fix an incorrect assignment Alex Elder @ 2023-02-15 19:53 ` Alex Elder 2023-02-16 17:51 ` Alexander Lobakin 2023-02-15 19:53 ` [PATCH net-next 3/6] net: ipa: kill ev_ch_e_cntxt_1_length_encode() Alex Elder ` (4 subsequent siblings) 6 siblings, 1 reply; 14+ messages in thread From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw) To: davem, edumazet, kuba, pabeni Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel Starting at IPA v4.5, almost all GSI registers had their offsets changed by a fixed amount (shifted downward by 0xd000). Rather than defining offsets for all those registers dependent on version, an adjustment was applied for most register accesses. This was implemented in commit cdeee49f3ef7f ("net: ipa: adjust GSI register addresses"). It was later modified to be a bit more obvious about the adjusment, in commit 571b1e7e58ad3 ("net: ipa: use a separate pointer for adjusted GSI memory"). We now are able to define every GSI register with its own offset, so there's no need to implement this special adjustment. So get rid of the "virt_raw" pointer, and just maintain "virt" as the (non-adjusted) base address of I/O mapped GSI register memory. Redefine the offsets of all GSI registers (other than the INTER_EE ones, which were not subject to the adjustment) for IPA v4.5+, subtracting 0xd000 from their defined offsets instead. Move the ERROR_LOG and ERROR_LOG_CLR definitions further down in the register definition files so all registers are defined in order of their offset. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/gsi.c | 5 +- drivers/net/ipa/gsi.h | 3 +- drivers/net/ipa/gsi_reg.c | 35 ++------- drivers/net/ipa/gsi_reg.h | 3 +- drivers/net/ipa/reg/gsi_reg-v3.1.c | 14 ++-- drivers/net/ipa/reg/gsi_reg-v3.5.1.c | 14 ++-- drivers/net/ipa/reg/gsi_reg-v4.0.c | 14 ++-- drivers/net/ipa/reg/gsi_reg-v4.11.c | 110 +++++++++++++-------------- drivers/net/ipa/reg/gsi_reg-v4.5.c | 58 +++++++------- drivers/net/ipa/reg/gsi_reg-v4.9.c | 66 ++++++++-------- 10 files changed, 141 insertions(+), 181 deletions(-) diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 05ea2502201da..2ef5509e3c836 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -1999,12 +1999,11 @@ static int gsi_irq_setup(struct gsi *gsi) /* The inter-EE interrupts are not supported for IPA v3.0-v3.1 */ if (gsi->version > IPA_VERSION_3_1) { - /* These registers are in the non-adjusted address range */ reg = gsi_reg(gsi, INTER_EE_SRC_CH_IRQ_MSK); - iowrite32(0, gsi->virt_raw + reg_offset(reg)); + iowrite32(0, gsi->virt + reg_offset(reg)); reg = gsi_reg(gsi, INTER_EE_SRC_EV_CH_IRQ_MSK); - iowrite32(0, gsi->virt_raw + reg_offset(reg)); + iowrite32(0, gsi->virt + reg_offset(reg)); } reg = gsi_reg(gsi, CNTXT_GSI_IRQ_EN); diff --git a/drivers/net/ipa/gsi.h b/drivers/net/ipa/gsi.h index bc5ff617341a7..50bc80cb167c3 100644 --- a/drivers/net/ipa/gsi.h +++ b/drivers/net/ipa/gsi.h @@ -140,8 +140,7 @@ struct gsi_evt_ring { struct gsi { struct device *dev; /* Same as IPA device */ enum ipa_version version; - void __iomem *virt_raw; /* I/O mapped address range */ - void __iomem *virt; /* Adjusted for most registers */ + void __iomem *virt; /* I/O mapped registers */ const struct regs *regs; u32 irq; diff --git a/drivers/net/ipa/gsi_reg.c b/drivers/net/ipa/gsi_reg.c index 0bb70a7ef4e65..1412b67304c8e 100644 --- a/drivers/net/ipa/gsi_reg.c +++ b/drivers/net/ipa/gsi_reg.c @@ -9,20 +9,6 @@ #include "reg.h" #include "gsi_reg.h" -/* GSI EE registers as a group are shifted downward by a fixed constant amount - * for IPA versions 4.5 and beyond. This applies to all GSI registers we use - * *except* the ones that disable inter-EE interrupts for channels and event - * channels. - * - * The "raw" (not adjusted) GSI register range is mapped, and a pointer to - * the mapped range is held in gsi->virt_raw. The inter-EE interrupt - * registers are accessed using that pointer. - * - * Most registers are accessed using gsi->virt, which is a copy of the "raw" - * pointer, adjusted downward by the fixed amount. - */ -#define GSI_EE_REG_ADJUST 0x0000d000 /* IPA v4.5+ */ - /* Is this register ID valid for the current GSI version? */ static bool gsi_reg_id_valid(struct gsi *gsi, enum gsi_reg_id reg_id) { @@ -121,13 +107,12 @@ static const struct regs *gsi_regs(struct gsi *gsi) } } -/* Sets gsi->virt_raw and gsi->virt, and I/O maps the "gsi" memory range */ +/* Sets gsi->virt and I/O maps the "gsi" memory range for registers */ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) { struct device *dev = &pdev->dev; struct resource *res; resource_size_t size; - u32 adjust; /* Get GSI memory range and map it */ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gsi"); @@ -142,27 +127,17 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) return -EINVAL; } - /* Make sure we can make our pointer adjustment if necessary */ - adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST; - if (res->start < adjust) { - dev_err(dev, "DT memory resource \"gsi\" too low (< %u)\n", - adjust); - return -EINVAL; - } - gsi->regs = gsi_regs(gsi); if (!gsi->regs) { dev_err(dev, "unsupported IPA version %u (?)\n", gsi->version); return -EINVAL; } - gsi->virt_raw = ioremap(res->start, size); - if (!gsi->virt_raw) { + gsi->virt = ioremap(res->start, size); + if (!gsi->virt) { dev_err(dev, "unable to remap \"gsi\" memory\n"); return -ENOMEM; } - /* Most registers are accessed using an adjusted register range */ - gsi->virt = gsi->virt_raw - adjust; return 0; } @@ -170,7 +145,7 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) /* Inverse of gsi_reg_init() */ void gsi_reg_exit(struct gsi *gsi) { + iounmap(gsi->virt); gsi->virt = NULL; - iounmap(gsi->virt_raw); - gsi->virt_raw = NULL; + gsi->regs = NULL; } diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index 5eda4def7ac40..e85765002aa41 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -351,8 +351,7 @@ const struct reg *gsi_reg(struct gsi *gsi, enum gsi_reg_id reg_id); * @pdev: GSI (IPA) platform device * * Initialize GSI registers, including looking up and I/O mapping - * the "gsi" memory space. This function sets gsi->virt_raw and - * gsi->virt. + * the "gsi" memory space. */ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev); diff --git a/drivers/net/ipa/reg/gsi_reg-v3.1.c b/drivers/net/ipa/reg/gsi_reg-v3.1.c index 651c8a7ed6116..8451d3f8e421e 100644 --- a/drivers/net/ipa/reg/gsi_reg-v3.1.c +++ b/drivers/net/ipa/reg/gsi_reg-v3.1.c @@ -8,16 +8,12 @@ #include "../reg.h" #include "../gsi_reg.h" -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ - REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 0x0000c020 + 0x1000 * GSI_EE_AP); REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 0x0000c024 + 0x1000 * GSI_EE_AP); -/* All other register offsets are relative to gsi->virt */ - static const u32 reg_ch_c_cntxt_0_fmask[] = { [CHTYPE_PROTOCOL] = GENMASK(2, 0), [CHTYPE_DIR] = BIT(3), @@ -66,10 +62,6 @@ static const u32 reg_error_log_fmask[] = { [ERR_EE] = GENMASK(31, 28), }; -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); - -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); - REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); @@ -152,6 +144,7 @@ REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); static const u32 reg_ch_cmd_fmask[] = { [CH_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [CH_OPCODE] = GENMASK(31, 24), }; @@ -159,6 +152,7 @@ REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); static const u32 reg_ev_ch_cmd_fmask[] = { [EV_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [EV_OPCODE] = GENMASK(31, 24), }; @@ -220,6 +214,10 @@ static const u32 reg_cntxt_intset_fmask[] = { REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); +REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); + +REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); + static const u32 reg_cntxt_scratch_0_fmask[] = { [INTER_EE_RESULT] = GENMASK(2, 0), /* Bits 3-4 reserved */ diff --git a/drivers/net/ipa/reg/gsi_reg-v3.5.1.c b/drivers/net/ipa/reg/gsi_reg-v3.5.1.c index 0b39f8374ec17..87e75cf425135 100644 --- a/drivers/net/ipa/reg/gsi_reg-v3.5.1.c +++ b/drivers/net/ipa/reg/gsi_reg-v3.5.1.c @@ -8,16 +8,12 @@ #include "../reg.h" #include "../gsi_reg.h" -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ - REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 0x0000c020 + 0x1000 * GSI_EE_AP); REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 0x0000c024 + 0x1000 * GSI_EE_AP); -/* All other register offsets are relative to gsi->virt */ - static const u32 reg_ch_c_cntxt_0_fmask[] = { [CHTYPE_PROTOCOL] = GENMASK(2, 0), [CHTYPE_DIR] = BIT(3), @@ -66,10 +62,6 @@ static const u32 reg_error_log_fmask[] = { [ERR_EE] = GENMASK(31, 28), }; -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); - -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); - REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); @@ -152,6 +144,7 @@ REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); static const u32 reg_ch_cmd_fmask[] = { [CH_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [CH_OPCODE] = GENMASK(31, 24), }; @@ -159,6 +152,7 @@ REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); static const u32 reg_ev_ch_cmd_fmask[] = { [EV_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [EV_OPCODE] = GENMASK(31, 24), }; @@ -231,6 +225,10 @@ static const u32 reg_cntxt_intset_fmask[] = { REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); +REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); + +REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); + static const u32 reg_cntxt_scratch_0_fmask[] = { [INTER_EE_RESULT] = GENMASK(2, 0), /* Bits 3-4 reserved */ diff --git a/drivers/net/ipa/reg/gsi_reg-v4.0.c b/drivers/net/ipa/reg/gsi_reg-v4.0.c index 5a979ef4caad3..048832e185091 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.0.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.0.c @@ -8,16 +8,12 @@ #include "../reg.h" #include "../gsi_reg.h" -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ - REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 0x0000c020 + 0x1000 * GSI_EE_AP); REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 0x0000c024 + 0x1000 * GSI_EE_AP); -/* All other register offsets are relative to gsi->virt */ - static const u32 reg_ch_c_cntxt_0_fmask[] = { [CHTYPE_PROTOCOL] = GENMASK(2, 0), [CHTYPE_DIR] = BIT(3), @@ -67,10 +63,6 @@ static const u32 reg_error_log_fmask[] = { [ERR_EE] = GENMASK(31, 28), }; -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); - -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); - REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); @@ -153,6 +145,7 @@ REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); static const u32 reg_ch_cmd_fmask[] = { [CH_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [CH_OPCODE] = GENMASK(31, 24), }; @@ -160,6 +153,7 @@ REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); static const u32 reg_ev_ch_cmd_fmask[] = { [EV_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [EV_OPCODE] = GENMASK(31, 24), }; @@ -236,6 +230,10 @@ static const u32 reg_cntxt_intset_fmask[] = { REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); +REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); + +REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); + static const u32 reg_cntxt_scratch_0_fmask[] = { [INTER_EE_RESULT] = GENMASK(2, 0), /* Bits 3-4 reserved */ diff --git a/drivers/net/ipa/reg/gsi_reg-v4.11.c b/drivers/net/ipa/reg/gsi_reg-v4.11.c index d975973306598..ced762ca16f91 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.11.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.11.c @@ -8,16 +8,12 @@ #include "../reg.h" #include "../gsi_reg.h" -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ - REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 0x0000c020 + 0x1000 * GSI_EE_AP); REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 0x0000c024 + 0x1000 * GSI_EE_AP); -/* All other register offsets are relative to gsi->virt */ - static const u32 reg_ch_c_cntxt_0_fmask[] = { [CHTYPE_PROTOCOL] = GENMASK(2, 0), [CHTYPE_DIR] = BIT(3), @@ -31,7 +27,7 @@ static const u32 reg_ch_c_cntxt_0_fmask[] = { }; REG_STRIDE_FIELDS(CH_C_CNTXT_0, ch_c_cntxt_0, - 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ch_c_cntxt_1_fmask[] = { [CH_R_LENGTH] = GENMASK(19, 0), @@ -39,11 +35,11 @@ static const u32 reg_ch_c_cntxt_1_fmask[] = { }; REG_STRIDE_FIELDS(CH_C_CNTXT_1, ch_c_cntxt_1, - 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80); +REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80); +REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ch_c_qos_fmask[] = { [WRR_WEIGHT] = GENMASK(3, 0), @@ -57,7 +53,7 @@ static const u32 reg_ch_c_qos_fmask[] = { /* Bits 25-31 reserved */ }; -REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80); +REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_error_log_fmask[] = { [ERR_ARG3] = GENMASK(3, 0), @@ -70,21 +66,17 @@ static const u32 reg_error_log_fmask[] = { [ERR_EE] = GENMASK(31, 28), }; -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); - -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); - REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, - 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f060 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_SCRATCH_1, ch_c_scratch_1, - 0x0001c064 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f064 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2, - 0x0001c068 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f068 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3, - 0x0001c06c + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f06c + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { [EV_CHTYPE] = GENMASK(3, 0), @@ -97,19 +89,19 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { }; REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, - 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010000 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, - 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010008 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3, - 0x0001d00c + 0x4000 * GSI_EE_AP, 0x80); + 0x0001000c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4, - 0x0001d010 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010010 + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ev_ch_e_cntxt_8_fmask[] = { [EV_MODT] = GENMASK(15, 0), @@ -118,55 +110,57 @@ static const u32 reg_ev_ch_e_cntxt_8_fmask[] = { }; REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8, - 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010020 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9, - 0x0001d024 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010024 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_10, ev_ch_e_cntxt_10, - 0x0001d028 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010028 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_11, ev_ch_e_cntxt_11, - 0x0001d02c + 0x4000 * GSI_EE_AP, 0x80); + 0x0001002c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_12, ev_ch_e_cntxt_12, - 0x0001d030 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010030 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_13, ev_ch_e_cntxt_13, - 0x0001d034 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010034 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_SCRATCH_0, ev_ch_e_scratch_0, - 0x0001d048 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010048 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1, - 0x0001d04c + 0x4000 * GSI_EE_AP, 0x80); + 0x0001004c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0, - 0x0001e000 + 0x4000 * GSI_EE_AP, 0x08); + 0x00011000 + 0x4000 * GSI_EE_AP, 0x08); REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0, - 0x0001e100 + 0x4000 * GSI_EE_AP, 0x08); + 0x00011100 + 0x4000 * GSI_EE_AP, 0x08); static const u32 reg_gsi_status_fmask[] = { [ENABLED] = BIT(0), /* Bits 1-31 reserved */ }; -REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); +REG_FIELDS(GSI_STATUS, gsi_status, 0x00012000 + 0x4000 * GSI_EE_AP); static const u32 reg_ch_cmd_fmask[] = { [CH_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [CH_OPCODE] = GENMASK(31, 24), }; -REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); +REG_FIELDS(CH_CMD, ch_cmd, 0x00012008 + 0x4000 * GSI_EE_AP); static const u32 reg_ev_ch_cmd_fmask[] = { [EV_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [EV_OPCODE] = GENMASK(31, 24), }; -REG_FIELDS(EV_CH_CMD, ev_ch_cmd, 0x0001f010 + 0x4000 * GSI_EE_AP); +REG_FIELDS(EV_CH_CMD, ev_ch_cmd, 0x00012010 + 0x4000 * GSI_EE_AP); static const u32 reg_generic_cmd_fmask[] = { [GENERIC_OPCODE] = GENMASK(4, 0), @@ -176,7 +170,7 @@ static const u32 reg_generic_cmd_fmask[] = { [GENERIC_PARAMS] = GENMASK(31, 24), }; -REG_FIELDS(GENERIC_CMD, generic_cmd, 0x0001f018 + 0x4000 * GSI_EE_AP); +REG_FIELDS(GENERIC_CMD, generic_cmd, 0x00012018 + 0x4000 * GSI_EE_AP); static const u32 reg_hw_param_2_fmask[] = { [IRAM_SIZE] = GENMASK(2, 0), @@ -192,54 +186,58 @@ static const u32 reg_hw_param_2_fmask[] = { [GSI_USE_INTER_EE] = BIT(31), }; -REG_FIELDS(HW_PARAM_2, hw_param_2, 0x0001f040 + 0x4000 * GSI_EE_AP); +REG_FIELDS(HW_PARAM_2, hw_param_2, 0x00012040 + 0x4000 * GSI_EE_AP); -REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x0001f080 + 0x4000 * GSI_EE_AP); +REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x00012080 + 0x4000 * GSI_EE_AP); -REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x0001f088 + 0x4000 * GSI_EE_AP); +REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x00012088 + 0x4000 * GSI_EE_AP); -REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x0001f090 + 0x4000 * GSI_EE_AP); +REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x00012090 + 0x4000 * GSI_EE_AP); -REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x0001f094 + 0x4000 * GSI_EE_AP); +REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x00012094 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_CH_IRQ_MSK, cntxt_src_ch_irq_msk, - 0x0001f098 + 0x4000 * GSI_EE_AP); + 0x00012098 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_EV_CH_IRQ_MSK, cntxt_src_ev_ch_irq_msk, - 0x0001f09c + 0x4000 * GSI_EE_AP); + 0x0001209c + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_CH_IRQ_CLR, cntxt_src_ch_irq_clr, - 0x0001f0a0 + 0x4000 * GSI_EE_AP); + 0x000120a0 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_EV_CH_IRQ_CLR, cntxt_src_ev_ch_irq_clr, - 0x0001f0a4 + 0x4000 * GSI_EE_AP); + 0x000120a4 + 0x4000 * GSI_EE_AP); -REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x0001f0b0 + 0x4000 * GSI_EE_AP); +REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x000120b0 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_IEOB_IRQ_MSK, cntxt_src_ieob_irq_msk, - 0x0001f0b8 + 0x4000 * GSI_EE_AP); + 0x000120b8 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_IEOB_IRQ_CLR, cntxt_src_ieob_irq_clr, - 0x0001f0c0 + 0x4000 * GSI_EE_AP); + 0x000120c0 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x0001f100 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x00012100 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x0001f108 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x00012108 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x0001f110 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x00012110 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x0001f118 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x00012118 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x0001f120 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x00012120 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x0001f128 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x00012128 + 0x4000 * GSI_EE_AP); static const u32 reg_cntxt_intset_fmask[] = { [INTYPE] = BIT(0) /* Bits 1-31 reserved */ }; -REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); +REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x00012180 + 0x4000 * GSI_EE_AP); + +REG_FIELDS(ERROR_LOG, error_log, 0x00012200 + 0x4000 * GSI_EE_AP); + +REG(ERROR_LOG_CLR, error_log_clr, 0x00012210 + 0x4000 * GSI_EE_AP); static const u32 reg_cntxt_scratch_0_fmask[] = { [INTER_EE_RESULT] = GENMASK(2, 0), @@ -248,7 +246,7 @@ static const u32 reg_cntxt_scratch_0_fmask[] = { /* Bits 8-31 reserved */ }; -REG_FIELDS(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x0001f400 + 0x4000 * GSI_EE_AP); +REG_FIELDS(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x00012400 + 0x4000 * GSI_EE_AP); static const struct reg *reg_array[] = { [INTER_EE_SRC_CH_IRQ_MSK] = ®_inter_ee_src_ch_irq_msk, diff --git a/drivers/net/ipa/reg/gsi_reg-v4.5.c b/drivers/net/ipa/reg/gsi_reg-v4.5.c index 13c66b29840ee..1ede8276824d7 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.5.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.5.c @@ -8,16 +8,12 @@ #include "../reg.h" #include "../gsi_reg.h" -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ - REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 0x0000c020 + 0x1000 * GSI_EE_AP); REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 0x0000c024 + 0x1000 * GSI_EE_AP); -/* All other register offsets are relative to gsi->virt */ - static const u32 reg_ch_c_cntxt_0_fmask[] = { [CHTYPE_PROTOCOL] = GENMASK(2, 0), [CHTYPE_DIR] = BIT(3), @@ -31,7 +27,7 @@ static const u32 reg_ch_c_cntxt_0_fmask[] = { }; REG_STRIDE_FIELDS(CH_C_CNTXT_0, ch_c_cntxt_0, - 0x0001c000 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f000 + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ch_c_cntxt_1_fmask[] = { [CH_R_LENGTH] = GENMASK(15, 0), @@ -39,11 +35,11 @@ static const u32 reg_ch_c_cntxt_1_fmask[] = { }; REG_STRIDE_FIELDS(CH_C_CNTXT_1, ch_c_cntxt_1, - 0x0001c004 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f004 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0001c008 + 0x4000 * GSI_EE_AP, 0x80); +REG_STRIDE(CH_C_CNTXT_2, ch_c_cntxt_2, 0x0000f008 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0001c00c + 0x4000 * GSI_EE_AP, 0x80); +REG_STRIDE(CH_C_CNTXT_3, ch_c_cntxt_3, 0x0000f00c + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ch_c_qos_fmask[] = { [WRR_WEIGHT] = GENMASK(3, 0), @@ -56,7 +52,7 @@ static const u32 reg_ch_c_qos_fmask[] = { /* Bits 24-31 reserved */ }; -REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0001c05c + 0x4000 * GSI_EE_AP, 0x80); +REG_STRIDE_FIELDS(CH_C_QOS, ch_c_qos, 0x0000f05c + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_error_log_fmask[] = { [ERR_ARG3] = GENMASK(3, 0), @@ -69,21 +65,17 @@ static const u32 reg_error_log_fmask[] = { [ERR_EE] = GENMASK(31, 28), }; -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); - -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); - REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, - 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f060 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_SCRATCH_1, ch_c_scratch_1, - 0x0001c064 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f064 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_SCRATCH_2, ch_c_scratch_2, - 0x0001c068 + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f068 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_SCRATCH_3, ch_c_scratch_3, - 0x0001c06c + 0x4000 * GSI_EE_AP, 0x80); + 0x0000f06c + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { [EV_CHTYPE] = GENMASK(3, 0), @@ -96,19 +88,19 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { }; REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, - 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010000 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, - 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010008 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_3, ev_ch_e_cntxt_3, - 0x0001d00c + 0x4000 * GSI_EE_AP, 0x80); + 0x0001000c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_4, ev_ch_e_cntxt_4, - 0x0001d010 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010010 + 0x4000 * GSI_EE_AP, 0x80); static const u32 reg_ev_ch_e_cntxt_8_fmask[] = { [EV_MODT] = GENMASK(15, 0), @@ -117,28 +109,28 @@ static const u32 reg_ev_ch_e_cntxt_8_fmask[] = { }; REG_STRIDE_FIELDS(EV_CH_E_CNTXT_8, ev_ch_e_cntxt_8, - 0x0001d020 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010020 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_9, ev_ch_e_cntxt_9, - 0x0001d024 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010024 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_10, ev_ch_e_cntxt_10, - 0x0001d028 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010028 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_11, ev_ch_e_cntxt_11, - 0x0001d02c + 0x4000 * GSI_EE_AP, 0x80); + 0x0001002c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_12, ev_ch_e_cntxt_12, - 0x0001d030 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010030 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_13, ev_ch_e_cntxt_13, - 0x0001d034 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010034 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_SCRATCH_0, ev_ch_e_scratch_0, - 0x0001d048 + 0x4000 * GSI_EE_AP, 0x80); + 0x00010048 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1, - 0x0001d04c + 0x4000 * GSI_EE_AP, 0x80); + 0x0001004c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0, 0x0001e000 + 0x4000 * GSI_EE_AP, 0x08); @@ -155,6 +147,7 @@ REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); static const u32 reg_ch_cmd_fmask[] = { [CH_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [CH_OPCODE] = GENMASK(31, 24), }; @@ -162,6 +155,7 @@ REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); static const u32 reg_ev_ch_cmd_fmask[] = { [EV_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [EV_OPCODE] = GENMASK(31, 24), }; @@ -239,6 +233,10 @@ static const u32 reg_cntxt_intset_fmask[] = { REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); +REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); + +REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); + static const u32 reg_cntxt_scratch_0_fmask[] = { [INTER_EE_RESULT] = GENMASK(2, 0), /* Bits 3-4 reserved */ diff --git a/drivers/net/ipa/reg/gsi_reg-v4.9.c b/drivers/net/ipa/reg/gsi_reg-v4.9.c index a7d5732b72e90..9374c89609d9a 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.9.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.9.c @@ -8,16 +8,12 @@ #include "../reg.h" #include "../gsi_reg.h" -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ - REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, 0x0000c020 + 0x1000 * GSI_EE_AP); REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, 0x0000c024 + 0x1000 * GSI_EE_AP); -/* All other register offsets are relative to gsi->virt */ - static const u32 reg_ch_c_cntxt_0_fmask[] = { [CHTYPE_PROTOCOL] = GENMASK(2, 0), [CHTYPE_DIR] = BIT(3), @@ -70,10 +66,6 @@ static const u32 reg_error_log_fmask[] = { [ERR_EE] = GENMASK(31, 28), }; -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); - -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); - REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); @@ -142,31 +134,33 @@ REG_STRIDE(EV_CH_E_SCRATCH_1, ev_ch_e_scratch_1, 0x0001d04c + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(CH_C_DOORBELL_0, ch_c_doorbell_0, - 0x0001e000 + 0x4000 * GSI_EE_AP, 0x08); + 0x00011000 + 0x4000 * GSI_EE_AP, 0x08); REG_STRIDE(EV_CH_E_DOORBELL_0, ev_ch_e_doorbell_0, - 0x0001e100 + 0x4000 * GSI_EE_AP, 0x08); + 0x00011100 + 0x4000 * GSI_EE_AP, 0x08); static const u32 reg_gsi_status_fmask[] = { [ENABLED] = BIT(0), /* Bits 1-31 reserved */ }; -REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); +REG_FIELDS(GSI_STATUS, gsi_status, 0x00012000 + 0x4000 * GSI_EE_AP); static const u32 reg_ch_cmd_fmask[] = { [CH_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [CH_OPCODE] = GENMASK(31, 24), }; -REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); +REG_FIELDS(CH_CMD, ch_cmd, 0x00012008 + 0x4000 * GSI_EE_AP); static const u32 reg_ev_ch_cmd_fmask[] = { [EV_CHID] = GENMASK(7, 0), + /* Bits 8-23 reserved */ [EV_OPCODE] = GENMASK(31, 24), }; -REG_FIELDS(EV_CH_CMD, ev_ch_cmd, 0x0001f010 + 0x4000 * GSI_EE_AP); +REG_FIELDS(EV_CH_CMD, ev_ch_cmd, 0x00012010 + 0x4000 * GSI_EE_AP); static const u32 reg_generic_cmd_fmask[] = { [GENERIC_OPCODE] = GENMASK(4, 0), @@ -175,7 +169,7 @@ static const u32 reg_generic_cmd_fmask[] = { /* Bits 14-31 reserved */ }; -REG_FIELDS(GENERIC_CMD, generic_cmd, 0x0001f018 + 0x4000 * GSI_EE_AP); +REG_FIELDS(GENERIC_CMD, generic_cmd, 0x00012018 + 0x4000 * GSI_EE_AP); static const u32 reg_hw_param_2_fmask[] = { [IRAM_SIZE] = GENMASK(2, 0), @@ -191,54 +185,58 @@ static const u32 reg_hw_param_2_fmask[] = { [GSI_USE_INTER_EE] = BIT(31), }; -REG_FIELDS(HW_PARAM_2, hw_param_2, 0x0001f040 + 0x4000 * GSI_EE_AP); +REG_FIELDS(HW_PARAM_2, hw_param_2, 0x00012040 + 0x4000 * GSI_EE_AP); -REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x0001f080 + 0x4000 * GSI_EE_AP); +REG(CNTXT_TYPE_IRQ, cntxt_type_irq, 0x00012080 + 0x4000 * GSI_EE_AP); -REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x0001f088 + 0x4000 * GSI_EE_AP); +REG(CNTXT_TYPE_IRQ_MSK, cntxt_type_irq_msk, 0x00012088 + 0x4000 * GSI_EE_AP); -REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x0001f090 + 0x4000 * GSI_EE_AP); +REG(CNTXT_SRC_CH_IRQ, cntxt_src_ch_irq, 0x00012090 + 0x4000 * GSI_EE_AP); -REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x0001f094 + 0x4000 * GSI_EE_AP); +REG(CNTXT_SRC_EV_CH_IRQ, cntxt_src_ev_ch_irq, 0x00012094 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_CH_IRQ_MSK, cntxt_src_ch_irq_msk, - 0x0001f098 + 0x4000 * GSI_EE_AP); + 0x00012098 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_EV_CH_IRQ_MSK, cntxt_src_ev_ch_irq_msk, - 0x0001f09c + 0x4000 * GSI_EE_AP); + 0x0001209c + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_CH_IRQ_CLR, cntxt_src_ch_irq_clr, - 0x0001f0a0 + 0x4000 * GSI_EE_AP); + 0x000120a0 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_EV_CH_IRQ_CLR, cntxt_src_ev_ch_irq_clr, - 0x0001f0a4 + 0x4000 * GSI_EE_AP); + 0x000120a4 + 0x4000 * GSI_EE_AP); -REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x0001f0b0 + 0x4000 * GSI_EE_AP); +REG(CNTXT_SRC_IEOB_IRQ, cntxt_src_ieob_irq, 0x000120b0 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_IEOB_IRQ_MSK, cntxt_src_ieob_irq_msk, - 0x0001f0b8 + 0x4000 * GSI_EE_AP); + 0x000120b8 + 0x4000 * GSI_EE_AP); REG(CNTXT_SRC_IEOB_IRQ_CLR, cntxt_src_ieob_irq_clr, - 0x0001f0c0 + 0x4000 * GSI_EE_AP); + 0x000120c0 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x0001f100 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GLOB_IRQ_STTS, cntxt_glob_irq_stts, 0x00012100 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x0001f108 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GLOB_IRQ_EN, cntxt_glob_irq_en, 0x00012108 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x0001f110 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GLOB_IRQ_CLR, cntxt_glob_irq_clr, 0x00012110 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x0001f118 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GSI_IRQ_STTS, cntxt_gsi_irq_stts, 0x00012118 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x0001f120 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GSI_IRQ_EN, cntxt_gsi_irq_en, 0x00012120 + 0x4000 * GSI_EE_AP); -REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x0001f128 + 0x4000 * GSI_EE_AP); +REG(CNTXT_GSI_IRQ_CLR, cntxt_gsi_irq_clr, 0x00012128 + 0x4000 * GSI_EE_AP); static const u32 reg_cntxt_intset_fmask[] = { [INTYPE] = BIT(0) /* Bits 1-31 reserved */ }; -REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x0001f180 + 0x4000 * GSI_EE_AP); +REG_FIELDS(CNTXT_INTSET, cntxt_intset, 0x00012180 + 0x4000 * GSI_EE_AP); + +REG_FIELDS(ERROR_LOG, error_log, 0x00012200 + 0x4000 * GSI_EE_AP); + +REG(ERROR_LOG_CLR, error_log_clr, 0x00012210 + 0x4000 * GSI_EE_AP); static const u32 reg_cntxt_scratch_0_fmask[] = { [INTER_EE_RESULT] = GENMASK(2, 0), @@ -247,7 +245,7 @@ static const u32 reg_cntxt_scratch_0_fmask[] = { /* Bits 8-31 reserved */ }; -REG_FIELDS(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x0001f400 + 0x4000 * GSI_EE_AP); +REG_FIELDS(CNTXT_SCRATCH_0, cntxt_scratch_0, 0x00012400 + 0x4000 * GSI_EE_AP); static const struct reg *reg_array[] = { [INTER_EE_SRC_CH_IRQ_MSK] = ®_inter_ee_src_ch_irq_msk, -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-02-15 19:53 ` [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw Alex Elder @ 2023-02-16 17:51 ` Alexander Lobakin 2023-02-16 18:11 ` Alex Elder 0 siblings, 1 reply; 14+ messages in thread From: Alexander Lobakin @ 2023-02-16 17:51 UTC (permalink / raw) To: Alex Elder Cc: davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel From: Alex Elder <elder@linaro.org> Date: Wed, 15 Feb 2023 13:53:48 -0600 > Starting at IPA v4.5, almost all GSI registers had their offsets > changed by a fixed amount (shifted downward by 0xd000). Rather than > defining offsets for all those registers dependent on version, an > adjustment was applied for most register accesses. This was > implemented in commit cdeee49f3ef7f ("net: ipa: adjust GSI register > addresses"). It was later modified to be a bit more obvious about > the adjusment, in commit 571b1e7e58ad3 ("net: ipa: use a separate > pointer for adjusted GSI memory"). [...] > @@ -142,27 +127,17 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) > return -EINVAL; > } > > - /* Make sure we can make our pointer adjustment if necessary */ > - adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST; > - if (res->start < adjust) { > - dev_err(dev, "DT memory resource \"gsi\" too low (< %u)\n", > - adjust); > - return -EINVAL; > - } > - > gsi->regs = gsi_regs(gsi); > if (!gsi->regs) { > dev_err(dev, "unsupported IPA version %u (?)\n", gsi->version); > return -EINVAL; > } > > - gsi->virt_raw = ioremap(res->start, size); > - if (!gsi->virt_raw) { > + gsi->virt = ioremap(res->start, size); Now that at least one check above went away and the second one might be or be not correct (I thought ioremap core takes care of this), can't just devm_platform_ioremap_resource_byname() be used here for simplicity? > + if (!gsi->virt) { > dev_err(dev, "unable to remap \"gsi\" memory\n"); > return -ENOMEM; > } > - /* Most registers are accessed using an adjusted register range */ > - gsi->virt = gsi->virt_raw - adjust; > > return 0; > } > @@ -170,7 +145,7 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) > /* Inverse of gsi_reg_init() */ > void gsi_reg_exit(struct gsi *gsi) > { > + iounmap(gsi->virt); (don't forget to remove this unmap if you decide to switch to devm_) > gsi->virt = NULL; > - iounmap(gsi->virt_raw); > - gsi->virt_raw = NULL; > + gsi->regs = NULL; > } [...] > diff --git a/drivers/net/ipa/reg/gsi_reg-v3.1.c b/drivers/net/ipa/reg/gsi_reg-v3.1.c > index 651c8a7ed6116..8451d3f8e421e 100644 > --- a/drivers/net/ipa/reg/gsi_reg-v3.1.c > +++ b/drivers/net/ipa/reg/gsi_reg-v3.1.c > @@ -8,16 +8,12 @@ > #include "../reg.h" > #include "../gsi_reg.h" > > -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ > - > REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, > 0x0000c020 + 0x1000 * GSI_EE_AP); > > REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, > 0x0000c024 + 0x1000 * GSI_EE_AP); > > -/* All other register offsets are relative to gsi->virt */ > - > static const u32 reg_ch_c_cntxt_0_fmask[] = { > [CHTYPE_PROTOCOL] = GENMASK(2, 0), > [CHTYPE_DIR] = BIT(3), > @@ -66,10 +62,6 @@ static const u32 reg_error_log_fmask[] = { > [ERR_EE] = GENMASK(31, 28), > }; > > -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); > - > -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); > - > REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, > 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); > > @@ -152,6 +144,7 @@ REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); > > static const u32 reg_ch_cmd_fmask[] = { > [CH_CHID] = GENMASK(7, 0), > + /* Bits 8-23 reserved */ > [CH_OPCODE] = GENMASK(31, 24), > }; > > @@ -159,6 +152,7 @@ REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); > > static const u32 reg_ev_ch_cmd_fmask[] = { > [EV_CHID] = GENMASK(7, 0), > + /* Bits 8-23 reserved */ > [EV_OPCODE] = GENMASK(31, 24), > }; > [...] (offtopic) I hope all those gsi_reg-v*.c are autogenerated? They look pretty scary to be written and edited manually each time :D Thanks, Olek ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-02-16 17:51 ` Alexander Lobakin @ 2023-02-16 18:11 ` Alex Elder 2023-02-17 11:57 ` Alexander Lobakin 0 siblings, 1 reply; 14+ messages in thread From: Alex Elder @ 2023-02-16 18:11 UTC (permalink / raw) To: Alexander Lobakin Cc: davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel On 2/16/23 11:51 AM, Alexander Lobakin wrote: > From: Alex Elder <elder@linaro.org> > Date: Wed, 15 Feb 2023 13:53:48 -0600 > >> Starting at IPA v4.5, almost all GSI registers had their offsets >> changed by a fixed amount (shifted downward by 0xd000). Rather than >> defining offsets for all those registers dependent on version, an >> adjustment was applied for most register accesses. This was >> implemented in commit cdeee49f3ef7f ("net: ipa: adjust GSI register >> addresses"). It was later modified to be a bit more obvious about >> the adjusment, in commit 571b1e7e58ad3 ("net: ipa: use a separate >> pointer for adjusted GSI memory"). > > [...] > >> @@ -142,27 +127,17 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) >> return -EINVAL; >> } >> >> - /* Make sure we can make our pointer adjustment if necessary */ >> - adjust = gsi->version < IPA_VERSION_4_5 ? 0 : GSI_EE_REG_ADJUST; >> - if (res->start < adjust) { >> - dev_err(dev, "DT memory resource \"gsi\" too low (< %u)\n", >> - adjust); >> - return -EINVAL; >> - } >> - >> gsi->regs = gsi_regs(gsi); >> if (!gsi->regs) { >> dev_err(dev, "unsupported IPA version %u (?)\n", gsi->version); >> return -EINVAL; >> } >> >> - gsi->virt_raw = ioremap(res->start, size); >> - if (!gsi->virt_raw) { >> + gsi->virt = ioremap(res->start, size); > > Now that at least one check above went away and the second one might be > or be not correct (I thought ioremap core takes care of this), can't > just devm_platform_ioremap_resource_byname() be used here for simplicity? Previously, virt_raw would be the "real" re-mapped pointer, and then virt would be adjusted downward from that. It was a weird thing to do, because the result pointed to a non-mapped address. But all uses of the virt pointer added an offset that was enough to put the result into the mapped range. The new code updates all offsets to account for what the adjustment previously did. The test that got removed isn't necessary any more. > >> + if (!gsi->virt) { >> dev_err(dev, "unable to remap \"gsi\" memory\n"); >> return -ENOMEM; >> } >> - /* Most registers are accessed using an adjusted register range */ >> - gsi->virt = gsi->virt_raw - adjust; >> >> return 0; >> } >> @@ -170,7 +145,7 @@ int gsi_reg_init(struct gsi *gsi, struct platform_device *pdev) >> /* Inverse of gsi_reg_init() */ >> void gsi_reg_exit(struct gsi *gsi) >> { >> + iounmap(gsi->virt); > > (don't forget to remove this unmap if you decide to switch to devm_) As far as devm_*() calls, I don't use those anywhere in the driver currently. If I were going to use them in one place I'd want do it consistently, everywhere. I don't want to do that. >> gsi->virt = NULL; >> - iounmap(gsi->virt_raw); >> - gsi->virt_raw = NULL; >> + gsi->regs = NULL; >> } > > [...] > >> diff --git a/drivers/net/ipa/reg/gsi_reg-v3.1.c b/drivers/net/ipa/reg/gsi_reg-v3.1.c >> index 651c8a7ed6116..8451d3f8e421e 100644 >> --- a/drivers/net/ipa/reg/gsi_reg-v3.1.c >> +++ b/drivers/net/ipa/reg/gsi_reg-v3.1.c >> @@ -8,16 +8,12 @@ >> #include "../reg.h" >> #include "../gsi_reg.h" >> >> -/* The inter-EE IRQ registers are relative to gsi->virt_raw (IPA v3.5+) */ >> - >> REG(INTER_EE_SRC_CH_IRQ_MSK, inter_ee_src_ch_irq_msk, >> 0x0000c020 + 0x1000 * GSI_EE_AP); >> >> REG(INTER_EE_SRC_EV_CH_IRQ_MSK, inter_ee_src_ev_ch_irq_msk, >> 0x0000c024 + 0x1000 * GSI_EE_AP); >> >> -/* All other register offsets are relative to gsi->virt */ >> - >> static const u32 reg_ch_c_cntxt_0_fmask[] = { >> [CHTYPE_PROTOCOL] = GENMASK(2, 0), >> [CHTYPE_DIR] = BIT(3), >> @@ -66,10 +62,6 @@ static const u32 reg_error_log_fmask[] = { >> [ERR_EE] = GENMASK(31, 28), >> }; >> >> -REG_FIELDS(ERROR_LOG, error_log, 0x0001f200 + 0x4000 * GSI_EE_AP); >> - >> -REG(ERROR_LOG_CLR, error_log_clr, 0x0001f210 + 0x4000 * GSI_EE_AP); >> - >> REG_STRIDE(CH_C_SCRATCH_0, ch_c_scratch_0, >> 0x0001c060 + 0x4000 * GSI_EE_AP, 0x80); >> >> @@ -152,6 +144,7 @@ REG_FIELDS(GSI_STATUS, gsi_status, 0x0001f000 + 0x4000 * GSI_EE_AP); >> >> static const u32 reg_ch_cmd_fmask[] = { >> [CH_CHID] = GENMASK(7, 0), >> + /* Bits 8-23 reserved */ >> [CH_OPCODE] = GENMASK(31, 24), >> }; >> >> @@ -159,6 +152,7 @@ REG_FIELDS(CH_CMD, ch_cmd, 0x0001f008 + 0x4000 * GSI_EE_AP); >> >> static const u32 reg_ev_ch_cmd_fmask[] = { >> [EV_CHID] = GENMASK(7, 0), >> + /* Bits 8-23 reserved */ >> [EV_OPCODE] = GENMASK(31, 24), >> }; >> > > [...] > > (offtopic) > > I hope all those gsi_reg-v*.c are autogenerated? They look pretty scary > to be written and edited manually each time :D I know they look scary, but no, they're manually generated and it's a real pain to review them. I try to be consistent enough that a "diff" is revealing and helpful. For the GSI registers, most of them don't change (until IPA v5.0). I intend to modify this a bit further so that registers that are the same as the previous version don't have to be re-stated (so each new version only has to highlight the differences). All that said, once created, they don't change. Thanks. -Alex > > Thanks, > Olek ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-02-16 18:11 ` Alex Elder @ 2023-02-17 11:57 ` Alexander Lobakin 2023-02-17 13:04 ` Alex Elder 0 siblings, 1 reply; 14+ messages in thread From: Alexander Lobakin @ 2023-02-17 11:57 UTC (permalink / raw) To: Alex Elder Cc: davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel From: Alex Elder <elder@linaro.org> Date: Thu, 16 Feb 2023 12:11:11 -0600 > On 2/16/23 11:51 AM, Alexander Lobakin wrote: >> From: Alex Elder <elder@linaro.org> >> Date: Wed, 15 Feb 2023 13:53:48 -0600 [...] >>> gsi->regs = gsi_regs(gsi); >>> if (!gsi->regs) { >>> dev_err(dev, "unsupported IPA version %u (?)\n", >>> gsi->version); >>> return -EINVAL; >>> } >>> - gsi->virt_raw = ioremap(res->start, size); >>> - if (!gsi->virt_raw) { >>> + gsi->virt = ioremap(res->start, size); >> >> Now that at least one check above went away and the second one might be >> or be not correct (I thought ioremap core takes care of this), can't >> just devm_platform_ioremap_resource_byname() be used here for simplicity? > > Previously, virt_raw would be the "real" re-mapped pointer, and then > virt would be adjusted downward from that. It was a weird thing to > do, because the result pointed to a non-mapped address. But all uses > of the virt pointer added an offset that was enough to put the result > into the mapped range. > > The new code updates all offsets to account for what the adjustment > previously did. The test that got removed isn't necessary any more. Yeah I got it, just asked that maybe you can now use platform_ioremap_resource_byname() instead of platform_get_resource_byname() + ioremap() :) > >> >>> + if (!gsi->virt) { >>> dev_err(dev, "unable to remap \"gsi\" memory\n"); >>> return -ENOMEM; >>> } >>> - /* Most registers are accessed using an adjusted register range */ >>> - gsi->virt = gsi->virt_raw - adjust; >>> return 0; >>> } >>> @@ -170,7 +145,7 @@ int gsi_reg_init(struct gsi *gsi, struct >>> platform_device *pdev) >>> /* Inverse of gsi_reg_init() */ >>> void gsi_reg_exit(struct gsi *gsi) >>> { >>> + iounmap(gsi->virt); >> >> (don't forget to remove this unmap if you decide to switch to devm_) > > As far as devm_*() calls, I don't use those anywhere in the driver > currently. If I were going to use them in one place I'd want do > it consistently, everywhere. I don't want to do that. + > >>> gsi->virt = NULL; >>> - iounmap(gsi->virt_raw); >>> - gsi->virt_raw = NULL; >>> + gsi->regs = NULL; [...] >> (offtopic) >> >> I hope all those gsi_reg-v*.c are autogenerated? They look pretty scary >> to be written and edited manually each time :D > > I know they look scary, but no, they're manually generated and > it's a real pain to review them. I try to be consistent enough > that a "diff" is revealing and helpful. For the GSI registers, > most of them don't change (until IPA v5.0). I intend to modify > this a bit further so that registers that are the same as the > previous version don't have to be re-stated (so each new version > only has to highlight the differences). No, it's +/- okay to review, as you say, they're pretty consistent in terms of code. > > All that said, once created, they don't change. > > Thanks. > > -Alex Thanks, Olek ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-02-17 11:57 ` Alexander Lobakin @ 2023-02-17 13:04 ` Alex Elder 2023-03-05 16:58 ` Alex Elder 0 siblings, 1 reply; 14+ messages in thread From: Alex Elder @ 2023-02-17 13:04 UTC (permalink / raw) To: Alexander Lobakin Cc: davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel On 2/17/23 5:57 AM, Alexander Lobakin wrote: >>> just devm_platform_ioremap_resource_byname() be used here for simplicity? >> Previously, virt_raw would be the "real" re-mapped pointer, and then >> virt would be adjusted downward from that. It was a weird thing to >> do, because the result pointed to a non-mapped address. But all uses >> of the virt pointer added an offset that was enough to put the result >> into the mapped range. >> >> The new code updates all offsets to account for what the adjustment >> previously did. The test that got removed isn't necessary any more. > Yeah I got it, just asked that maybe you can now use > platform_ioremap_resource_byname() instead of > platform_get_resource_byname() + ioremap() :) Sorry, I focused on the "devm" part and not this part. Yes I like that, but let me do that as a follow-on patch, and I think I can do it in more than this spot (possibly three, but I have to look closely). Thanks. -Alex ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-02-17 13:04 ` Alex Elder @ 2023-03-05 16:58 ` Alex Elder 2023-03-06 10:30 ` Alexander Lobakin 0 siblings, 1 reply; 14+ messages in thread From: Alex Elder @ 2023-03-05 16:58 UTC (permalink / raw) To: Alex Elder, Alexander Lobakin Cc: davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel On 2/17/23 7:04 AM, Alex Elder wrote: > On 2/17/23 5:57 AM, Alexander Lobakin wrote: >>>> just devm_platform_ioremap_resource_byname() be used here for >>>> simplicity? >>> Previously, virt_raw would be the "real" re-mapped pointer, and then >>> virt would be adjusted downward from that. It was a weird thing to >>> do, because the result pointed to a non-mapped address. But all uses >>> of the virt pointer added an offset that was enough to put the result >>> into the mapped range. >>> >>> The new code updates all offsets to account for what the adjustment >>> previously did. The test that got removed isn't necessary any more. >> Yeah I got it, just asked that maybe you can now use >> platform_ioremap_resource_byname() instead of >> platform_get_resource_byname() + ioremap() :) > > Sorry, I focused on the "devm" part and not this part. > Yes I like that, but let me do that as a follow-on > patch, and I think I can do it in more than this > spot (possibly three, but I have to look closely). Looking at this today, the only OF functions that look up a resource and I/O remap it in one call are devm_*() variants. There is no platform_ioremap_resource_byname() function. One that's available is devm_platform_ioremap_resource_byname(), which could possibly be used in the two locations that call platform_get_resource_byname() followed by ioremap(). As I said earlier, if I were to use any devm_*() function calls the driver, I would want to convert *everything* to use devm_*() variants, and I have no plans to do that at this time. So I will not be implementing your suggestion. -Alex > Thanks. > > -Alex > > ^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw 2023-03-05 16:58 ` Alex Elder @ 2023-03-06 10:30 ` Alexander Lobakin 0 siblings, 0 replies; 14+ messages in thread From: Alexander Lobakin @ 2023-03-06 10:30 UTC (permalink / raw) To: Alex Elder Cc: Alex Elder, davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel From: Alex Elder <elder@ieee.org> Date: Sun, 5 Mar 2023 10:58:19 -0600 > On 2/17/23 7:04 AM, Alex Elder wrote: >> On 2/17/23 5:57 AM, Alexander Lobakin wrote: >>>>> just devm_platform_ioremap_resource_byname() be used here for >>>>> simplicity? >>>> Previously, virt_raw would be the "real" re-mapped pointer, and then >>>> virt would be adjusted downward from that. It was a weird thing to >>>> do, because the result pointed to a non-mapped address. But all uses >>>> of the virt pointer added an offset that was enough to put the result >>>> into the mapped range. >>>> >>>> The new code updates all offsets to account for what the adjustment >>>> previously did. The test that got removed isn't necessary any more. >>> Yeah I got it, just asked that maybe you can now use >>> platform_ioremap_resource_byname() instead of >>> platform_get_resource_byname() + ioremap() :) >> >> Sorry, I focused on the "devm" part and not this part. >> Yes I like that, but let me do that as a follow-on >> patch, and I think I can do it in more than this >> spot (possibly three, but I have to look closely). > > Looking at this today, the only OF functions that look up a > resource and I/O remap it in one call are devm_*() variants. > There is no platform_ioremap_resource_byname() function. > > One that's available is devm_platform_ioremap_resource_byname(), > which could possibly be used in the two locations that call > platform_get_resource_byname() followed by ioremap(). > > As I said earlier, if I were to use any devm_*() function > calls the driver, I would want to convert *everything* to > use devm_*() variants, and I have no plans to do that at > this time. > > So I will not be implementing your suggestion. Sure. It's fully up to the developers as it doesn't make the code worse in any way. > > -Alex > >> Thanks. >> >> -Alex >> >> > Thanks, Olek ^ permalink raw reply [flat|nested] 14+ messages in thread
* [PATCH net-next 3/6] net: ipa: kill ev_ch_e_cntxt_1_length_encode() 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder 2023-02-15 19:53 ` [PATCH net-next 1/6] net: ipa: fix an incorrect assignment Alex Elder 2023-02-15 19:53 ` [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw Alex Elder @ 2023-02-15 19:53 ` Alex Elder 2023-02-15 19:53 ` [PATCH net-next 4/6] net: ipa: avoid setting an undefined field Alex Elder ` (3 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw) To: davem, edumazet, kuba, pabeni Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel Now that we explicitly define each register field width there is no need to have a special encoding function for the event ring length. Add a field for this to the EV_CH_E_CNTXT_1 GSI register, and use it in place of ev_ch_e_cntxt_1_length_encode() (which can be removed). Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/gsi.c | 15 +-------------- drivers/net/ipa/gsi_reg.h | 6 ++++++ drivers/net/ipa/reg/gsi_reg-v3.1.c | 8 ++++++-- drivers/net/ipa/reg/gsi_reg-v3.5.1.c | 8 ++++++-- drivers/net/ipa/reg/gsi_reg-v4.0.c | 8 ++++++-- drivers/net/ipa/reg/gsi_reg-v4.11.c | 8 ++++++-- drivers/net/ipa/reg/gsi_reg-v4.5.c | 8 ++++++-- drivers/net/ipa/reg/gsi_reg-v4.9.c | 8 ++++++-- 8 files changed, 43 insertions(+), 26 deletions(-) diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 2ef5509e3c836..0e6f679f71a8c 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -193,17 +193,6 @@ static u32 ch_c_cntxt_0_type_encode(enum ipa_version version, return val | reg_encode(reg, CHTYPE_PROTOCOL_MSB, type); } -/* Encode the length of the event channel ring buffer for the - * EV_CH_E_CNTXT_1 register. - */ -static u32 ev_ch_e_cntxt_1_length_encode(enum ipa_version version, u32 length) -{ - if (version < IPA_VERSION_4_9) - return u32_encode_bits(length, GENMASK(15, 0)); - - return u32_encode_bits(length, GENMASK(19, 0)); -} - /* Update the GSI IRQ type register with the cached value */ static void gsi_irq_type_update(struct gsi *gsi, u32 val) { @@ -731,7 +720,6 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) struct gsi_evt_ring *evt_ring = &gsi->evt_ring[evt_ring_id]; struct gsi_ring *ring = &evt_ring->ring; const struct reg *reg; - size_t size; u32 val; reg = gsi_reg(gsi, EV_CH_E_CNTXT_0); @@ -743,8 +731,7 @@ static void gsi_evt_ring_program(struct gsi *gsi, u32 evt_ring_id) iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id)); reg = gsi_reg(gsi, EV_CH_E_CNTXT_1); - size = ring->count * GSI_RING_ELEMENT_SIZE; - val = ev_ch_e_cntxt_1_length_encode(gsi->version, size); + val = reg_encode(reg, R_LENGTH, ring->count * GSI_RING_ELEMENT_SIZE); iowrite32(val, gsi->virt + reg_n_offset(reg, evt_ring_id)); /* The context 2 and 3 registers store the low-order and diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index e85765002aa41..a0b7ff0dcdfda 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -135,6 +135,7 @@ enum gsi_reg_ch_c_qos_field_id { PREFETCH_MODE, /* IPA v4.5+ */ EMPTY_LVL_THRSHOLD, /* IPA v4.5+ */ DB_IN_BYTES, /* IPA v4.9+ */ + LOW_LATENCY_EN, /* IPA v5.0+ */ }; /** enum gsi_prefetch_mode - PREFETCH_MODE field in CH_C_QOS */ @@ -155,6 +156,11 @@ enum gsi_reg_ch_c_ev_ch_e_cntxt_0_field_id { EV_ELEMENT_SIZE, }; +/* EV_CH_E_CNTXT_1 register */ +enum gsi_reg_ev_ch_c_cntxt_1_field_id { + R_LENGTH, +}; + /* EV_CH_E_CNTXT_8 register */ enum gsi_reg_ch_c_ev_ch_e_cntxt_8_field_id { EV_MODT, diff --git a/drivers/net/ipa/reg/gsi_reg-v3.1.c b/drivers/net/ipa/reg/gsi_reg-v3.1.c index 8451d3f8e421e..e036805a78824 100644 --- a/drivers/net/ipa/reg/gsi_reg-v3.1.c +++ b/drivers/net/ipa/reg/gsi_reg-v3.1.c @@ -87,8 +87,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); +static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { + [R_LENGTH] = GENMASK(15, 0), +}; + +REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, + 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); diff --git a/drivers/net/ipa/reg/gsi_reg-v3.5.1.c b/drivers/net/ipa/reg/gsi_reg-v3.5.1.c index 87e75cf425135..8c3ab3a5288e6 100644 --- a/drivers/net/ipa/reg/gsi_reg-v3.5.1.c +++ b/drivers/net/ipa/reg/gsi_reg-v3.5.1.c @@ -87,8 +87,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); +static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { + [R_LENGTH] = GENMASK(15, 0), +}; + +REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, + 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); diff --git a/drivers/net/ipa/reg/gsi_reg-v4.0.c b/drivers/net/ipa/reg/gsi_reg-v4.0.c index 048832e185091..7cc7a21d07f90 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.0.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.0.c @@ -88,8 +88,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); +static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { + [R_LENGTH] = GENMASK(15, 0), +}; + +REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, + 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); diff --git a/drivers/net/ipa/reg/gsi_reg-v4.11.c b/drivers/net/ipa/reg/gsi_reg-v4.11.c index ced762ca16f91..01696519032fa 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.11.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.11.c @@ -91,8 +91,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 0x00010000 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x00010004 + 0x4000 * GSI_EE_AP, 0x80); +static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { + [R_LENGTH] = GENMASK(19, 0), +}; + +REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, + 0x00010004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 0x00010008 + 0x4000 * GSI_EE_AP, 0x80); diff --git a/drivers/net/ipa/reg/gsi_reg-v4.5.c b/drivers/net/ipa/reg/gsi_reg-v4.5.c index 1ede8276824d7..648b51b88d4e8 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.5.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.5.c @@ -90,8 +90,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 0x00010000 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x00010004 + 0x4000 * GSI_EE_AP, 0x80); +static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { + [R_LENGTH] = GENMASK(15, 0), +}; + +REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, + 0x00010004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 0x00010008 + 0x4000 * GSI_EE_AP, 0x80); diff --git a/drivers/net/ipa/reg/gsi_reg-v4.9.c b/drivers/net/ipa/reg/gsi_reg-v4.9.c index 9374c89609d9a..4bf45d264d6b9 100644 --- a/drivers/net/ipa/reg/gsi_reg-v4.9.c +++ b/drivers/net/ipa/reg/gsi_reg-v4.9.c @@ -91,8 +91,12 @@ static const u32 reg_ev_ch_e_cntxt_0_fmask[] = { REG_STRIDE_FIELDS(EV_CH_E_CNTXT_0, ev_ch_e_cntxt_0, 0x0001d000 + 0x4000 * GSI_EE_AP, 0x80); -REG_STRIDE(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, - 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); +static const u32 reg_ev_ch_e_cntxt_1_fmask[] = { + [R_LENGTH] = GENMASK(15, 0), +}; + +REG_STRIDE_FIELDS(EV_CH_E_CNTXT_1, ev_ch_e_cntxt_1, + 0x0001d004 + 0x4000 * GSI_EE_AP, 0x80); REG_STRIDE(EV_CH_E_CNTXT_2, ev_ch_e_cntxt_2, 0x0001d008 + 0x4000 * GSI_EE_AP, 0x80); -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH net-next 4/6] net: ipa: avoid setting an undefined field 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder ` (2 preceding siblings ...) 2023-02-15 19:53 ` [PATCH net-next 3/6] net: ipa: kill ev_ch_e_cntxt_1_length_encode() Alex Elder @ 2023-02-15 19:53 ` Alex Elder 2023-02-15 19:53 ` [PATCH net-next 5/6] net: ipa: support different event ring encoding Alex Elder ` (2 subsequent siblings) 6 siblings, 0 replies; 14+ messages in thread From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw) To: davem, edumazet, kuba, pabeni Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel The GSI channel protocol field in the CH_C_CNTXT_0 GSI register is widened starting IPA v5.0, making the CHTYPE_PROTOCOL_MSB field added in IPA v4.5 unnecessary. Update the code to reflect this. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/gsi.c | 2 +- drivers/net/ipa/gsi_reg.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 0e6f679f71a8c..88279956194a9 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -185,7 +185,7 @@ static u32 ch_c_cntxt_0_type_encode(enum ipa_version version, u32 val; val = reg_encode(reg, CHTYPE_PROTOCOL, type); - if (version < IPA_VERSION_4_5) + if (version < IPA_VERSION_4_5 || version >= IPA_VERSION_5_0) return val; type >>= hweight32(reg_fmask(reg, CHTYPE_PROTOCOL)); diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index a0b7ff0dcdfda..52520cd44c3e1 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -101,7 +101,7 @@ enum gsi_reg_ch_c_cntxt_0_field_id { CHTYPE_DIR, CH_EE, CHID, - CHTYPE_PROTOCOL_MSB, /* IPA v4.9+ */ + CHTYPE_PROTOCOL_MSB, /* IPA v4.5-4.11 */ ERINDEX, CHSTATE, ELEMENT_SIZE, -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH net-next 5/6] net: ipa: support different event ring encoding 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder ` (3 preceding siblings ...) 2023-02-15 19:53 ` [PATCH net-next 4/6] net: ipa: avoid setting an undefined field Alex Elder @ 2023-02-15 19:53 ` Alex Elder 2023-02-15 19:53 ` [PATCH net-next 6/6] net: ipa: add HW_PARAM_4 GSI register Alex Elder 2023-02-20 7:30 ` [PATCH net-next 0/6] net: final GSI register updates patchwork-bot+netdevbpf 6 siblings, 0 replies; 14+ messages in thread From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw) To: davem, edumazet, kuba, pabeni Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel Starting with IPA v5.0, a channel's event ring index is encoded in a field in the CH_C_CNTXT_1 GSI register rather than CH_C_CNTXT_0. Define a new field ID for the former register and encode the event ring in the appropriate register. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/gsi.c | 5 ++++- drivers/net/ipa/gsi_reg.h | 3 ++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index 88279956194a9..f128d5bd6956e 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -840,12 +840,15 @@ static void gsi_channel_program(struct gsi_channel *channel, bool doorbell) val = ch_c_cntxt_0_type_encode(gsi->version, reg, GSI_CHANNEL_TYPE_GPI); if (channel->toward_ipa) val |= reg_bit(reg, CHTYPE_DIR); - val |= reg_encode(reg, ERINDEX, channel->evt_ring_id); + if (gsi->version < IPA_VERSION_5_0) + val |= reg_encode(reg, ERINDEX, channel->evt_ring_id); val |= reg_encode(reg, ELEMENT_SIZE, GSI_RING_ELEMENT_SIZE); iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id)); reg = gsi_reg(gsi, CH_C_CNTXT_1); val = reg_encode(reg, CH_R_LENGTH, size); + if (gsi->version >= IPA_VERSION_5_0) + val |= reg_encode(reg, CH_ERINDEX, channel->evt_ring_id); iowrite32(val, gsi->virt + reg_n_offset(reg, channel_id)); /* The context 2 and 3 registers store the low-order and diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index 52520cd44c3e1..2a19d9e34a10a 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -102,7 +102,7 @@ enum gsi_reg_ch_c_cntxt_0_field_id { CH_EE, CHID, CHTYPE_PROTOCOL_MSB, /* IPA v4.5-4.11 */ - ERINDEX, + ERINDEX, /* Not IPA v5.0+ */ CHSTATE, ELEMENT_SIZE, }; @@ -124,6 +124,7 @@ enum gsi_channel_type { /* CH_C_CNTXT_1 register */ enum gsi_reg_ch_c_cntxt_1_field_id { CH_R_LENGTH, + CH_ERINDEX, /* IPA v5.0+ */ }; /* CH_C_QOS register */ -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* [PATCH net-next 6/6] net: ipa: add HW_PARAM_4 GSI register 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder ` (4 preceding siblings ...) 2023-02-15 19:53 ` [PATCH net-next 5/6] net: ipa: support different event ring encoding Alex Elder @ 2023-02-15 19:53 ` Alex Elder 2023-02-20 7:30 ` [PATCH net-next 0/6] net: final GSI register updates patchwork-bot+netdevbpf 6 siblings, 0 replies; 14+ messages in thread From: Alex Elder @ 2023-02-15 19:53 UTC (permalink / raw) To: davem, edumazet, kuba, pabeni Cc: caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel Starting at IPA v5.0, the number of event rings per EE is defined in a field in a new HW_PARAM_4 GSI register rather than HW_PARAM_2. Define this new register and its fields, and update the code that checks the number of rings supported by hardware to use the proper field based on IPA version. Signed-off-by: Alex Elder <elder@linaro.org> --- drivers/net/ipa/gsi.c | 7 ++++++- drivers/net/ipa/gsi_reg.h | 9 ++++++++- 2 files changed, 14 insertions(+), 2 deletions(-) diff --git a/drivers/net/ipa/gsi.c b/drivers/net/ipa/gsi.c index f128d5bd6956e..9a0b1fe4a93a8 100644 --- a/drivers/net/ipa/gsi.c +++ b/drivers/net/ipa/gsi.c @@ -2042,7 +2042,12 @@ static int gsi_ring_setup(struct gsi *gsi) } gsi->channel_count = count; - count = reg_decode(reg, NUM_EV_PER_EE, val); + if (gsi->version < IPA_VERSION_5_0) { + count = reg_decode(reg, NUM_EV_PER_EE, val); + } else { + reg = gsi_reg(gsi, HW_PARAM_4); + count = reg_decode(reg, EV_PER_EE, val); + } if (!count) { dev_err(dev, "GSI reports zero event rings supported\n"); return -EINVAL; diff --git a/drivers/net/ipa/gsi_reg.h b/drivers/net/ipa/gsi_reg.h index 2a19d9e34a10a..f62f0a5c653d1 100644 --- a/drivers/net/ipa/gsi_reg.h +++ b/drivers/net/ipa/gsi_reg.h @@ -71,6 +71,7 @@ enum gsi_reg_id { EV_CH_CMD, GENERIC_CMD, HW_PARAM_2, /* IPA v3.5.1+ */ + HW_PARAM_4, /* IPA v5.0+ */ CNTXT_TYPE_IRQ, CNTXT_TYPE_IRQ_MSK, CNTXT_SRC_CH_IRQ, @@ -224,7 +225,7 @@ enum gsi_generic_cmd_opcode { enum gsi_hw_param_2_field_id { IRAM_SIZE, NUM_CH_PER_EE, - NUM_EV_PER_EE, + NUM_EV_PER_EE, /* Not IPA v5.0+ */ GSI_CH_PEND_TRANSLATE, GSI_CH_FULL_LOGIC, GSI_USE_SDMA, /* IPA v4.0+ */ @@ -247,6 +248,12 @@ enum gsi_iram_size { IRAM_SIZE_FOUR_KB = 0x5, }; +/* HW_PARAM_4 register */ /* IPA v5.0+ */ +enum gsi_hw_param_4_field_id { + EV_PER_EE, + IRAM_PROTOCOL_COUNT, +}; + /** * enum gsi_irq_type_id: GSI IRQ types * @GSI_CH_CTRL: Channel allocation, deallocation, etc. -- 2.34.1 ^ permalink raw reply related [flat|nested] 14+ messages in thread
* Re: [PATCH net-next 0/6] net: final GSI register updates 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder ` (5 preceding siblings ...) 2023-02-15 19:53 ` [PATCH net-next 6/6] net: ipa: add HW_PARAM_4 GSI register Alex Elder @ 2023-02-20 7:30 ` patchwork-bot+netdevbpf 6 siblings, 0 replies; 14+ messages in thread From: patchwork-bot+netdevbpf @ 2023-02-20 7:30 UTC (permalink / raw) To: Alex Elder Cc: davem, edumazet, kuba, pabeni, caleb.connolly, mka, evgreen, andersson, quic_cpratapa, quic_avuyyuru, quic_jponduru, quic_subashab, elder, netdev, linux-arm-msm, linux-kernel Hello: This series was applied to netdev/net-next.git (master) by Paolo Abeni <pabeni@redhat.com>: On Wed, 15 Feb 2023 13:53:46 -0600 you wrote: > I believe this is the last set of changes required to allow IPA v5.0 > to be supported. There is a little cleanup work remaining, but that > can happen in the next Linux release cycle. Otherwise we just need > config data and register definitions for IPA v5.0 (and DTS updates). > These are ready but won't be posted without further testing. > > The first patch in this series fixes a minor bug in a patch just > posted, which I found too late. The second eliminates the GSI > memory "adjustment"; this was done previously to avoid/delay the > need to implement a more general way to define GSI register offsets. > Note that this patch causes "checkpatch" warnings due to indentation > that aligns with an open parenthesis. > > [...] Here is the summary with links: - [net-next,1/6] net: ipa: fix an incorrect assignment https://git.kernel.org/netdev/net-next/c/ecfa80ce3b87 - [net-next,2/6] net: ipa: kill gsi->virt_raw https://git.kernel.org/netdev/net-next/c/59b12b1d27f3 - [net-next,3/6] net: ipa: kill ev_ch_e_cntxt_1_length_encode() https://git.kernel.org/netdev/net-next/c/f75f44ddd4cb - [net-next,4/6] net: ipa: avoid setting an undefined field https://git.kernel.org/netdev/net-next/c/62747512ebe6 - [net-next,5/6] net: ipa: support different event ring encoding https://git.kernel.org/netdev/net-next/c/37cd29ec8401 - [net-next,6/6] net: ipa: add HW_PARAM_4 GSI register https://git.kernel.org/netdev/net-next/c/f651334e1ef5 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html ^ permalink raw reply [flat|nested] 14+ messages in thread
end of thread, other threads:[~2023-03-06 10:32 UTC | newest] Thread overview: 14+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-02-15 19:53 [PATCH net-next 0/6] net: final GSI register updates Alex Elder 2023-02-15 19:53 ` [PATCH net-next 1/6] net: ipa: fix an incorrect assignment Alex Elder 2023-02-15 19:53 ` [PATCH net-next 2/6] net: ipa: kill gsi->virt_raw Alex Elder 2023-02-16 17:51 ` Alexander Lobakin 2023-02-16 18:11 ` Alex Elder 2023-02-17 11:57 ` Alexander Lobakin 2023-02-17 13:04 ` Alex Elder 2023-03-05 16:58 ` Alex Elder 2023-03-06 10:30 ` Alexander Lobakin 2023-02-15 19:53 ` [PATCH net-next 3/6] net: ipa: kill ev_ch_e_cntxt_1_length_encode() Alex Elder 2023-02-15 19:53 ` [PATCH net-next 4/6] net: ipa: avoid setting an undefined field Alex Elder 2023-02-15 19:53 ` [PATCH net-next 5/6] net: ipa: support different event ring encoding Alex Elder 2023-02-15 19:53 ` [PATCH net-next 6/6] net: ipa: add HW_PARAM_4 GSI register Alex Elder 2023-02-20 7:30 ` [PATCH net-next 0/6] net: final GSI register updates patchwork-bot+netdevbpf
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