From: Sibi Sankar <quic_sibis@quicinc.com>
To: Bjorn Andersson <quic_bjorande@quicinc.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Georgi Djakov <djakov@kernel.org>,
Mike Tipton <quic_mdtipton@quicinc.com>,
Johan Hovold <johan+linaro@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 10/10] arm64: dts: qcom: sc8280xp: Add bwmon instances
Date: Fri, 11 Nov 2022 16:33:06 +0530 [thread overview]
Message-ID: <57298a3b-443b-b49b-c395-e2d6420ad20b@quicinc.com> (raw)
In-Reply-To: <20221111032515.3460-11-quic_bjorande@quicinc.com>
On 11/11/22 08:55, Bjorn Andersson wrote:
> Add the two bwmon instances and define votes for CPU -> LLCC and LLCC ->
> DDR, with bandwidth values based on the downstream DeviceTree.
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
>
> Changes since v1:
> - Added "cpu" to compatible for the CPU-subsystem bwmon instance
>
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 91 ++++++++++++++++++++++++++
> 1 file changed, 91 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index 2ac8f5204905..62e9dd8a2f07 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -1287,6 +1287,97 @@
> };
> };
>
> + pmu@9091000 {
> + compatible = "qcom,sc8280xp-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
> + reg = <0 0x9091000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&mc_virt MASTER_LLCC 3 &mc_virt SLAVE_EBI1 3>;
> +
> + operating-points-v2 = <&llcc_bwmon_opp_table>;
> +
> + llcc_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-0 {
> + opp-peak-kBps = <762000>;
> + };
> + opp-1 {
> + opp-peak-kBps = <1720000>;
> + };
> + opp-2 {
> + opp-peak-kBps = <2086000>;
> + };
> + opp-3 {
> + opp-peak-kBps = <2597000>;
> + };
> + opp-4 {
> + opp-peak-kBps = <2929000>;
> + };
> + opp-5 {
> + opp-peak-kBps = <3879000>;
> + };
> + opp-6 {
> + opp-peak-kBps = <5161000>;
> + };
> + opp-7 {
> + opp-peak-kBps = <5931000>;
> + };
> + opp-8 {
> + opp-peak-kBps = <6515000>;
> + };
> + opp-9 {
> + opp-peak-kBps = <7980000>;
> + };
> + opp-10 {
> + opp-peak-kBps = <8136000>;
> + };
> + opp-11 {
> + opp-peak-kBps = <10437000>;
> + };
> + opp-12 {
> + opp-peak-kBps = <12191000>;
> + };
> + };
> + };
> +
> + pmu@90b6400 {
> + compatible = "qcom,sc8280xp-cpu-bwmon", "qcom,msm8998-bwmon";
> + reg = <0 0x090b6400 0 0x600>;
> +
> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
> + operating-points-v2 = <&cpu_bwmon_opp_table>;
> +
> + cpu_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-0 {
> + opp-peak-kBps = <2288000>;
> + };
> + opp-1 {
> + opp-peak-kBps = <4577000>;
> + };
> + opp-2 {
> + opp-peak-kBps = <7110000>;
> + };
> + opp-3 {
> + opp-peak-kBps = <9155000>;
> + };
> + opp-4 {
> + opp-peak-kBps = <12298000>;
> + };
> + opp-5 {
> + opp-peak-kBps = <14236000>;
> + };
> + opp-6 {
> + opp-peak-kBps = <15258001>;
> + };
> + };
> + };
> +
> system-cache-controller@9200000 {
> compatible = "qcom,sc8280xp-llcc";
> reg = <0 0x09200000 0 0x58000>, <0 0x09600000 0 0x58000>;
next prev parent reply other threads:[~2022-11-11 11:03 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 3:25 [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling Bjorn Andersson
2022-11-11 3:25 ` [PATCH v2 01/10] interconnect: qcom: osm-l3: Use platform-independent node ids Bjorn Andersson
2022-11-11 10:23 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 02/10] interconnect: qcom: osm-l3: Squash common descriptors Bjorn Andersson
2022-11-11 10:24 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 03/10] interconnect: qcom: osm-l3: Add per-core EPSS L3 support Bjorn Andersson
2022-11-11 10:24 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 04/10] interconnect: qcom: osm-l3: Simplify osm_l3_set() Bjorn Andersson
2022-11-11 10:26 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 05/10] dt-bindings: interconnect: Add sm8350, sc8280xp and generic OSM L3 compatibles Bjorn Andersson
2022-11-11 8:36 ` Krzysztof Kozlowski
2022-11-11 10:32 ` Sibi Sankar
2022-11-11 18:08 ` Bjorn Andersson
2022-11-16 6:56 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 06/10] arm64: dts: qcom: Align with generic osm-l3/epss-l3 Bjorn Andersson
2022-11-11 10:44 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 07/10] arm64: dts: qcom: sc8280xp: Add epss_l3 node Bjorn Andersson
2022-11-11 10:33 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 08/10] arm64: dts: qcom: sc8280xp: Set up L3 scaling Bjorn Andersson
2022-11-16 11:01 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 09/10] dt-bindings: interconnect: qcom,msm8998-bwmon: Add sc8280xp bwmon instances Bjorn Andersson
2022-11-11 8:35 ` Krzysztof Kozlowski
2022-11-11 10:53 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 10/10] arm64: dts: qcom: sc8280xp: Add " Bjorn Andersson
2022-11-11 11:03 ` Sibi Sankar [this message]
2022-11-17 16:25 ` [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling Georgi Djakov
2022-12-06 18:19 ` (subset) " Bjorn Andersson
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=57298a3b-443b-b49b-c395-e2d6420ad20b@quicinc.com \
--to=quic_sibis@quicinc.com \
--cc=andersson@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=djakov@kernel.org \
--cc=johan+linaro@kernel.org \
--cc=konrad.dybcio@somainline.org \
--cc=krzysztof.kozlowski@linaro.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=quic_bjorande@quicinc.com \
--cc=quic_mdtipton@quicinc.com \
--cc=robh+dt@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox