From: Sibi Sankar <quic_sibis@quicinc.com>
To: Bjorn Andersson <quic_bjorande@quicinc.com>,
Georgi Djakov <djakov@kernel.org>
Cc: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@somainline.org>,
"Rob Herring" <robh+dt@kernel.org>,
Mike Tipton <quic_mdtipton@quicinc.com>,
"Johan Hovold" <johan+linaro@kernel.org>,
<linux-arm-msm@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v2 01/10] interconnect: qcom: osm-l3: Use platform-independent node ids
Date: Fri, 11 Nov 2022 15:53:24 +0530 [thread overview]
Message-ID: <f77fd45d-56b7-ad79-efbf-472805f0b6ed@quicinc.com> (raw)
In-Reply-To: <20221111032515.3460-2-quic_bjorande@quicinc.com>
Hey Bjorn
Thanks for the patch.
On 11/11/22 08:55, Bjorn Andersson wrote:
> The identifiers used for nodes needs to be unique in the running system,
> but defining them per platform results in a lot of duplicated
> definitions and prevents us from using generic compatibles.
>
> As these identifiers are not exposed outside the kernel, change to use
> driver-local numbers, picked completely at random.
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> Tested-by: Steev Klimaszewski <steev@kali.org>
With the change in implementation, you can remove now remove the per soc
node id headers included in the driver. With ^^ done.
Reviewed-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
>
> Changes since v1:
> - None
>
> drivers/interconnect/qcom/osm-l3.c | 87 +++++++++++-------------------
> 1 file changed, 30 insertions(+), 57 deletions(-)
>
> diff --git a/drivers/interconnect/qcom/osm-l3.c b/drivers/interconnect/qcom/osm-l3.c
> index ddbdf0943f94..d23769844419 100644
> --- a/drivers/interconnect/qcom/osm-l3.c
> +++ b/drivers/interconnect/qcom/osm-l3.c
> @@ -74,6 +74,11 @@ struct qcom_osm_l3_desc {
> unsigned int reg_perf_state;
> };
>
> +enum {
> + OSM_L3_MASTER_NODE = 10000,
> + OSM_L3_SLAVE_NODE,
> +};
> +
> #define DEFINE_QNODE(_name, _id, _buswidth, ...) \
> static const struct qcom_osm_l3_node _name = { \
> .name = #_name, \
> @@ -83,97 +88,65 @@ struct qcom_osm_l3_desc {
> .links = { __VA_ARGS__ }, \
> }
>
> -DEFINE_QNODE(sdm845_osm_apps_l3, SDM845_MASTER_OSM_L3_APPS, 16, SDM845_SLAVE_OSM_L3);
> -DEFINE_QNODE(sdm845_osm_l3, SDM845_SLAVE_OSM_L3, 16);
> +DEFINE_QNODE(osm_l3_master, OSM_L3_MASTER_NODE, 16, OSM_L3_SLAVE_NODE);
> +DEFINE_QNODE(osm_l3_slave, OSM_L3_SLAVE_NODE, 16);
> +
> +static const struct qcom_osm_l3_node * const osm_l3_nodes[] = {
> + [MASTER_OSM_L3_APPS] = &osm_l3_master,
> + [SLAVE_OSM_L3] = &osm_l3_slave,
> +};
> +
> +DEFINE_QNODE(epss_l3_master, OSM_L3_MASTER_NODE, 32, OSM_L3_SLAVE_NODE);
> +DEFINE_QNODE(epss_l3_slave, OSM_L3_SLAVE_NODE, 32);
>
> -static const struct qcom_osm_l3_node * const sdm845_osm_l3_nodes[] = {
> - [MASTER_OSM_L3_APPS] = &sdm845_osm_apps_l3,
> - [SLAVE_OSM_L3] = &sdm845_osm_l3,
> +static const struct qcom_osm_l3_node * const epss_l3_nodes[] = {
> + [MASTER_EPSS_L3_APPS] = &epss_l3_master,
> + [SLAVE_EPSS_L3_SHARED] = &epss_l3_slave,
> };
>
> static const struct qcom_osm_l3_desc sdm845_icc_osm_l3 = {
> - .nodes = sdm845_osm_l3_nodes,
> - .num_nodes = ARRAY_SIZE(sdm845_osm_l3_nodes),
> + .nodes = osm_l3_nodes,
> + .num_nodes = ARRAY_SIZE(osm_l3_nodes),
> .lut_row_size = OSM_LUT_ROW_SIZE,
> .reg_freq_lut = OSM_REG_FREQ_LUT,
> .reg_perf_state = OSM_REG_PERF_STATE,
> };
>
> -DEFINE_QNODE(sc7180_osm_apps_l3, SC7180_MASTER_OSM_L3_APPS, 16, SC7180_SLAVE_OSM_L3);
> -DEFINE_QNODE(sc7180_osm_l3, SC7180_SLAVE_OSM_L3, 16);
> -
> -static const struct qcom_osm_l3_node * const sc7180_osm_l3_nodes[] = {
> - [MASTER_OSM_L3_APPS] = &sc7180_osm_apps_l3,
> - [SLAVE_OSM_L3] = &sc7180_osm_l3,
> -};
> -
> static const struct qcom_osm_l3_desc sc7180_icc_osm_l3 = {
> - .nodes = sc7180_osm_l3_nodes,
> - .num_nodes = ARRAY_SIZE(sc7180_osm_l3_nodes),
> + .nodes = osm_l3_nodes,
> + .num_nodes = ARRAY_SIZE(osm_l3_nodes),
> .lut_row_size = OSM_LUT_ROW_SIZE,
> .reg_freq_lut = OSM_REG_FREQ_LUT,
> .reg_perf_state = OSM_REG_PERF_STATE,
> };
>
> -DEFINE_QNODE(sc7280_epss_apps_l3, SC7280_MASTER_EPSS_L3_APPS, 32, SC7280_SLAVE_EPSS_L3);
> -DEFINE_QNODE(sc7280_epss_l3, SC7280_SLAVE_EPSS_L3, 32);
> -
> -static const struct qcom_osm_l3_node * const sc7280_epss_l3_nodes[] = {
> - [MASTER_EPSS_L3_APPS] = &sc7280_epss_apps_l3,
> - [SLAVE_EPSS_L3_SHARED] = &sc7280_epss_l3,
> -};
> -
> static const struct qcom_osm_l3_desc sc7280_icc_epss_l3 = {
> - .nodes = sc7280_epss_l3_nodes,
> - .num_nodes = ARRAY_SIZE(sc7280_epss_l3_nodes),
> + .nodes = epss_l3_nodes,
> + .num_nodes = ARRAY_SIZE(epss_l3_nodes),
> .lut_row_size = EPSS_LUT_ROW_SIZE,
> .reg_freq_lut = EPSS_REG_FREQ_LUT,
> .reg_perf_state = EPSS_REG_PERF_STATE,
> };
>
> -DEFINE_QNODE(sc8180x_osm_apps_l3, SC8180X_MASTER_OSM_L3_APPS, 32, SC8180X_SLAVE_OSM_L3);
> -DEFINE_QNODE(sc8180x_osm_l3, SC8180X_SLAVE_OSM_L3, 32);
> -
> -static const struct qcom_osm_l3_node * const sc8180x_osm_l3_nodes[] = {
> - [MASTER_OSM_L3_APPS] = &sc8180x_osm_apps_l3,
> - [SLAVE_OSM_L3] = &sc8180x_osm_l3,
> -};
> -
> static const struct qcom_osm_l3_desc sc8180x_icc_osm_l3 = {
> - .nodes = sc8180x_osm_l3_nodes,
> - .num_nodes = ARRAY_SIZE(sc8180x_osm_l3_nodes),
> + .nodes = osm_l3_nodes,
> + .num_nodes = ARRAY_SIZE(osm_l3_nodes),
> .lut_row_size = OSM_LUT_ROW_SIZE,
> .reg_freq_lut = OSM_REG_FREQ_LUT,
> .reg_perf_state = OSM_REG_PERF_STATE,
> };
>
> -DEFINE_QNODE(sm8150_osm_apps_l3, SM8150_MASTER_OSM_L3_APPS, 32, SM8150_SLAVE_OSM_L3);
> -DEFINE_QNODE(sm8150_osm_l3, SM8150_SLAVE_OSM_L3, 32);
> -
> -static const struct qcom_osm_l3_node * const sm8150_osm_l3_nodes[] = {
> - [MASTER_OSM_L3_APPS] = &sm8150_osm_apps_l3,
> - [SLAVE_OSM_L3] = &sm8150_osm_l3,
> -};
> -
> static const struct qcom_osm_l3_desc sm8150_icc_osm_l3 = {
> - .nodes = sm8150_osm_l3_nodes,
> - .num_nodes = ARRAY_SIZE(sm8150_osm_l3_nodes),
> + .nodes = osm_l3_nodes,
> + .num_nodes = ARRAY_SIZE(osm_l3_nodes),
> .lut_row_size = OSM_LUT_ROW_SIZE,
> .reg_freq_lut = OSM_REG_FREQ_LUT,
> .reg_perf_state = OSM_REG_PERF_STATE,
> };
>
> -DEFINE_QNODE(sm8250_epss_apps_l3, SM8250_MASTER_EPSS_L3_APPS, 32, SM8250_SLAVE_EPSS_L3);
> -DEFINE_QNODE(sm8250_epss_l3, SM8250_SLAVE_EPSS_L3, 32);
> -
> -static const struct qcom_osm_l3_node * const sm8250_epss_l3_nodes[] = {
> - [MASTER_EPSS_L3_APPS] = &sm8250_epss_apps_l3,
> - [SLAVE_EPSS_L3_SHARED] = &sm8250_epss_l3,
> -};
> -
> static const struct qcom_osm_l3_desc sm8250_icc_epss_l3 = {
> - .nodes = sm8250_epss_l3_nodes,
> - .num_nodes = ARRAY_SIZE(sm8250_epss_l3_nodes),
> + .nodes = epss_l3_nodes,
> + .num_nodes = ARRAY_SIZE(epss_l3_nodes),
> .lut_row_size = EPSS_LUT_ROW_SIZE,
> .reg_freq_lut = EPSS_REG_FREQ_LUT,
> .reg_perf_state = EPSS_REG_PERF_STATE,
next prev parent reply other threads:[~2022-11-11 10:24 UTC|newest]
Thread overview: 27+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-11-11 3:25 [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling Bjorn Andersson
2022-11-11 3:25 ` [PATCH v2 01/10] interconnect: qcom: osm-l3: Use platform-independent node ids Bjorn Andersson
2022-11-11 10:23 ` Sibi Sankar [this message]
2022-11-11 3:25 ` [PATCH v2 02/10] interconnect: qcom: osm-l3: Squash common descriptors Bjorn Andersson
2022-11-11 10:24 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 03/10] interconnect: qcom: osm-l3: Add per-core EPSS L3 support Bjorn Andersson
2022-11-11 10:24 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 04/10] interconnect: qcom: osm-l3: Simplify osm_l3_set() Bjorn Andersson
2022-11-11 10:26 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 05/10] dt-bindings: interconnect: Add sm8350, sc8280xp and generic OSM L3 compatibles Bjorn Andersson
2022-11-11 8:36 ` Krzysztof Kozlowski
2022-11-11 10:32 ` Sibi Sankar
2022-11-11 18:08 ` Bjorn Andersson
2022-11-16 6:56 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 06/10] arm64: dts: qcom: Align with generic osm-l3/epss-l3 Bjorn Andersson
2022-11-11 10:44 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 07/10] arm64: dts: qcom: sc8280xp: Add epss_l3 node Bjorn Andersson
2022-11-11 10:33 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 08/10] arm64: dts: qcom: sc8280xp: Set up L3 scaling Bjorn Andersson
2022-11-16 11:01 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 09/10] dt-bindings: interconnect: qcom,msm8998-bwmon: Add sc8280xp bwmon instances Bjorn Andersson
2022-11-11 8:35 ` Krzysztof Kozlowski
2022-11-11 10:53 ` Sibi Sankar
2022-11-11 3:25 ` [PATCH v2 10/10] arm64: dts: qcom: sc8280xp: Add " Bjorn Andersson
2022-11-11 11:03 ` Sibi Sankar
2022-11-17 16:25 ` [PATCH v2 00/10] interconnect: osm-l3: SC8280XP L3 and DDR scaling Georgi Djakov
2022-12-06 18:19 ` (subset) " Bjorn Andersson
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