Linux ARM-MSM sub-architecture
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From: Qiang Yu <quic_qianyu@quicinc.com>
To: Johan Hovold <johan@kernel.org>,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: <vkoul@kernel.org>, <kishon@kernel.org>, <robh@kernel.org>,
	<andersson@kernel.org>, <konradybcio@kernel.org>,
	<krzk+dt@kernel.org>, <conor+dt@kernel.org>,
	<mturquette@baylibre.com>, <sboyd@kernel.org>,
	<abel.vesa@linaro.org>, <quic_msarkar@quicinc.com>,
	<quic_devipriy@quicinc.com>, <dmitry.baryshkov@linaro.org>,
	<kw@linux.com>, <lpieralisi@kernel.org>,
	<neil.armstrong@linaro.org>, <linux-arm-msm@vger.kernel.org>,
	<linux-phy@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-pci@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-clk@vger.kernel.org>, <johan+linaro@kernel.org>,
	<stable@vger.kernel.org>
Subject: Re: [PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID mapping config for X1E80100 SoC
Date: Wed, 30 Oct 2024 15:56:42 +0800	[thread overview]
Message-ID: <58e5dbbf-7c35-49ae-b2ff-954fc0e3fe48@quicinc.com> (raw)
In-Reply-To: <ZyHjSCWGYLDu27ys@hovoldconsulting.com>


On 10/30/2024 3:42 PM, Johan Hovold wrote:
> On Wed, Oct 30, 2024 at 12:48:51PM +0530, Manivannan Sadhasivam wrote:
>> On Wed, Oct 30, 2024 at 08:15:05AM +0100, Johan Hovold wrote:
>>> Also, are there any Qualcomm platforms that actually support L0s?
>>> Perhaps we should just disable it everywhere?
>> Most of the mobile chipsets from Qcom support L0s. It is not supported only on
>> the compute ones. So we cannot disable it everywhere.
>>
>> Again, it is not the hw issue but the PHY init sequence not tuned support L0s.
> Right, this should be mentioned in the commit message.
OK, I got it. Will write this into commit message.

Thanks,
Qiang Yu
>
> Johan

  reply	other threads:[~2024-10-30  7:57 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-17  3:04 [PATCH v7 0/7] Add support for PCIe3 on x1e80100 Qiang Yu
2024-10-17  3:04 ` [PATCH v7 1/7] dt-bindings: phy: qcom,sc8280xp-qmp-pcie-phy: Document the X1E80100 QMP PCIe PHY Gen4 x8 Qiang Yu
2024-10-17  3:04 ` [PATCH v7 2/7] dt-bindings: PCI: qcom: Move OPP table to qcom,pcie-common.yaml Qiang Yu
2024-10-17  3:04 ` [PATCH v7 3/7] dt-bindings: PCI: qcom,pcie-x1e80100: Add 'global' interrupt Qiang Yu
2024-10-17  7:58   ` Krzysztof Kozlowski
2024-10-17  3:04 ` [PATCH v7 4/7] phy: qcom: qmp: Add phy register and clk setting for x1e80100 PCIe3 Qiang Yu
2024-10-17  3:04 ` [PATCH v7 5/7] PCI: qcom: Remove BDF2SID mapping config for SC8280X family SoC Qiang Yu
2024-10-18 13:51   ` Johan Hovold
2024-10-24  6:39     ` Qiang Yu
2024-10-17  3:04 ` [PATCH v7 6/7] PCI: qcom: Disable ASPM L0s and remove BDF2SID mapping config for X1E80100 SoC Qiang Yu
2024-10-18 14:06   ` Johan Hovold
2024-10-24  6:42     ` Qiang Yu
2024-10-30  5:54       ` Qiang Yu
2024-10-30  7:15         ` Johan Hovold
2024-10-30  7:18           ` Manivannan Sadhasivam
2024-10-30  7:42             ` Johan Hovold
2024-10-30  7:56               ` Qiang Yu [this message]
2024-10-18 14:25   ` Bjorn Andersson
2024-10-24  6:46     ` Qiang Yu
2024-10-17  3:04 ` [PATCH v7 7/7] arm64: dts: qcom: x1e80100: Add support for PCIe3 on x1e80100 Qiang Yu
2024-10-18 14:08   ` Johan Hovold
2024-10-17 15:35 ` (subset) [PATCH v7 0/7] " Vinod Koul

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