Re: [PATCH V6 4/4] arm64: dts: qcom: sa8775p: add EPSS l3 interconnect provider

[Krzysztof Kozlowski <krzk@kernel.org>]

On 25/11/2024 18:45, Raviteja Laggyshetty wrote:
> Add Epoch Subsystem (EPSS) L3 interconnect provider node on SA8775P
> SoCs.
> Update the generic compatible for SM8250 and SC7280 SoCs to
> "qcom,epss-l3-perf" as they use PERF_STATE register for L3 scaling.
> 
> Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/sa8775p.dtsi | 19 +++++++++++++++++++
>  arch/arm64/boot/dts/qcom/sc7280.dtsi  |  2 +-
>  arch/arm64/boot/dts/qcom/sm8250.dtsi  |  2 +-
>  3 files changed, 21 insertions(+), 2 deletions(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 9f315a51a7c1..0c2bd15f9ef0 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -10,6 +10,7 @@
>  #include <dt-bindings/clock/qcom,sa8775p-gcc.h>
>  #include <dt-bindings/clock/qcom,sa8775p-gpucc.h>
>  #include <dt-bindings/dma/qcom-gpi.h>
> +#include <dt-bindings/interconnect/qcom,osm-l3.h>
>  #include <dt-bindings/interconnect/qcom,sa8775p-rpmh.h>
>  #include <dt-bindings/mailbox/qcom-ipcc.h>
>  #include <dt-bindings/firmware/qcom,scm.h>
> @@ -4282,6 +4283,15 @@ rpmhpd_opp_turbo_l1: opp-9 {
>  			};
>  		};
>  
> +		epss_l3_cl0: interconnect@18590000 {
> +			compatible = "qcom,sm8250-epss-l3",
> +				     "qcom,epss-l3-perf";
This is sa8775p, not sm8250. Wrong compatible.

Best regards,
Krzysztof