Linux ARM-MSM sub-architecture
 help / color / mirror / Atom feed
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Jishnu Prakash <quic_jprakash@quicinc.com>,
	jic23@kernel.org, robh+dt@kernel.org,
	krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org,
	agross@kernel.org, andersson@kernel.org,
	dmitry.baryshkov@linaro.org, konrad.dybcio@linaro.org,
	daniel.lezcano@linaro.org, sboyd@kernel.org,
	quic_subbaram@quicinc.com, quic_collinsd@quicinc.com,
	quic_amelende@quicinc.com, quic_kamalw@quicinc.com,
	amitk@kernel.org
Cc: lee@kernel.org, rafael@kernel.org, rui.zhang@intel.com,
	lukasz.luba@arm.com, lars@metafoo.de, quic_skakitap@quicinc.com,
	neil.armstrong@linaro.org, devicetree@vger.kernel.org,
	linux-arm-msm@vger.kernel.org, linux-iio@vger.kernel.org,
	linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org,
	cros-qcom-dts-watchers@chromium.org
Subject: Re: [PATCH V4 2/4] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC
Date: Thu, 31 Oct 2024 11:58:24 +0100	[thread overview]
Message-ID: <6daaee01-36a0-4dc5-86c7-106aabbfff4e@linaro.org> (raw)
In-Reply-To: <20241030185854.4015348-3-quic_jprakash@quicinc.com>

On 30/10/2024 19:58, Jishnu Prakash wrote:
> For the PMIC5-Gen3 type PMICs, ADC peripheral is present in HW for the
> following PMICs: PMK8550, PM8550, PM8550B and PM8550VX PMICs.
> 
> It is similar to PMIC5-Gen2, with SW communication to ADCs on all PMICs
> going through PBS(Programmable Boot Sequence) firmware through a single
> register interface. This interface is implemented on an SDAM (Shared
> Direct Access Memory) peripheral on the master PMIC PMK8550 rather
> than a dedicated ADC peripheral.
> 
> Add documentation for PMIC5 Gen3 ADC and macro definitions for ADC
> channels and virtual channels (combination of ADC channel number and
> PMIC SID number) per PMIC, to be used by clients of this device.
> 
> Co-developed-by: Anjelique Melendez <quic_amelende@quicinc.com>
> Signed-off-by: Anjelique Melendez <quic_amelende@quicinc.com>
> Signed-off-by: Jishnu Prakash <quic_jprakash@quicinc.com>
> ---

This has still test failures, so limited review follows.

>  properties:
>    compatible:
> @@ -23,14 +27,20 @@ properties:
>            - const: qcom,pms405-adc
>            - const: qcom,spmi-adc-rev2
>        - enum:
> -          - qcom,spmi-vadc
> -          - qcom,spmi-adc5
>            - qcom,spmi-adc-rev2
> +          - qcom,spmi-adc5
> +          - qcom,spmi-adc5-gen3
>            - qcom,spmi-adc7
> +          - qcom,spmi-vadc
>  
>    reg:
> -    description: VADC base address in the SPMI PMIC register map
> -    maxItems: 1
> +    description:
> +      For compatible properties "qcom,spmi-vadc", "qcom,spmi-adc5", "qcom,spmi-adc-rev2"
> +      and "qcom,spmi-adc7", reg is the VADC base address in the SPMI PMIC register map.
> +      For compatible property "qcom,spmi-adc5-gen3", each reg corresponds to an SDAM
> +      peripheral base address that is being used for ADC functionality.

This description is not really needed. You need to provide constraints
in schema.

> +    minItems: 1
> +    maxItems: 2
>  
>    '#address-cells':
>      const: 1
> @@ -38,20 +48,28 @@ properties:
>    '#size-cells':
>      const: 0
>  
> +  "#thermal-sensor-cells":
> +    const: 1
> +    description:
> +      Number of cells required to uniquely identify the thermal sensors.

Drop, redundant.

> +      For compatible property "qcom,spmi-adc5-gen3", this property is
> +      required for if any channels under it are used for ADC_TM.
> +      Since we have multiple sensors this is set to 1.

Drop sentence, redundant.

> +
>    '#io-channel-cells':
>      const: 1
>  
>    interrupts:
> -    maxItems: 1
>      description:
>        End of conversion interrupt.
> +      For compatible property "qcom,spmi-adc5-gen3", interrupts are defined
> +      for each SDAM being used.

Drop descriptions and instead rather list and describe items. You keep
repeating schema in free form text. That's not the point.

> +    minItems: 1
> +    maxItems: 2
>  
> -required:
> -  - compatible
> -  - reg
> -  - '#address-cells'
> -  - '#size-cells'
> -  - '#io-channel-cells'
> +  interrupt-names:
> +    minItems: 1
> +    maxItems: 2
>  
>  patternProperties:
>    "^channel@[0-9a-f]+$":
> @@ -71,8 +89,8 @@ patternProperties:
>          description: |
>            ADC channel number.
>            See include/dt-bindings/iio/adc/qcom,spmi-vadc.h
> -          For PMIC7 ADC, the channel numbers are specified separately per PMIC
> -          in the PMIC-specific files in include/dt-bindings/iio/adc.
> +          For PMIC7 and PMIC5 Gen3 ADC, the channel numbers are specified separately
> +          per PMIC in the PMIC-specific files in include/dt-bindings/iio/adc.
>  
>        label:
>          description: |
> @@ -113,11 +131,11 @@ patternProperties:
>                channel calibration. If property is not found, channel will be
>                calibrated with 0.625V and 1.25V reference channels, also
>                known as absolute calibration.
> -            - For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7" and
> -              "qcom,spmi-adc-rev2", if this property is specified VADC will use
> -              the VDD reference (1.875V) and GND for channel calibration. If
> -              property is not found, channel will be calibrated with 0V and 1.25V
> -              reference channels, also known as absolute calibration.
> +            - For compatible property "qcom,spmi-adc5", "qcom,spmi-adc7",
> +              "qcom,spmi-adc-rev2" and "qcom,spmi-adc5-gen3", if this property is
> +              specified VADC will use the VDD reference (1.875V) and GND for channel
> +              calibration. If property is not found, channel will be calibrated with
> +              0V and 1.25V reference channels, also known as absolute calibration.
>          type: boolean
>  
>        qcom,hw-settle-time:
> @@ -135,9 +153,24 @@ patternProperties:
>              from the ADC that is an average of multiple samples. The value
>              selected is 2^(value).
>  
> +      qcom,adc-tm:
> +        description:
> +          Indicates if ADC_TM monitoring is done on this channel.

What is "ADC_TM"? Why this would be property of a board? This does not
look like suitable for DT, at least based on such very vague explanation.

> +          Defined for compatible property "qcom,spmi-adc5-gen3".

Drop redundant.

> +          This is the same functionality as in the existing QCOM ADC_TM
> +          device, documented at devicetree/bindings/thermal/qcom-spmi-adc-tm5.yaml.

What does it mean? How property can represent functionality of entire
binding?

BTW, use full paths when refering to files.

> +        type: boolean
> +
>      required:
>        - reg
>  
> +required:
> +  - compatible
> +  - reg
> +  - '#address-cells'
> +  - '#size-cells'
> +  - '#io-channel-cells'
> +
>  allOf:
>    - if:
>        properties:
> @@ -146,6 +179,15 @@ allOf:
>              const: qcom,spmi-vadc
>  
>      then:
> +      properties:
> +        reg:
> +          minItems: 1

min is redundant.

> +          maxItems: 1
> +        interrupts:
> +          minItems: 1
> +          maxItems: 1

So here you list and describe items instead.

> +        "#thermal-sensor-cells": false
> +        interrupt-names: false

Keep things properly ordered. xxx-names is always next to xxx.

>        patternProperties:
>          "^channel@[0-9a-f]+$":
>            properties:
> @@ -162,6 +204,8 @@ allOf:
>                enum: [ 1, 2, 4, 8, 16, 32, 64, 128, 256, 512 ]
>                default: 1
>  
> +            qcom,adc-tm: false
> +
>    - if:
>        properties:
>          compatible:
> @@ -169,6 +213,15 @@ allOf:
>              const: qcom,spmi-adc-rev2
>  
>      then:
> +      properties:
> +        reg:
> +          minItems: 1
> +          maxItems: 1
> +        interrupts:
> +          minItems: 1
> +          maxItems: 1
> +        "#thermal-sensor-cells": false
> +        interrupt-names: false
>        patternProperties:
>          "^channel@[0-9a-f]+$":
>            properties:
> @@ -185,6 +238,8 @@ allOf:
>                enum: [ 1, 2, 4, 8, 16 ]
>                default: 1
>  
> +            qcom,adc-tm: false
> +
>    - if:
>        properties:
>          compatible:
> @@ -192,6 +247,15 @@ allOf:
>              const: qcom,spmi-adc5
>  
>      then:
> +      properties:
> +        reg:
> +          minItems: 1
> +          maxItems: 1
> +        interrupts:
> +          minItems: 1
> +          maxItems: 1
> +        "#thermal-sensor-cells": false
> +        interrupt-names: false
>        patternProperties:
>          "^channel@[0-9a-f]+$":
>            properties:
> @@ -208,6 +272,8 @@ allOf:
>                enum: [ 1, 2, 4, 8, 16 ]
>                default: 1
>  
> +            qcom,adc-tm: false
> +
>    - if:
>        properties:
>          compatible:
> @@ -215,6 +281,59 @@ allOf:
>              const: qcom,spmi-adc7
>  
>      then:
> +      properties:
> +        reg:
> +          minItems: 1
> +          maxItems: 1
> +        interrupts:
> +          minItems: 1
> +          maxItems: 1
> +        "#thermal-sensor-cells": false
> +        interrupt-names: false
> +      patternProperties:
> +        "^channel@[0-9a-f]+$":
> +          properties:
> +            qcom,decimation:
> +              enum: [ 85, 340, 1360 ]
> +              default: 1360
> +
> +            qcom,hw-settle-time:
> +              enum: [ 15, 100, 200, 300, 400, 500, 600, 700, 1000, 2000, 4000,
> +                      8000, 16000, 32000, 64000, 128000 ]
> +              default: 15
> +
> +            qcom,avg-samples:
> +              enum: [ 1, 2, 4, 8, 16 ]
> +              default: 1
> +
> +            qcom,adc-tm: false
> +
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: qcom,spmi-adc5-gen3
> +
> +    then:
> +      properties:
> +        reg:
> +          minItems: 1

Why this is flexible?

> +          items:
> +            - description: SDAM0 base address in the SPMI PMIC register map
> +            - description: SDAM1 base address
> +        interrupts:
> +          minItems: 1


Why this is flexible?


> +          items:
> +            - description: SDAM0 end of conversion (EOC) interrupt
> +            - description: SDAM1 EOC interrupt
> +        interrupt-names:
> +          minItems: 1
> +          items:
> +            - const: adc-sdam0

sdam0

> +            - const: adc-sdam1

sdam1

> +      required:
> +        - interrupts
> +        - interrupt-names
>        patternProperties:
>          "^channel@[0-9a-f]+$":
>            properties:
> @@ -307,3 +426,64 @@ examples:



Best regards,
Krzysztof


  parent reply	other threads:[~2024-10-31 10:58 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-10-30 18:58 [PATCH V4 0/4] Add support for QCOM SPMI PMIC5 Gen3 ADC Jishnu Prakash
2024-10-30 18:58 ` [PATCH V4 1/4] dt-bindings: iio/adc: Move QCOM ADC bindings to iio/adc folder Jishnu Prakash
2024-10-30 20:20   ` Rob Herring (Arm)
2024-11-04 10:21     ` Jishnu Prakash
2024-10-30 18:58 ` [PATCH V4 2/4] dt-bindings: iio: adc: Add support for QCOM PMIC5 Gen3 ADC Jishnu Prakash
2024-10-30 20:20   ` Rob Herring (Arm)
2024-10-31 10:58   ` Krzysztof Kozlowski [this message]
2024-11-13 14:05     ` Jishnu Prakash
2024-11-19  9:02       ` Krzysztof Kozlowski
2024-12-10  6:05         ` Jishnu Prakash
2024-10-31 17:57   ` Dmitry Baryshkov
2024-11-13 14:06     ` Jishnu Prakash
2024-11-15 16:44       ` Dmitry Baryshkov
2024-12-10  6:04         ` Jishnu Prakash
2024-10-30 18:58 ` [PATCH V4 3/4] " Jishnu Prakash
2024-10-31 11:03   ` Krzysztof Kozlowski
2024-11-13 14:06     ` Jishnu Prakash
2024-11-19  9:04       ` Krzysztof Kozlowski
2024-11-02 10:46   ` kernel test robot
2024-10-30 18:58 ` [PATCH V4 4/4] thermal: qcom: add support for PMIC5 Gen3 ADC thermal monitoring Jishnu Prakash
2024-10-31 11:00   ` Krzysztof Kozlowski
2024-11-13 14:06     ` Jishnu Prakash
2024-11-02 11:07   ` kernel test robot
2024-11-02 11:39   ` kernel test robot
2024-10-31  7:36 ` [PATCH V4 0/4] Add support for QCOM SPMI PMIC5 Gen3 ADC Krzysztof Kozlowski
2024-11-13 14:07   ` Jishnu Prakash

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=6daaee01-36a0-4dc5-86c7-106aabbfff4e@linaro.org \
    --to=krzysztof.kozlowski@linaro.org \
    --cc=agross@kernel.org \
    --cc=amitk@kernel.org \
    --cc=andersson@kernel.org \
    --cc=conor+dt@kernel.org \
    --cc=cros-qcom-dts-watchers@chromium.org \
    --cc=daniel.lezcano@linaro.org \
    --cc=devicetree@vger.kernel.org \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=jic23@kernel.org \
    --cc=konrad.dybcio@linaro.org \
    --cc=krzysztof.kozlowski+dt@linaro.org \
    --cc=lars@metafoo.de \
    --cc=lee@kernel.org \
    --cc=linux-arm-msm@vger.kernel.org \
    --cc=linux-iio@vger.kernel.org \
    --cc=linux-kernel@vger.kernel.org \
    --cc=linux-pm@vger.kernel.org \
    --cc=lukasz.luba@arm.com \
    --cc=neil.armstrong@linaro.org \
    --cc=quic_amelende@quicinc.com \
    --cc=quic_collinsd@quicinc.com \
    --cc=quic_jprakash@quicinc.com \
    --cc=quic_kamalw@quicinc.com \
    --cc=quic_skakitap@quicinc.com \
    --cc=quic_subbaram@quicinc.com \
    --cc=rafael@kernel.org \
    --cc=robh+dt@kernel.org \
    --cc=rui.zhang@intel.com \
    --cc=sboyd@kernel.org \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox