Re: [PATCH 2/4] arm: dts: qcom: qdu1000: Add SDHCI node

[Komal Bajaj <quic_kbajaj@quicinc.com>]

On 5/19/2023 3:35 PM, Bhupesh Sharma wrote:
> Hi Komal,
>
> On 5/19/23 2:21 PM, Komal Bajaj wrote:
>> Add sdhc node for eMMC on QDU1000 and QRU1000 SoCs.
>>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qdu1000.dtsi | 60 +++++++++++++++++++++++++++
>>   1 file changed, 60 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi 
>> b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> index 734438113bba..6113def66a08 100644
>> --- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
>> @@ -19,6 +19,10 @@
>>
>>       chosen: chosen { };
>>
>> +    aliases {
>> +        mmc0 = &sdhc_1; /*SDC1 eMMC slot*/
>
> Please use the right comment formats /* text */
> Also, just /* eMMC */ would be fine here.
Sure, will keep just /* eMMC */ in comments.
>
>> +    };
>> +
>>       cpus {
>>           #address-cells = <2>;
>>           #size-cells = <0>;
>> @@ -842,6 +846,62 @@
>>               #hwlock-cells = <1>;
>>           };
>>
>> +        sdhc_1: mmc@8804000 {
>> +            compatible = "qcom,qdu1000-sdhci", "qcom,sdhci-msm-v5";
>> +            reg = <0x0 0x08804000 0x0 0x1000>,
>> +                  <0x0 0x08805000 0x0 0x1000>;
>> +
>> +            reg-names = "hc", "cqhci";
>> +
>> +            interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>,
>> +                     <GIC_SPI 223 IRQ_TYPE_LEVEL_HIGH>;
>> +            interrupt-names = "hc_irq", "pwr_irq";
>> +
>> +            clocks = <&gcc GCC_SDCC5_AHB_CLK>,
>> +                 <&gcc GCC_SDCC5_APPS_CLK>,
>> +                 <&rpmhcc RPMH_CXO_CLK>;
>> +            clock-names = "iface", "core", "xo";
>> +
>> +            /* Add dt entry for gcc hw reset */
>
> Please drop the comment above - it's not needed.
Noted. Will remove it in the next patch set.
>
>> +            resets = <&gcc GCC_SDCC5_BCR>;
>> +
>> +            interconnects = <&system_noc MASTER_SDCC_1 0 &mc_virt 
>> SLAVE_EBI1 0>,
>> +                    <&gem_noc MASTER_APPSS_PROC 0 &system_noc 
>> SLAVE_SDCC_2 0>;
>> +            interconnect-names = "sdhc-ddr", "cpu-sdhc";
>> +            power-domains = <&rpmhpd QDU1000_CX>;
>> +            operating-points-v2 = <&sdhc1_opp_table>;
>> +
>> +            iommus = <&apps_smmu 0x0080 0x0>;
>> +            dma-coherent;
>> +
>> +            bus-width = <8>;
>> +            non-removable;
>> +            supports-cqe;
>> +
>> +            no-sd;
>> +            no-sd;
>
> Can we club the following 3 together:
> non-removable;
> no-sd;
> no-sd;
>
> And normally these is a part of board file (.dts), right?
Sure, will move these to board file.

Thanks
Komal
>
> Thanks,
> Bhupesh
>
>> +            mmc-ddr-1_8v;
>> +            mmc-hs200-1_8v;
>> +            mmc-hs400-1_8v;
>> +            mmc-hs400-enhanced-strobe;
>> +            cap-mmc-hw-reset;
>> +
>> +            qcom,dll-config = <0x0007642c>;
>> +            qcom,ddr-config = <0x80040868>;
>> +
>> +            status = "disabled";
>> +
>> +            sdhc1_opp_table: opp-table {
>> +                compatible = "operating-points-v2";
>> +
>> +                opp-384000000 {
>> +                    opp-hz = /bits/ 64 <384000000>;
>> +                    required-opps = <&rpmhpd_opp_min_svs>;
>> +                };
>> +            };
>> +        };
>> +
>>           pdc: interrupt-controller@b220000 {
>>               compatible = "qcom,qdu1000-pdc", "qcom,pdc";
>>               reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 
>> 0x64>;
>> -- 
>> 2.17.1
>>