* [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk
@ 2026-03-07 11:12 Pengyu Luo
2026-03-07 11:12 ` [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel Pengyu Luo
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Pengyu Luo @ 2026-03-07 11:12 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter
Cc: Pengyu Luo, linux-arm-msm, dri-devel, freedreno, linux-kernel
mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
not be the uncompressed data size. use src bpc * 3 to get src bpp,
this aligns with pclk rate calculation.
Fixes: ac47870fd795 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index e8e83ee61e..7c16216e8b 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1030,7 +1030,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
*/
h_total -= hdisplay;
if (wide_bus_enabled)
- bits_per_pclk = mipi_dsi_pixel_format_to_bpp(msm_host->format);
+ bits_per_pclk = dsc->bits_per_component * 3;
else
bits_per_pclk = 24;
--
2.53.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel
2026-03-07 11:12 [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Pengyu Luo
@ 2026-03-07 11:12 ` Pengyu Luo
2026-03-29 18:04 ` Marijn Suijten
2026-03-20 1:48 ` [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Dmitry Baryshkov
2026-03-27 19:47 ` Dmitry Baryshkov
2 siblings, 1 reply; 8+ messages in thread
From: Pengyu Luo @ 2026-03-07 11:12 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter
Cc: Pengyu Luo, linux-arm-msm, dri-devel, freedreno, linux-kernel
ac47870fd795 incorrecly broke hdisplay calculation for CMD mode, fix
it.
Fixes: ac47870fd795 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
---
drivers/gpu/drm/msm/dsi/dsi_host.c | 15 ++++++++++-----
1 file changed, 10 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
index 7c16216e8b..f63165c7ce 100644
--- a/drivers/gpu/drm/msm/dsi/dsi_host.c
+++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
@@ -1016,8 +1016,9 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
/*
* DPU sends 3 bytes per pclk cycle to DSI. If widebus is
* enabled, MDP always sends out 48-bit compressed data per
- * pclk and on average, DSI consumes an amount of compressed
- * data equivalent to the uncompressed pixel depth per pclk.
+ * pclk and on average, for video mode, DSI consumes only an
+ * amount of compressed data equivalent to the uncompressed
+ * pixel depth per pclk.
*
* Calculate the number of pclks needed to transmit one line of
* the compressed data.
@@ -1029,10 +1030,14 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
* unused anyway.
*/
h_total -= hdisplay;
- if (wide_bus_enabled)
- bits_per_pclk = dsc->bits_per_component * 3;
- else
+ if (wide_bus_enabled) {
+ if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO)
+ bits_per_pclk = dsc->bits_per_component * 3;
+ else
+ bits_per_pclk = 48;
+ } else {
bits_per_pclk = 24;
+ }
hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc) * 8, bits_per_pclk);
--
2.53.0
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk
2026-03-07 11:12 [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Pengyu Luo
2026-03-07 11:12 ` [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel Pengyu Luo
@ 2026-03-20 1:48 ` Dmitry Baryshkov
2026-03-20 11:11 ` Pengyu Luo
2026-03-27 19:47 ` Dmitry Baryshkov
2 siblings, 1 reply; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-03-20 1:48 UTC (permalink / raw)
To: Pengyu Luo
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
linux-arm-msm, dri-devel, freedreno, linux-kernel
On Sat, Mar 07, 2026 at 07:12:48PM +0800, Pengyu Luo wrote:
> mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
> not be the uncompressed data size. use src bpc * 3 to get src bpp,
> this aligns with pclk rate calculation.
>
> Fixes: ac47870fd795 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Pengyu, what is your target platform?
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index e8e83ee61e..7c16216e8b 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -1030,7 +1030,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> */
> h_total -= hdisplay;
> if (wide_bus_enabled)
> - bits_per_pclk = mipi_dsi_pixel_format_to_bpp(msm_host->format);
> + bits_per_pclk = dsc->bits_per_component * 3;
> else
> bits_per_pclk = 24;
>
> --
> 2.53.0
>
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk
2026-03-20 1:48 ` [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Dmitry Baryshkov
@ 2026-03-20 11:11 ` Pengyu Luo
0 siblings, 0 replies; 8+ messages in thread
From: Pengyu Luo @ 2026-03-20 11:11 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
linux-arm-msm, dri-devel, freedreno, linux-kernel
On Fri, Mar 20, 2026 at 9:48 AM Dmitry Baryshkov
<dmitry.baryshkov@oss.qualcomm.com> wrote:
>
> On Sat, Mar 07, 2026 at 07:12:48PM +0800, Pengyu Luo wrote:
> > mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
> > not be the uncompressed data size. use src bpc * 3 to get src bpp,
> > this aligns with pclk rate calculation.
> >
> > Fixes: ac47870fd795 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
> > Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
> > ---
> > drivers/gpu/drm/msm/dsi/dsi_host.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
>
> Pengyu, what is your target platform?
>
SM8750, my device is lenovo legion y700 gen4, the display is a native
10-bit video mode panel.
Recently, in 10-bit input bpc/30-bit src bpp with 8-bit output
bpc/24-bit dst bpp mode, works well
on this device with some hacks to intf block. full 10-bit input and
output won't work for now.
Once I added this comment in ac47870fd795 ("drm/msm/dsi: fix hdisplay
calculation when programming dsi registers")
> DSI consumes an amount of compressed data equivalent to the uncompressed pixel depth per pclk.
This explanation is picked up from the downstream msm kernel, since
there is no public datasheet for the hardware.
And this should be the video mode case, cmd mode should consume 6
bytes. (It seems no explanation)
If we follow the downstream, then the uncompressed pixel depth per
pclk should be 3 * bits_per_component.
This is what this patch fixed.
About the test, I did it on the video mode panel, I have no cmd panel
device with dsc/widen bus enabled. And I overlooked something, I
thought
cmd panel didn't use hdisplay, then I removed the right value for the
cmd panel case, I fixed it in patch 2/2.
Best wishes,
Pengyu
> >
> > diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> > index e8e83ee61e..7c16216e8b 100644
> > --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> > +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> > @@ -1030,7 +1030,7 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> > */
> > h_total -= hdisplay;
> > if (wide_bus_enabled)
> > - bits_per_pclk = mipi_dsi_pixel_format_to_bpp(msm_host->format);
> > + bits_per_pclk = dsc->bits_per_component * 3;
> > else
> > bits_per_pclk = 24;
> >
> > --
> > 2.53.0
> >
>
> --
> With best wishes
> Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk
2026-03-07 11:12 [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Pengyu Luo
2026-03-07 11:12 ` [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel Pengyu Luo
2026-03-20 1:48 ` [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Dmitry Baryshkov
@ 2026-03-27 19:47 ` Dmitry Baryshkov
2026-04-14 10:13 ` Luca Weiss
2 siblings, 1 reply; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-03-27 19:47 UTC (permalink / raw)
To: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Pengyu Luo
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
On Sat, 07 Mar 2026 19:12:48 +0800, Pengyu Luo wrote:
> mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
> not be the uncompressed data size. use src bpc * 3 to get src bpp,
> this aligns with pclk rate calculation.
Applied to msm-next, thanks!
[1/2] drm/msm/dsi: fix bits_per_pclk
https://gitlab.freedesktop.org/lumag/msm/-/commit/2d51cfb77daa
[2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel
https://gitlab.freedesktop.org/lumag/msm/-/commit/82159db4371f
Best regards,
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel
2026-03-07 11:12 ` [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel Pengyu Luo
@ 2026-03-29 18:04 ` Marijn Suijten
0 siblings, 0 replies; 8+ messages in thread
From: Marijn Suijten @ 2026-03-29 18:04 UTC (permalink / raw)
To: Pengyu Luo
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, David Airlie, Simona Vetter, linux-arm-msm, dri-devel,
freedreno, linux-kernel
On 2026-03-07 19:12:49, Pengyu Luo wrote:
> ac47870fd795 incorrecly broke hdisplay calculation for CMD mode, fix
> it.
Where's the what/how/why? This commit message explains exactly nothing while a
description is a requirement for submitting patches upstream:
https://docs.kernel.org/process/submitting-patches.html#describe-your-changes
Take my version of this patch as an example.
>
> Fixes: ac47870fd795 ("drm/msm/dsi: fix hdisplay calculation when programming dsi registers")
> Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
> ---
> drivers/gpu/drm/msm/dsi/dsi_host.c | 15 ++++++++++-----
> 1 file changed, 10 insertions(+), 5 deletions(-)
>
> diff --git a/drivers/gpu/drm/msm/dsi/dsi_host.c b/drivers/gpu/drm/msm/dsi/dsi_host.c
> index 7c16216e8b..f63165c7ce 100644
> --- a/drivers/gpu/drm/msm/dsi/dsi_host.c
> +++ b/drivers/gpu/drm/msm/dsi/dsi_host.c
> @@ -1016,8 +1016,9 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> /*
> * DPU sends 3 bytes per pclk cycle to DSI. If widebus is
> * enabled, MDP always sends out 48-bit compressed data per
> - * pclk and on average, DSI consumes an amount of compressed
> - * data equivalent to the uncompressed pixel depth per pclk.
> + * pclk and on average, for video mode, DSI consumes only an
> + * amount of compressed data equivalent to the uncompressed
> + * pixel depth per pclk.
This needs a source and justification (in the commit message). For most
panels where bpc is simply 8, the resulting rate is the same as when widebus is
disabled, meaning that widebus has no effect on the pclk rate in video-mode?
- Marijn
> *
> * Calculate the number of pclks needed to transmit one line of
> * the compressed data.
> @@ -1029,10 +1030,14 @@ static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi)
> * unused anyway.
> */
> h_total -= hdisplay;
> - if (wide_bus_enabled)
> - bits_per_pclk = dsc->bits_per_component * 3;
> - else
> + if (wide_bus_enabled) {
> + if (msm_host->mode_flags & MIPI_DSI_MODE_VIDEO)
> + bits_per_pclk = dsc->bits_per_component * 3;
> + else
> + bits_per_pclk = 48;
> + } else {
> bits_per_pclk = 24;
> + }
>
> hdisplay = DIV_ROUND_UP(msm_dsc_get_bytes_per_line(msm_host->dsc) * 8, bits_per_pclk);
>
> --
> 2.53.0
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk
2026-03-27 19:47 ` Dmitry Baryshkov
@ 2026-04-14 10:13 ` Luca Weiss
2026-04-14 18:11 ` Dmitry Baryshkov
0 siblings, 1 reply; 8+ messages in thread
From: Luca Weiss @ 2026-04-14 10:13 UTC (permalink / raw)
To: Dmitry Baryshkov, Rob Clark, Dmitry Baryshkov, Abhinav Kumar,
Jessica Zhang, Sean Paul, Marijn Suijten, David Airlie,
Simona Vetter, Pengyu Luo
Cc: linux-arm-msm, dri-devel, freedreno, linux-kernel
Hi all,
On Fri Mar 27, 2026 at 8:47 PM CET, Dmitry Baryshkov wrote:
> On Sat, 07 Mar 2026 19:12:48 +0800, Pengyu Luo wrote:
>> mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
>> not be the uncompressed data size. use src bpc * 3 to get src bpp,
>> this aligns with pclk rate calculation.
>
> Applied to msm-next, thanks!
>
> [1/2] drm/msm/dsi: fix bits_per_pclk
> https://gitlab.freedesktop.org/lumag/msm/-/commit/2d51cfb77daa
> [2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel
> https://gitlab.freedesktop.org/lumag/msm/-/commit/82159db4371f
Just wanna document this somewhere, 7.0 is quite broken on QCM6490
Fairphone 5 (8-bit cmd mode panel).
Picking these two patches plus "drm/msm/dpu: don't try using 2 LMs if
only one DSC is available" on top of 7.0 makes display work again.
Regards
Luca
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk
2026-04-14 10:13 ` Luca Weiss
@ 2026-04-14 18:11 ` Dmitry Baryshkov
0 siblings, 0 replies; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-04-14 18:11 UTC (permalink / raw)
To: Luca Weiss
Cc: Rob Clark, Dmitry Baryshkov, Abhinav Kumar, Jessica Zhang,
Sean Paul, Marijn Suijten, David Airlie, Simona Vetter,
Pengyu Luo, linux-arm-msm, dri-devel, freedreno, linux-kernel
On Tue, Apr 14, 2026 at 12:13:45PM +0200, Luca Weiss wrote:
> Hi all,
>
> On Fri Mar 27, 2026 at 8:47 PM CET, Dmitry Baryshkov wrote:
> > On Sat, 07 Mar 2026 19:12:48 +0800, Pengyu Luo wrote:
> >> mipi_dsi_pixel_format_to_bpp return dst bpp not src bpp, dst bpp may
> >> not be the uncompressed data size. use src bpc * 3 to get src bpp,
> >> this aligns with pclk rate calculation.
> >
> > Applied to msm-next, thanks!
> >
> > [1/2] drm/msm/dsi: fix bits_per_pclk
> > https://gitlab.freedesktop.org/lumag/msm/-/commit/2d51cfb77daa
> > [2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel
> > https://gitlab.freedesktop.org/lumag/msm/-/commit/82159db4371f
>
> Just wanna document this somewhere, 7.0 is quite broken on QCM6490
> Fairphone 5 (8-bit cmd mode panel).
>
> Picking these two patches plus "drm/msm/dpu: don't try using 2 LMs if
> only one DSC is available" on top of 7.0 makes display work again.
Yep. It was a bit too late for 7.0, so the plan (and hope) is for them
to be picked up into 7.0-stable.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-04-14 18:11 UTC | newest]
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2026-03-07 11:12 [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Pengyu Luo
2026-03-07 11:12 ` [PATCH 2/2] drm/msm/dsi: fix hdisplay calculation for CMD mode panel Pengyu Luo
2026-03-29 18:04 ` Marijn Suijten
2026-03-20 1:48 ` [PATCH 1/2] drm/msm/dsi: fix bits_per_pclk Dmitry Baryshkov
2026-03-20 11:11 ` Pengyu Luo
2026-03-27 19:47 ` Dmitry Baryshkov
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