Re: [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink

[Johan Hovold <johan@kernel.org>]

On Wed, Feb 08, 2023 at 05:13:23PM -0800, Bjorn Andersson wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
> 
> The SC8280XP CRD control over battery management and its two USB Type-C
> port using pmic_glink and two GPIO-based SBU muxes.
> 
> Enable the two DisplayPort instances, GPIO SBU mux instance and
> pmic_glink with the two connectors on the CRD.
> 
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
> 
> Changes since v1:
> - Fixed style and property sort issues
> - Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here
> - Added pinconf properties to SBU control pins
> 
>  arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 200 +++++++++++++++++++++-
>  arch/arm64/boot/dts/qcom/sc8280xp.dtsi    |   9 +
>  2 files changed, 207 insertions(+), 2 deletions(-)

> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index fcd393444f47..0495361fc0fd 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 {
>  				iommus = <&apps_smmu 0x820 0x0>;
>  				phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
>  				phy-names = "usb2-phy", "usb3-phy";
> +
> +				port {
> +					usb_0_role_switch: endpoint {
> +					};
> +				};
>  			};
>  		};
>  
> @@ -3095,6 +3100,10 @@ usb_1_dwc3: usb@a800000 {
>  				iommus = <&apps_smmu 0x860 0x0>;
>  				phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
>  				phy-names = "usb2-phy", "usb3-phy";

Nit: Add a newline before the child node here.

> +				port {
> +					usb_1_role_switch: endpoint {
> +					};
> +				};
>  			};
>  		};

Johan