* [PATCH v2 1/4] arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks
2023-02-09 1:13 [PATCH v2 0/4] arm64: dts: qcom: sc8280xp: Enable external display Bjorn Andersson
@ 2023-02-09 1:13 ` Bjorn Andersson
2023-02-09 1:13 ` [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink Bjorn Andersson
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Bjorn Andersson @ 2023-02-09 1:13 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Add the two DisplayPort controllers that are attached to QMP phys for
providing display output on USB Type-C.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
Changes since v1:
- None
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 170 ++++++++++++++++++++++++-
1 file changed, 166 insertions(+), 4 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index dceb7eb3106b..fcd393444f47 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -3155,6 +3155,20 @@ ports {
#address-cells = <1>;
#size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ mdss0_intf0_out: endpoint {
+ remote-endpoint = <&mdss0_dp0_in>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ mdss0_intf4_out: endpoint {
+ remote-endpoint = <&mdss0_dp1_in>;
+ };
+ };
+
port@5 {
reg = <5>;
mdss0_intf5_out: endpoint {
@@ -3199,6 +3213,154 @@ opp-600000000 {
};
};
+ mdss0_dp0: displayport-controller@ae90000 {
+ compatible = "qcom,sc8280xp-dp";
+ reg = <0 0xae90000 0 0x200>,
+ <0 0xae90200 0 0x200>,
+ <0 0xae90400 0 0x600>,
+ <0 0xae91000 0 0x400>,
+ <0 0xae91400 0 0x400>;
+ interrupt-parent = <&mdss0>;
+ interrupts = <12>;
+ clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_AUX_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_INTF_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK>;
+ clock-names = "core_iface", "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface", "stream_pixel";
+
+ assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX0_LINK_CLK_SRC>,
+ <&dispcc0 DISP_CC_MDSS_DPTX0_PIXEL0_CLK_SRC>;
+ assigned-clock-parents = <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+
+ phys = <&usb_0_qmpphy QMP_USB43DP_DP_PHY>;
+ phy-names = "dp";
+
+ #sound-dai-cells = <0>;
+
+ operating-points-v2 = <&mdss0_dp0_opp_table>;
+ power-domains = <&rpmhpd SC8280XP_CX>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ mdss0_dp0_in: endpoint {
+ remote-endpoint = <&mdss0_intf0_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+
+ mdss0_dp0_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
+ mdss0_dp1: displayport-controller@ae98000 {
+ compatible = "qcom,sc8280xp-dp";
+ reg = <0 0xae98000 0 0x200>,
+ <0 0xae98200 0 0x200>,
+ <0 0xae98400 0 0x600>,
+ <0 0xae99000 0 0x400>,
+ <0 0xae99400 0 0x400>;
+ interrupt-parent = <&mdss0>;
+ interrupts = <13>;
+ clocks = <&dispcc0 DISP_CC_MDSS_AHB_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_AUX_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_INTF_CLK>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK>;
+ clock-names = "core_iface", "core_aux",
+ "ctrl_link",
+ "ctrl_link_iface", "stream_pixel";
+
+ assigned-clocks = <&dispcc0 DISP_CC_MDSS_DPTX1_LINK_CLK_SRC>,
+ <&dispcc0 DISP_CC_MDSS_DPTX1_PIXEL0_CLK_SRC>;
+ assigned-clock-parents = <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>;
+
+ phys = <&usb_1_qmpphy QMP_USB43DP_DP_PHY>;
+ phy-names = "dp";
+
+ #sound-dai-cells = <0>;
+
+ operating-points-v2 = <&mdss0_dp1_opp_table>;
+ power-domains = <&rpmhpd SC8280XP_CX>;
+
+ status = "disabled";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ mdss0_dp1_in: endpoint {
+ remote-endpoint = <&mdss0_intf4_out>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ };
+ };
+
+ mdss0_dp1_opp_table: opp-table {
+ compatible = "operating-points-v2";
+
+ opp-160000000 {
+ opp-hz = /bits/ 64 <160000000>;
+ required-opps = <&rpmhpd_opp_low_svs>;
+ };
+
+ opp-270000000 {
+ opp-hz = /bits/ 64 <270000000>;
+ required-opps = <&rpmhpd_opp_svs>;
+ };
+
+ opp-540000000 {
+ opp-hz = /bits/ 64 <540000000>;
+ required-opps = <&rpmhpd_opp_svs_l1>;
+ };
+
+ opp-810000000 {
+ opp-hz = /bits/ 64 <810000000>;
+ required-opps = <&rpmhpd_opp_nom>;
+ };
+ };
+ };
+
mdss0_dp2: displayport-controller@ae9a000 {
compatible = "qcom,sc8280xp-dp";
reg = <0 0xae9a000 0 0x200>,
@@ -3387,10 +3549,10 @@ dispcc0: clock-controller@af00000 {
clocks = <&gcc GCC_DISP_AHB_CLK>,
<&rpmhcc RPMH_CXO_CLK>,
<&sleep_clk>,
- <0>,
- <0>,
- <0>,
- <0>,
+ <&usb_0_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_0_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_LINK_CLK>,
+ <&usb_1_qmpphy QMP_USB43DP_DP_VCO_DIV_CLK>,
<&mdss0_dp2_phy 0>,
<&mdss0_dp2_phy 1>,
<&mdss0_dp3_phy 0>,
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink
2023-02-09 1:13 [PATCH v2 0/4] arm64: dts: qcom: sc8280xp: Enable external display Bjorn Andersson
2023-02-09 1:13 ` [PATCH v2 1/4] arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks Bjorn Andersson
@ 2023-02-09 1:13 ` Bjorn Andersson
2023-02-13 12:39 ` Johan Hovold
2023-02-09 1:13 ` [PATCH v2 3/4] arm64: dts: qcom: sc8280xp-x13s: Enable external display Bjorn Andersson
2023-02-09 1:13 ` [PATCH v2 4/4] arm64: defconfig: Enable DisplayPort on SC8280XP laptops Bjorn Andersson
3 siblings, 1 reply; 8+ messages in thread
From: Bjorn Andersson @ 2023-02-09 1:13 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
From: Bjorn Andersson <bjorn.andersson@linaro.org>
The SC8280XP CRD control over battery management and its two USB Type-C
port using pmic_glink and two GPIO-based SBU muxes.
Enable the two DisplayPort instances, GPIO SBU mux instance and
pmic_glink with the two connectors on the CRD.
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
Changes since v1:
- Fixed style and property sort issues
- Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here
- Added pinconf properties to SBU control pins
arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 200 +++++++++++++++++++++-
arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 9 +
2 files changed, 207 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
index 3f116a879e22..d2276b28b5db 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
@@ -36,6 +36,78 @@ chosen {
stdout-path = "serial0:115200n8";
};
+ pmic-glink {
+ compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pmic_glink_con0_hs: endpoint {
+ remote-endpoint = <&usb_0_role_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pmic_glink_con0_ss: endpoint {
+ remote-endpoint = <&mdss0_dp0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ pmic_glink_con0_sbu: endpoint {
+ remote-endpoint = <&usb0_sbu_mux>;
+ };
+ };
+ };
+ };
+
+ connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ pmic_glink_con1_hs: endpoint {
+ remote-endpoint = <&usb_1_role_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pmic_glink_con1_ss: endpoint {
+ remote-endpoint = <&mdss0_dp1_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ pmic_glink_con1_sbu: endpoint {
+ remote-endpoint = <&usb1_sbu_mux>;
+ };
+ };
+ };
+ };
+ };
+
vreg_edp_3p3: regulator-edp-3p3 {
compatible = "regulator-fixed";
@@ -139,6 +211,46 @@ linux,cma {
linux,cma-default;
};
};
+
+ usb0-sbu-mux {
+ compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+ enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+ select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_sbu_default>;
+
+ mode-switch;
+ orientation-switch;
+ svid = /bits/ 16 <0xff01>;
+
+ port {
+ usb0_sbu_mux: endpoint {
+ remote-endpoint = <&pmic_glink_con0_sbu>;
+ };
+ };
+ };
+
+ usb1-sbu-mux {
+ compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+ enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+ select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb1_sbu_default>;
+
+ mode-switch;
+ orientation-switch;
+ svid = /bits/ 16 <0xff01>;
+
+ port {
+ usb1_sbu_mux: endpoint {
+ remote-endpoint = <&pmic_glink_con1_sbu>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -262,6 +374,34 @@ &mdss0 {
status = "okay";
};
+&mdss0_dp0 {
+ data-lanes = <0 1>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss0_dp0_out: endpoint {
+ remote-endpoint = <&pmic_glink_con0_ss>;
+ };
+ };
+ };
+};
+
+&mdss0_dp1 {
+ data-lanes = <0 1>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss0_dp1_out: endpoint {
+ remote-endpoint = <&pmic_glink_con1_ss>;
+ };
+ };
+ };
+};
+
&mdss0_dp3 {
compatible = "qcom,sc8280xp-edp";
/delete-property/ #sound-dai-cells;
@@ -480,7 +620,6 @@ &usb_0 {
};
&usb_0_dwc3 {
- /* TODO: Define USB-C connector properly */
dr_mode = "host";
};
@@ -499,12 +638,15 @@ &usb_0_qmpphy {
status = "okay";
};
+&usb_0_role_switch {
+ remote-endpoint = <&pmic_glink_con0_hs>;
+};
+
&usb_1 {
status = "okay";
};
&usb_1_dwc3 {
- /* TODO: Define USB-C connector properly */
dr_mode = "host";
};
@@ -523,6 +665,10 @@ &usb_1_qmpphy {
status = "okay";
};
+&usb_1_role_switch {
+ remote-endpoint = <&pmic_glink_con1_hs>;
+};
+
&xo_board_clk {
clock-frequency = <38400000>;
};
@@ -709,4 +855,54 @@ reset-n-pins {
drive-strength = <16>;
};
};
+
+ usb0_sbu_default: usb0-sbu-state {
+ oe-n-pins {
+ pins = "gpio101";
+ function = "gpio";
+ bias-disable;
+ drive-strengh = <16>;
+ output-high;
+ };
+
+ sel-pins {
+ pins = "gpio164";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ mode-pins {
+ pins = "gpio167";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ output-high;
+ };
+ };
+
+ usb1_sbu_default: usb1-sbu-state {
+ oe-n-pins {
+ pins = "gpio48";
+ function = "gpio";
+ bias-disable;
+ drive-strengh = <16>;
+ output-high;
+ };
+
+ sel-pins {
+ pins = "gpio47";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ };
+
+ mode-pins {
+ pins = "gpio50";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ output-high;
+ };
+ };
};
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
index fcd393444f47..0495361fc0fd 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
+++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
@@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 {
iommus = <&apps_smmu 0x820 0x0>;
phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+
+ port {
+ usb_0_role_switch: endpoint {
+ };
+ };
};
};
@@ -3095,6 +3100,10 @@ usb_1_dwc3: usb@a800000 {
iommus = <&apps_smmu 0x860 0x0>;
phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
phy-names = "usb2-phy", "usb3-phy";
+ port {
+ usb_1_role_switch: endpoint {
+ };
+ };
};
};
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink
2023-02-09 1:13 ` [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink Bjorn Andersson
@ 2023-02-13 12:39 ` Johan Hovold
0 siblings, 0 replies; 8+ messages in thread
From: Johan Hovold @ 2023-02-13 12:39 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Andy Gross, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Catalin Marinas, Will Deacon, linux-arm-msm,
devicetree, linux-kernel, linux-arm-kernel
On Wed, Feb 08, 2023 at 05:13:23PM -0800, Bjorn Andersson wrote:
> From: Bjorn Andersson <bjorn.andersson@linaro.org>
>
> The SC8280XP CRD control over battery management and its two USB Type-C
> port using pmic_glink and two GPIO-based SBU muxes.
>
> Enable the two DisplayPort instances, GPIO SBU mux instance and
> pmic_glink with the two connectors on the CRD.
>
> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
>
> Changes since v1:
> - Fixed style and property sort issues
> - Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here
> - Added pinconf properties to SBU control pins
>
> arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 200 +++++++++++++++++++++-
> arch/arm64/boot/dts/qcom/sc8280xp.dtsi | 9 +
> 2 files changed, 207 insertions(+), 2 deletions(-)
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> index fcd393444f47..0495361fc0fd 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp.dtsi
> @@ -3040,6 +3040,11 @@ usb_0_dwc3: usb@a600000 {
> iommus = <&apps_smmu 0x820 0x0>;
> phys = <&usb_0_hsphy>, <&usb_0_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
> +
> + port {
> + usb_0_role_switch: endpoint {
> + };
> + };
> };
> };
>
> @@ -3095,6 +3100,10 @@ usb_1_dwc3: usb@a800000 {
> iommus = <&apps_smmu 0x860 0x0>;
> phys = <&usb_1_hsphy>, <&usb_1_qmpphy QMP_USB43DP_USB3_PHY>;
> phy-names = "usb2-phy", "usb3-phy";
Nit: Add a newline before the child node here.
> + port {
> + usb_1_role_switch: endpoint {
> + };
> + };
> };
> };
Johan
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 3/4] arm64: dts: qcom: sc8280xp-x13s: Enable external display
2023-02-09 1:13 [PATCH v2 0/4] arm64: dts: qcom: sc8280xp: Enable external display Bjorn Andersson
2023-02-09 1:13 ` [PATCH v2 1/4] arm64: dts: qcom: sc8280xp: Add USB-C-related DP blocks Bjorn Andersson
2023-02-09 1:13 ` [PATCH v2 2/4] arm64: dts: qcom: sc8280xp-crd: Introduce pmic_glink Bjorn Andersson
@ 2023-02-09 1:13 ` Bjorn Andersson
2023-02-10 14:05 ` Konrad Dybcio
2023-02-09 1:13 ` [PATCH v2 4/4] arm64: defconfig: Enable DisplayPort on SC8280XP laptops Bjorn Andersson
3 siblings, 1 reply; 8+ messages in thread
From: Bjorn Andersson @ 2023-02-09 1:13 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
Like on the CRD, add the necessary nodes to enable USB Type-C
altmode-based external display on the Lenovo ThinkPad X13s.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
Changes since v1:
- Fixed style and property sort issues
- Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here
- Added pinconf properties to SBU control pins
- Dropped unused mode-pins
.../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 188 +++++++++++++++++-
1 file changed, 186 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
index f936b020a71d..923972e54eb1 100644
--- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
+++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
@@ -77,6 +77,78 @@ switch-lid {
};
};
+ pmic-glink {
+ compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ connector@0 {
+ compatible = "usb-c-connector";
+ reg = <0>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
+ pmic_glink_con0_hs: endpoint {
+ remote-endpoint = <&usb_0_role_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pmic_glink_con0_ss: endpoint {
+ remote-endpoint = <&mdss0_dp0_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ pmic_glink_con0_sbu: endpoint {
+ remote-endpoint = <&usb0_sbu_mux>;
+ };
+ };
+ };
+ };
+
+ connector@1 {
+ compatible = "usb-c-connector";
+ reg = <1>;
+ power-role = "dual";
+ data-role = "dual";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ port@0 {
+ reg = <0>;
+ pmic_glink_con1_hs: endpoint {
+ remote-endpoint = <&usb_1_role_switch>;
+ };
+ };
+
+ port@1 {
+ reg = <1>;
+ pmic_glink_con1_ss: endpoint {
+ remote-endpoint = <&mdss0_dp1_out>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ pmic_glink_con1_sbu: endpoint {
+ remote-endpoint = <&usb1_sbu_mux>;
+ };
+ };
+ };
+ };
+ };
+
vreg_edp_3p3: regulator-edp-3p3 {
compatible = "regulator-fixed";
@@ -238,6 +310,46 @@ map1 {
};
};
};
+
+ usb0-sbu-mux {
+ compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+ enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
+ select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb0_sbu_default>;
+
+ mode-switch;
+ orientation-switch;
+ svid = /bits/ 16 <0xff01>;
+
+ port {
+ usb0_sbu_mux: endpoint {
+ remote-endpoint = <&pmic_glink_con0_sbu>;
+ };
+ };
+ };
+
+ usb1-sbu-mux {
+ compatible = "pericom,pi3usb102", "gpio-sbu-mux";
+
+ enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
+ select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&usb1_sbu_default>;
+
+ mode-switch;
+ orientation-switch;
+ svid = /bits/ 16 <0xff01>;
+
+ port {
+ usb1_sbu_mux: endpoint {
+ remote-endpoint = <&pmic_glink_con1_sbu>;
+ };
+ };
+ };
};
&apps_rsc {
@@ -377,6 +489,34 @@ &mdss0 {
status = "okay";
};
+&mdss0_dp0 {
+ data-lanes = <0 1>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss0_dp0_out: endpoint {
+ remote-endpoint = <&pmic_glink_con0_ss>;
+ };
+ };
+ };
+};
+
+&mdss0_dp1 {
+ data-lanes = <0 1>;
+ status = "okay";
+
+ ports {
+ port@1 {
+ reg = <1>;
+ mdss0_dp1_out: endpoint {
+ remote-endpoint = <&pmic_glink_con1_ss>;
+ };
+ };
+ };
+};
+
&mdss0_dp3 {
compatible = "qcom,sc8280xp-edp";
@@ -871,8 +1011,13 @@ &usb_0 {
};
&usb_0_dwc3 {
- /* TODO: Define USB-C connector properly */
dr_mode = "host";
+
+ port {
+ usb_0_role_switch: endpoint {
+ remote-endpoint = <&pmic_glink_con0_hs>;
+ };
+ };
};
&usb_0_hsphy {
@@ -895,8 +1040,13 @@ &usb_1 {
};
&usb_1_dwc3 {
- /* TODO: Define USB-C connector properly */
dr_mode = "host";
+
+ port {
+ usb_1_role_switch: endpoint {
+ remote-endpoint = <&pmic_glink_con1_hs>;
+ };
+ };
};
&usb_1_hsphy {
@@ -1147,6 +1297,40 @@ reset-n-pins {
};
};
+ usb0_sbu_default: usb0-sbu-state {
+ oe-n-pins {
+ pins = "gpio101";
+ function = "gpio";
+ bias-disable;
+ drive-strengh = <16>;
+ output-high;
+ };
+
+ sel-pins {
+ pins = "gpio164";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
+ usb1_sbu_default: usb1-sbu-state {
+ oe-n-pins {
+ pins = "gpio48";
+ function = "gpio";
+ bias-disable;
+ drive-strengh = <16>;
+ output-high;
+ };
+
+ sel-pins {
+ pins = "gpio47";
+ function = "gpio";
+ bias-disable;
+ drive-strength = <16>;
+ };
+ };
+
wcd_default: wcd-default-state {
reset-pins {
pins = "gpio106";
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 3/4] arm64: dts: qcom: sc8280xp-x13s: Enable external display
2023-02-09 1:13 ` [PATCH v2 3/4] arm64: dts: qcom: sc8280xp-x13s: Enable external display Bjorn Andersson
@ 2023-02-10 14:05 ` Konrad Dybcio
0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2023-02-10 14:05 UTC (permalink / raw)
To: Bjorn Andersson, Andy Gross, Bjorn Andersson
Cc: Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
On 9.02.2023 02:13, Bjorn Andersson wrote:
> Like on the CRD, add the necessary nodes to enable USB Type-C
> altmode-based external display on the Lenovo ThinkPad X13s.
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
>
> Changes since v1:
> - Fixed style and property sort issues
> - Moved dwc3/port to sc8280xp.dtsi, override remote-endpoint here
Excuse me, but I don't see that change..
> - Added pinconf properties to SBU control pins
> - Dropped unused mode-pins
>
> .../qcom/sc8280xp-lenovo-thinkpad-x13s.dts | 188 +++++++++++++++++-
> 1 file changed, 186 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> index f936b020a71d..923972e54eb1 100644
> --- a/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> +++ b/arch/arm64/boot/dts/qcom/sc8280xp-lenovo-thinkpad-x13s.dts
> @@ -77,6 +77,78 @@ switch-lid {
> };
> };
>
> + pmic-glink {
> + compatible = "qcom,sc8280xp-pmic-glink", "qcom,pmic-glink";
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + connector@0 {
> + compatible = "usb-c-connector";
> + reg = <0>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
Add a newline before the child nodes, please.
Konrad
> + pmic_glink_con0_hs: endpoint {
> + remote-endpoint = <&usb_0_role_switch>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + pmic_glink_con0_ss: endpoint {
> + remote-endpoint = <&mdss0_dp0_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + pmic_glink_con0_sbu: endpoint {
> + remote-endpoint = <&usb0_sbu_mux>;
> + };
> + };
> + };
> + };
> +
> + connector@1 {
> + compatible = "usb-c-connector";
> + reg = <1>;
> + power-role = "dual";
> + data-role = "dual";
> +
> + ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + port@0 {
> + reg = <0>;
> + pmic_glink_con1_hs: endpoint {
> + remote-endpoint = <&usb_1_role_switch>;
> + };
> + };
> +
> + port@1 {
> + reg = <1>;
> + pmic_glink_con1_ss: endpoint {
> + remote-endpoint = <&mdss0_dp1_out>;
> + };
> + };
> +
> + port@2 {
> + reg = <2>;
> + pmic_glink_con1_sbu: endpoint {
> + remote-endpoint = <&usb1_sbu_mux>;
> + };
> + };
> + };
> + };
> + };
> +
> vreg_edp_3p3: regulator-edp-3p3 {
> compatible = "regulator-fixed";
>
> @@ -238,6 +310,46 @@ map1 {
> };
> };
> };
> +
> + usb0-sbu-mux {
> + compatible = "pericom,pi3usb102", "gpio-sbu-mux";
> +
> + enable-gpios = <&tlmm 101 GPIO_ACTIVE_LOW>;
> + select-gpios = <&tlmm 164 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb0_sbu_default>;
> +
> + mode-switch;
> + orientation-switch;
> + svid = /bits/ 16 <0xff01>;
> +
> + port {
> + usb0_sbu_mux: endpoint {
> + remote-endpoint = <&pmic_glink_con0_sbu>;
> + };
> + };
> + };
> +
> + usb1-sbu-mux {
> + compatible = "pericom,pi3usb102", "gpio-sbu-mux";
> +
> + enable-gpios = <&tlmm 48 GPIO_ACTIVE_LOW>;
> + select-gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&usb1_sbu_default>;
> +
> + mode-switch;
> + orientation-switch;
> + svid = /bits/ 16 <0xff01>;
> +
> + port {
> + usb1_sbu_mux: endpoint {
> + remote-endpoint = <&pmic_glink_con1_sbu>;
> + };
> + };
> + };
> };
>
> &apps_rsc {
> @@ -377,6 +489,34 @@ &mdss0 {
> status = "okay";
> };
>
> +&mdss0_dp0 {
> + data-lanes = <0 1>;
> + status = "okay";
> +
> + ports {
> + port@1 {
> + reg = <1>;
> + mdss0_dp0_out: endpoint {
> + remote-endpoint = <&pmic_glink_con0_ss>;
> + };
> + };
> + };
> +};
> +
> +&mdss0_dp1 {
> + data-lanes = <0 1>;
> + status = "okay";
> +
> + ports {
> + port@1 {
> + reg = <1>;
> + mdss0_dp1_out: endpoint {
> + remote-endpoint = <&pmic_glink_con1_ss>;
> + };
> + };
> + };
> +};
> +
> &mdss0_dp3 {
> compatible = "qcom,sc8280xp-edp";
>
> @@ -871,8 +1011,13 @@ &usb_0 {
> };
>
> &usb_0_dwc3 {
> - /* TODO: Define USB-C connector properly */
> dr_mode = "host";
> +
> + port {
> + usb_0_role_switch: endpoint {
> + remote-endpoint = <&pmic_glink_con0_hs>;
> + };
> + };
> };
>
> &usb_0_hsphy {
> @@ -895,8 +1040,13 @@ &usb_1 {
> };
>
> &usb_1_dwc3 {
> - /* TODO: Define USB-C connector properly */
> dr_mode = "host";
> +
> + port {
> + usb_1_role_switch: endpoint {
> + remote-endpoint = <&pmic_glink_con1_hs>;
> + };
> + };
> };
>
> &usb_1_hsphy {
> @@ -1147,6 +1297,40 @@ reset-n-pins {
> };
> };
>
> + usb0_sbu_default: usb0-sbu-state {
> + oe-n-pins {
> + pins = "gpio101";
> + function = "gpio";
> + bias-disable;
> + drive-strengh = <16>;
> + output-high;
> + };
> +
> + sel-pins {
> + pins = "gpio164";
> + function = "gpio";
> + bias-disable;
> + drive-strength = <16>;
> + };
> + };
> +
> + usb1_sbu_default: usb1-sbu-state {
> + oe-n-pins {
> + pins = "gpio48";
> + function = "gpio";
> + bias-disable;
> + drive-strengh = <16>;
> + output-high;
> + };
> +
> + sel-pins {
> + pins = "gpio47";
> + function = "gpio";
> + bias-disable;
> + drive-strength = <16>;
> + };
> + };
> +
> wcd_default: wcd-default-state {
> reset-pins {
> pins = "gpio106";
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH v2 4/4] arm64: defconfig: Enable DisplayPort on SC8280XP laptops
2023-02-09 1:13 [PATCH v2 0/4] arm64: dts: qcom: sc8280xp: Enable external display Bjorn Andersson
` (2 preceding siblings ...)
2023-02-09 1:13 ` [PATCH v2 3/4] arm64: dts: qcom: sc8280xp-x13s: Enable external display Bjorn Andersson
@ 2023-02-09 1:13 ` Bjorn Andersson
2023-02-10 14:06 ` Konrad Dybcio
3 siblings, 1 reply; 8+ messages in thread
From: Bjorn Andersson @ 2023-02-09 1:13 UTC (permalink / raw)
To: Andy Gross, Bjorn Andersson, Konrad Dybcio
Cc: Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
The QCOM_PMIC_GLINK implements the parts of a TCPM necessary for
negotiating DP altmode and the TYPEC_MUX_GPIO_SBU driver is used for
controlling connection and orientation switching of the SBU lanes in the
USB-C connector Enable these to enable USB Type-C DisplayPort on
SC8280XP laptops.
Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
---
Changes since v1:
- None
arch/arm64/configs/defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 695c4e44d241..edafb5c4b9a1 100644
--- a/arch/arm64/configs/defconfig
+++ b/arch/arm64/configs/defconfig
@@ -972,6 +972,7 @@ CONFIG_TYPEC_TPS6598X=m
CONFIG_TYPEC_HD3SS3220=m
CONFIG_TYPEC_UCSI=m
CONFIG_UCSI_CCG=m
+CONFIG_TYPEC_MUX_GPIO_SBU=m
CONFIG_MMC=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_ARMMMCI=y
@@ -1207,6 +1208,7 @@ CONFIG_QCOM_CPR=y
CONFIG_QCOM_GENI_SE=y
CONFIG_QCOM_LLCC=m
CONFIG_QCOM_OCMEM=m
+CONFIG_QCOM_PMIC_GLINK=m
CONFIG_QCOM_RMTFS_MEM=m
CONFIG_QCOM_RPMH=y
CONFIG_QCOM_RPMHPD=y
--
2.25.1
^ permalink raw reply related [flat|nested] 8+ messages in thread* Re: [PATCH v2 4/4] arm64: defconfig: Enable DisplayPort on SC8280XP laptops
2023-02-09 1:13 ` [PATCH v2 4/4] arm64: defconfig: Enable DisplayPort on SC8280XP laptops Bjorn Andersson
@ 2023-02-10 14:06 ` Konrad Dybcio
0 siblings, 0 replies; 8+ messages in thread
From: Konrad Dybcio @ 2023-02-10 14:06 UTC (permalink / raw)
To: Bjorn Andersson, Andy Gross, Bjorn Andersson
Cc: Rob Herring, Krzysztof Kozlowski, Catalin Marinas, Will Deacon,
linux-arm-msm, devicetree, linux-kernel, linux-arm-kernel
On 9.02.2023 02:13, Bjorn Andersson wrote:
> The QCOM_PMIC_GLINK implements the parts of a TCPM necessary for
> negotiating DP altmode and the TYPEC_MUX_GPIO_SBU driver is used for
> controlling connection and orientation switching of the SBU lanes in the
> USB-C connector Enable these to enable USB Type-C DisplayPort on
> SC8280XP laptops.
>
> Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Konrad
>
> Changes since v1:
> - None
>
> arch/arm64/configs/defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
> index 695c4e44d241..edafb5c4b9a1 100644
> --- a/arch/arm64/configs/defconfig
> +++ b/arch/arm64/configs/defconfig
> @@ -972,6 +972,7 @@ CONFIG_TYPEC_TPS6598X=m
> CONFIG_TYPEC_HD3SS3220=m
> CONFIG_TYPEC_UCSI=m
> CONFIG_UCSI_CCG=m
> +CONFIG_TYPEC_MUX_GPIO_SBU=m
> CONFIG_MMC=y
> CONFIG_MMC_BLOCK_MINORS=32
> CONFIG_MMC_ARMMMCI=y
> @@ -1207,6 +1208,7 @@ CONFIG_QCOM_CPR=y
> CONFIG_QCOM_GENI_SE=y
> CONFIG_QCOM_LLCC=m
> CONFIG_QCOM_OCMEM=m
> +CONFIG_QCOM_PMIC_GLINK=m
> CONFIG_QCOM_RMTFS_MEM=m
> CONFIG_QCOM_RPMH=y
> CONFIG_QCOM_RPMHPD=y
^ permalink raw reply [flat|nested] 8+ messages in thread