From: "Otto Pflüger" <otto.pflueger@abscue.de>
To: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
Cc: "Otto Pflüger" <otto.pflueger@abscue.de>,
linux-arm-msm@vger.kernel.org,
"Banajit Goswami" <bgoswami@quicinc.com>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
alsa-devel@alsa-project.org,
~postmarketos/upstreaming@lists.sr.ht
Subject: Re: [PATCH 2/3] ASoC: qcom: q6afe: check ADSP version when setting clocks
Date: Thu, 19 Oct 2023 19:27:21 +0200 [thread overview]
Message-ID: <ZTFm+ZqCH8wcIhs/@abscue.de> (raw)
In-Reply-To: <7aca4eff-edb9-2ae5-1146-68e4530f76be@linaro.org>
[...]
>
> <---
> > + port = q6afe_port_get_from_id(dev, PRIMARY_MI2S_RX);
> > + if (IS_ERR(port))
> > + return PTR_ERR(port);
> > +
> > + dcfg.i2s_cfg_minor_version = AFE_API_VERSION_I2S_CONFIG;
> > + dcfg.clk_val = freq;
> > + dcfg.clk_root = 5;
> > + ret = q6afe_set_digital_codec_core_clock(port, &dcfg);
> > +
> > + q6afe_port_put(port);
> --->
>
> Could you pl explain what are we doing in this snippet?
>
> Isn't this what is exactly done in q6afe_mi2s_set_sysclk(LPAIF_DIG_CLK...)
>
>
Yes, this is the same, except that q6afe_mi2s_set_sysclk is in
q6afe-dai.c and relies on being part of the DAI, while this is called
from q6afe-clocks.c in a context which doesn't necessarily require a DAI
to be present, e.g. if q6afe-clocks is used as a simple clock controller
without any DAIs defined in the device tree.
Setting the digital codec clock always requires a port, but it isn't
relevant which port is used here because there is usually only one
codec clock.
>
>
> > + return ret;
> > + }
> > +
> > cset.clk_set_minor_version = AFE_API_VERSION_CLOCK_SET;
> > cset.clk_id = clk_id;
> > cset.clk_freq_in_hz = freq;
> > @@ -1124,6 +1150,41 @@ int q6afe_set_lpass_clock(struct device *dev, int clk_id, int attri,
> > }
> > EXPORT_SYMBOL_GPL(q6afe_set_lpass_clock);
> ...
>
> > int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
> > int clk_src, int clk_root,
> > unsigned int freq, int dir)
> > @@ -1133,6 +1194,26 @@ int q6afe_port_set_sysclk(struct q6afe_port *port, int clk_id,
> > struct afe_digital_clk_cfg dcfg = {0,};
> > int ret;
> > + if (q6core_get_adsp_version() >= Q6_ADSP_VERSION_2_7) {
> > + /* Always use the new clock API on newer platforms. */
> > + switch (clk_id) {
> > + case LPAIF_DIG_CLK:
> > + clk_src = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
> > + clk_root = Q6AFE_LPASS_CLK_ROOT_DEFAULT;
> > + clk_id = Q6AFE_LPASS_CLK_ID_INTERNAL_DIGITAL_CODEC_CORE;
> > + break;
> > + case LPAIF_BIT_CLK:
> > + clk_src = Q6AFE_LPASS_CLK_ATTRIBUTE_COUPLE_NO;
> > + clk_root = Q6AFE_LPASS_CLK_ROOT_DEFAULT;
> > + clk_id = q6afe_get_v2_bit_clk_id(port);
> > + if (clk_id < 0)
> > + return clk_id;
> > + break;
> > + default:
> > + break;
> > + }
> > + }
>
> This should be probably done in machine driver or q6afe-dai, not in q6afe.
>
I'll put it in q6afe-dai since this fits nicely into the switch
statement in q6afe_mi2s_set_sysclk.
As stated in the cover letter, I don't think adding this to the machine
driver is the best option. The LPAIF_* clocks look simple and generic
enough to be usable by different drivers, and making those drivers care
about different clock versions in the firmware doesn't seem right.
>
> > +
> > switch (clk_id) {
> > case LPAIF_DIG_CLK:
> > dcfg.i2s_cfg_minor_version = AFE_API_VERSION_I2S_CONFIG;
next prev parent reply other threads:[~2023-10-19 17:27 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-10-14 17:26 [PATCH 0/3] ASoC: qcom: check ADSP version when setting clocks Otto Pflüger
2023-10-14 17:26 ` [PATCH 1/3] ASoC: qcom: q6core: expose ADSP core firmware version Otto Pflüger
2023-10-16 12:47 ` Mark Brown
2023-10-16 15:55 ` Otto Pflüger
2023-10-14 17:26 ` [PATCH 2/3] ASoC: qcom: q6afe: check ADSP version when setting clocks Otto Pflüger
2023-10-17 13:08 ` Srinivas Kandagatla
2023-10-19 17:27 ` Otto Pflüger [this message]
2023-10-14 17:26 ` [PATCH 3/3] ASoC: qcom: q6afe: remove "port already open" error Otto Pflüger
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