From: Bagas Sanjaya <bagasdotme@gmail.com>
To: Antonino Maniscalco <antomani103@gmail.com>,
Rob Clark <robdclark@gmail.com>, Sean Paul <sean@poorly.run>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Abhinav Kumar <quic_abhinavk@quicinc.com>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Marijn Suijten <marijn.suijten@somainline.org>,
David Airlie <airlied@gmail.com>, Daniel Vetter <daniel@ffwll.ch>,
Maarten Lankhorst <maarten.lankhorst@linux.intel.com>,
Maxime Ripard <mripard@kernel.org>,
Thomas Zimmermann <tzimmermann@suse.de>,
Jonathan Corbet <corbet@lwn.net>
Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org,
freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org,
linux-doc@vger.kernel.org
Subject: Re: [PATCH v6 11/11] Documentation: document adreno preemption
Date: Tue, 1 Oct 2024 08:10:31 +0700 [thread overview]
Message-ID: <ZvtMB14Yx5m3TzFJ@archie.me> (raw)
In-Reply-To: <20240926-preemption-a750-t-v6-11-7b6e1ef3648f@gmail.com>
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On Thu, Sep 26, 2024 at 11:16:53PM +0200, Antonino Maniscalco wrote:
> +.. SPDX-License-Identifier: GPL-2.0
> +
> +:orphan:
Why don't this be added to toctree in Documentation/gpu/index.rst?
> +
> +=============
> +MSM Preemtion
> +=============
s/Preemtion/Preemption/
> +This mechanism can be used by the kernel to switch between rings. Whenever a
> +submission occurs the kernel finds the highest priority ring which isn't empty
> +and preempts to it if said ring is not the one being currently executed. This is
> +also done whenever a submission completes to make sure execution resumes on a
> +lower priority ring when a higher priority ring is done.
Do you mean that the kernel finds highest priority ring possible that is not
empty? What if all these 4 rings are empty?
Confused...
--
An old man doll... just what I always wanted! - Clara
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next prev parent reply other threads:[~2024-10-01 1:10 UTC|newest]
Thread overview: 19+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-09-26 21:16 [PATCH v6 00/11] Preemption support for A7XX Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 01/11] drm/msm: Fix bv_fence being used as bv_rptr Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 02/11] drm/msm/a6xx: Track current_ctx_seqno per ring Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 03/11] drm/msm: Add a `preempt_record_size` field Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 04/11] drm/msm: Add CONTEXT_SWITCH_CNTL bitfields Antonino Maniscalco
2024-09-27 11:57 ` Connor Abbott
2024-09-27 15:01 ` Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 05/11] drm/msm/a6xx: Implement preemption for a7xx targets Antonino Maniscalco
2024-09-27 16:13 ` Rob Clark
2024-09-27 16:29 ` Rob Clark
2024-09-27 20:15 ` Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 06/11] drm/msm/a6xx: Sync relevant adreno_pm4.xml changes Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 07/11] drm/msm/a6xx: Use posamble to reset counters on preemption Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 08/11] drm/msm/a6xx: Add traces for preemption Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 09/11] drm/msm/a6xx: Add a flag to allow preemption to submitqueue_create Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 10/11] drm/msm/a6xx: Enable preemption for a750 Antonino Maniscalco
2024-09-26 21:16 ` [PATCH v6 11/11] Documentation: document adreno preemption Antonino Maniscalco
2024-10-01 1:10 ` Bagas Sanjaya [this message]
2024-10-01 11:18 ` Antonino Maniscalco
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