* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-07 8:48 [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650 Yuanfang Zhang
@ 2025-01-07 16:50 ` Bjorn Andersson
2025-01-08 2:13 ` Bjorn Andersson
` (2 subsequent siblings)
3 siblings, 0 replies; 8+ messages in thread
From: Bjorn Andersson @ 2025-01-07 16:50 UTC (permalink / raw)
To: Yuanfang Zhang
Cc: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
kernel, linux-arm-msm, devicetree, linux-kernel
On Tue, Jan 07, 2025 at 04:48:26PM +0800, Yuanfang Zhang wrote:
> Add coresight components: Funnel, ETE and ETF for SM8650.
>
Please adopt the expected subject style of:
"arm64: dts: qcom: <platform>[-board]: Subject"
Run "git log --oneline -- <file>" if you're uncertain how it should
look.
I'm correcting this one while applying it, no need to resend.
Thanks,
Bjorn
> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
> ---
> Changes in v4:
> - Re-sort these nodes by address.
> - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com
>
> Changes in v3:
> - Move ete0 and funnel-ete to /.
> - Update coding style.
> - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com
>
> Changes in v2:
> - Update compatible for funnel and etf.
> - remove unnecessary property: reg-names and arm,primecell-periphid.
> - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
> 1 file changed, 166 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 {
> };
> };
>
> + ete0 {
> + compatible = "arm,embedded-trace-extension";
> +
> + cpu = <&cpu0>;
> +
> + out-ports {
> + port {
> + ete0_out_funnel_ete: endpoint {
> + remote-endpoint = <&funnel_ete_in_ete0>;
> + };
> + };
> + };
> + };
> +
> + funnel-ete {
> + compatible = "arm,coresight-static-funnel";
> +
> + in-ports {
> + port {
> + funnel_ete_in_ete0: endpoint {
> + remote-endpoint = <&ete0_out_funnel_ete>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_ete_out_funnel_apss: endpoint {
> + remote-endpoint = <&funnel_apss_in_funnel_ete>;
> + };
> + };
> + };
> + };
> +
> firmware {
> scm: scm {
> compatible = "qcom,scm-sm8650", "qcom,scm";
> @@ -4854,6 +4888,138 @@ data-pins {
> };
> };
>
> + funnel@10042000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x10042000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@4 {
> + reg = <4>;
> +
> + funnel_in1_in_funnel_apss: endpoint {
> + remote-endpoint = <&funnel_apss_out_funnel_in1>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_in1_out_funnel_qdss: endpoint {
> + remote-endpoint = <&funnel_qdss_in_funnel_in1>;
> + };
> + };
> + };
> + };
> +
> + funnel@10045000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x10045000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@1 {
> + reg = <1>;
> +
> + funnel_qdss_in_funnel_in1: endpoint {
> + remote-endpoint = <&funnel_in1_out_funnel_qdss>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_qdss_out_funnel_aoss: endpoint {
> + remote-endpoint = <&funnel_aoss_in_funnel_qdss>;
> + };
> + };
> + };
> + };
> +
> + funnel@10b04000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x10b04000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@7 {
> + reg = <7>;
> +
> + funnel_aoss_in_funnel_qdss: endpoint {
> + remote-endpoint = <&funnel_qdss_out_funnel_aoss>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_aoss_out_tmc_etf: endpoint {
> + remote-endpoint = <&tmc_etf_in_funnel_aoss>;
> + };
> + };
> + };
> + };
> +
> + tmc@10b05000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> +
> + reg = <0x0 0x10b05000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + tmc_etf_in_funnel_aoss: endpoint {
> + remote-endpoint = <&funnel_aoss_out_tmc_etf>;
> + };
> + };
> + };
> + };
> +
> + funnel@13810000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x13810000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + funnel_apss_in_funnel_ete: endpoint {
> + remote-endpoint = <&funnel_ete_out_funnel_apss>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_apss_out_funnel_in1: endpoint {
> + remote-endpoint = <&funnel_in1_in_funnel_apss>;
> + };
> + };
> + };
> + };
> +
> apps_smmu: iommu@15000000 {
> compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500";
> reg = <0 0x15000000 0 0x100000>;
>
> ---
> base-commit: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4
> change-id: 20241209-sm8650-cs-dt-ad649dcfa5e8
>
> Best regards,
> --
> Yuanfang Zhang <quic_yuanfang@quicinc.com>
>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-07 8:48 [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650 Yuanfang Zhang
2025-01-07 16:50 ` Bjorn Andersson
@ 2025-01-08 2:13 ` Bjorn Andersson
2025-01-16 15:57 ` neil.armstrong
2025-01-17 11:12 ` Krzysztof Kozlowski
3 siblings, 0 replies; 8+ messages in thread
From: Bjorn Andersson @ 2025-01-08 2:13 UTC (permalink / raw)
To: Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
Yuanfang Zhang
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
On Tue, 07 Jan 2025 16:48:26 +0800, Yuanfang Zhang wrote:
> Add coresight components: Funnel, ETE and ETF for SM8650.
>
>
Applied, thanks!
[1/1] arm64: dts: qcom: Add coresight node for SM8650
commit: 256e6937e48a14cc5ea02ce9e4e0fbb4463c4464
Best regards,
--
Bjorn Andersson <andersson@kernel.org>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-07 8:48 [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650 Yuanfang Zhang
2025-01-07 16:50 ` Bjorn Andersson
2025-01-08 2:13 ` Bjorn Andersson
@ 2025-01-16 15:57 ` neil.armstrong
2025-01-17 8:20 ` Yuanfang Zhang
2025-01-17 11:12 ` Krzysztof Kozlowski
3 siblings, 1 reply; 8+ messages in thread
From: neil.armstrong @ 2025-01-16 15:57 UTC (permalink / raw)
To: Yuanfang Zhang, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
Hi,
On 07/01/2025 09:48, Yuanfang Zhang wrote:
> Add coresight components: Funnel, ETE and ETF for SM8650.
>
> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
> ---
> Changes in v4:
> - Re-sort these nodes by address.
> - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com
>
> Changes in v3:
> - Move ete0 and funnel-ete to /.
> - Update coding style.
> - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com
>
> Changes in v2:
> - Update compatible for funnel and etf.
> - remove unnecessary property: reg-names and arm,primecell-periphid.
> - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
> 1 file changed, 166 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 {
> };
> };
>
> + ete0 {
> + compatible = "arm,embedded-trace-extension";
> +
> + cpu = <&cpu0>;
> +
> + out-ports {
> + port {
> + ete0_out_funnel_ete: endpoint {
> + remote-endpoint = <&funnel_ete_in_ete0>;
> + };
> + };
> + };
> + };
Why only the cpu0 ete has been added ?
And why are the other components (TPDA, TPDM, STM, CTI...) missing ?
Neil
> +
> + funnel-ete {
> + compatible = "arm,coresight-static-funnel";
> +
> + in-ports {
> + port {
> + funnel_ete_in_ete0: endpoint {
> + remote-endpoint = <&ete0_out_funnel_ete>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_ete_out_funnel_apss: endpoint {
> + remote-endpoint = <&funnel_apss_in_funnel_ete>;
> + };
> + };
> + };
> + };
> +
> firmware {
> scm: scm {
> compatible = "qcom,scm-sm8650", "qcom,scm";
> @@ -4854,6 +4888,138 @@ data-pins {
> };
> };
>
> + funnel@10042000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x10042000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@4 {
> + reg = <4>;
> +
> + funnel_in1_in_funnel_apss: endpoint {
> + remote-endpoint = <&funnel_apss_out_funnel_in1>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_in1_out_funnel_qdss: endpoint {
> + remote-endpoint = <&funnel_qdss_in_funnel_in1>;
> + };
> + };
> + };
> + };
> +
> + funnel@10045000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x10045000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@1 {
> + reg = <1>;
> +
> + funnel_qdss_in_funnel_in1: endpoint {
> + remote-endpoint = <&funnel_in1_out_funnel_qdss>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_qdss_out_funnel_aoss: endpoint {
> + remote-endpoint = <&funnel_aoss_in_funnel_qdss>;
> + };
> + };
> + };
> + };
> +
> + funnel@10b04000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x10b04000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@7 {
> + reg = <7>;
> +
> + funnel_aoss_in_funnel_qdss: endpoint {
> + remote-endpoint = <&funnel_qdss_out_funnel_aoss>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_aoss_out_tmc_etf: endpoint {
> + remote-endpoint = <&tmc_etf_in_funnel_aoss>;
> + };
> + };
> + };
> + };
> +
> + tmc@10b05000 {
> + compatible = "arm,coresight-tmc", "arm,primecell";
> +
> + reg = <0x0 0x10b05000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + tmc_etf_in_funnel_aoss: endpoint {
> + remote-endpoint = <&funnel_aoss_out_tmc_etf>;
> + };
> + };
> + };
> + };
> +
> + funnel@13810000 {
> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
> +
> + reg = <0x0 0x13810000 0x0 0x1000>;
> +
> + clocks = <&aoss_qmp>;
> + clock-names = "apb_pclk";
> +
> + in-ports {
> + port {
> + funnel_apss_in_funnel_ete: endpoint {
> + remote-endpoint = <&funnel_ete_out_funnel_apss>;
> + };
> + };
> + };
> +
> + out-ports {
> + port {
> + funnel_apss_out_funnel_in1: endpoint {
> + remote-endpoint = <&funnel_in1_in_funnel_apss>;
> + };
> + };
> + };
> + };
> +
> apps_smmu: iommu@15000000 {
> compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500";
> reg = <0 0x15000000 0 0x100000>;
>
> ---
> base-commit: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4
> change-id: 20241209-sm8650-cs-dt-ad649dcfa5e8
>
> Best regards,
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-16 15:57 ` neil.armstrong
@ 2025-01-17 8:20 ` Yuanfang Zhang
2025-01-17 8:57 ` neil.armstrong
2025-01-17 10:17 ` Dmitry Baryshkov
0 siblings, 2 replies; 8+ messages in thread
From: Yuanfang Zhang @ 2025-01-17 8:20 UTC (permalink / raw)
To: neil.armstrong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
On 1/16/2025 11:57 PM, neil.armstrong@linaro.org wrote:
> Hi,
>
> On 07/01/2025 09:48, Yuanfang Zhang wrote:
>> Add coresight components: Funnel, ETE and ETF for SM8650.
>>
>> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
>> ---
>> Changes in v4:
>> - Re-sort these nodes by address.
>> - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com
>>
>> Changes in v3:
>> - Move ete0 and funnel-ete to /.
>> - Update coding style.
>> - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com
>>
>> Changes in v2:
>> - Update compatible for funnel and etf.
>> - remove unnecessary property: reg-names and arm,primecell-periphid.
>> - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com
>> ---
>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
>> 1 file changed, 166 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644
>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>> @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 {
>> };
>> };
>> + ete0 {
>> + compatible = "arm,embedded-trace-extension";
>> +
>> + cpu = <&cpu0>;
>> +
>> + out-ports {
>> + port {
>> + ete0_out_funnel_ete: endpoint {
>> + remote-endpoint = <&funnel_ete_in_ete0>;
>> + };
>> + };
>> + };
>> + };
>
> Why only the cpu0 ete has been added ?
>
> And why are the other components (TPDA, TPDM, STM, CTI...) missing ?
>
> Neil
>
At present, only ete0 is used, and other components can be added later if need.
>> +
>> + funnel-ete {
>> + compatible = "arm,coresight-static-funnel";
>> +
>> + in-ports {
>> + port {
>> + funnel_ete_in_ete0: endpoint {
>> + remote-endpoint = <&ete0_out_funnel_ete>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + funnel_ete_out_funnel_apss: endpoint {
>> + remote-endpoint = <&funnel_apss_in_funnel_ete>;
>> + };
>> + };
>> + };
>> + };
>> +
>> firmware {
>> scm: scm {
>> compatible = "qcom,scm-sm8650", "qcom,scm";
>> @@ -4854,6 +4888,138 @@ data-pins {
>> };
>> };
>> + funnel@10042000 {
>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>> +
>> + reg = <0x0 0x10042000 0x0 0x1000>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@4 {
>> + reg = <4>;
>> +
>> + funnel_in1_in_funnel_apss: endpoint {
>> + remote-endpoint = <&funnel_apss_out_funnel_in1>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + funnel_in1_out_funnel_qdss: endpoint {
>> + remote-endpoint = <&funnel_qdss_in_funnel_in1>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + funnel@10045000 {
>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>> +
>> + reg = <0x0 0x10045000 0x0 0x1000>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@1 {
>> + reg = <1>;
>> +
>> + funnel_qdss_in_funnel_in1: endpoint {
>> + remote-endpoint = <&funnel_in1_out_funnel_qdss>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + funnel_qdss_out_funnel_aoss: endpoint {
>> + remote-endpoint = <&funnel_aoss_in_funnel_qdss>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + funnel@10b04000 {
>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>> +
>> + reg = <0x0 0x10b04000 0x0 0x1000>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + port@7 {
>> + reg = <7>;
>> +
>> + funnel_aoss_in_funnel_qdss: endpoint {
>> + remote-endpoint = <&funnel_qdss_out_funnel_aoss>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + funnel_aoss_out_tmc_etf: endpoint {
>> + remote-endpoint = <&tmc_etf_in_funnel_aoss>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + tmc@10b05000 {
>> + compatible = "arm,coresight-tmc", "arm,primecell";
>> +
>> + reg = <0x0 0x10b05000 0x0 0x1000>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + port {
>> + tmc_etf_in_funnel_aoss: endpoint {
>> + remote-endpoint = <&funnel_aoss_out_tmc_etf>;
>> + };
>> + };
>> + };
>> + };
>> +
>> + funnel@13810000 {
>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>> +
>> + reg = <0x0 0x13810000 0x0 0x1000>;
>> +
>> + clocks = <&aoss_qmp>;
>> + clock-names = "apb_pclk";
>> +
>> + in-ports {
>> + port {
>> + funnel_apss_in_funnel_ete: endpoint {
>> + remote-endpoint = <&funnel_ete_out_funnel_apss>;
>> + };
>> + };
>> + };
>> +
>> + out-ports {
>> + port {
>> + funnel_apss_out_funnel_in1: endpoint {
>> + remote-endpoint = <&funnel_in1_in_funnel_apss>;
>> + };
>> + };
>> + };
>> + };
>> +
>> apps_smmu: iommu@15000000 {
>> compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500";
>> reg = <0 0x15000000 0 0x100000>;
>>
>> ---
>> base-commit: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4
>> change-id: 20241209-sm8650-cs-dt-ad649dcfa5e8
>>
>> Best regards,
>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-17 8:20 ` Yuanfang Zhang
@ 2025-01-17 8:57 ` neil.armstrong
2025-01-17 10:17 ` Dmitry Baryshkov
1 sibling, 0 replies; 8+ messages in thread
From: neil.armstrong @ 2025-01-17 8:57 UTC (permalink / raw)
To: Yuanfang Zhang, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
On 17/01/2025 09:20, Yuanfang Zhang wrote:
>
>
> On 1/16/2025 11:57 PM, neil.armstrong@linaro.org wrote:
>> Hi,
>>
>> On 07/01/2025 09:48, Yuanfang Zhang wrote:
>>> Add coresight components: Funnel, ETE and ETF for SM8650.
>>>
>>> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
>>> ---
>>> Changes in v4:
>>> - Re-sort these nodes by address.
>>> - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com
>>>
>>> Changes in v3:
>>> - Move ete0 and funnel-ete to /.
>>> - Update coding style.
>>> - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com
>>>
>>> Changes in v2:
>>> - Update compatible for funnel and etf.
>>> - remove unnecessary property: reg-names and arm,primecell-periphid.
>>> - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com
>>> ---
>>> arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
>>> 1 file changed, 166 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644
>>> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
>>> @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 {
>>> };
>>> };
>>> + ete0 {
>>> + compatible = "arm,embedded-trace-extension";
>>> +
>>> + cpu = <&cpu0>;
>>> +
>>> + out-ports {
>>> + port {
>>> + ete0_out_funnel_ete: endpoint {
>>> + remote-endpoint = <&funnel_ete_in_ete0>;
>>> + };
>>> + };
>>> + };
>>> + };
>>
>> Why only the cpu0 ete has been added ?
>>
>> And why are the other components (TPDA, TPDM, STM, CTI...) missing ?
>>
>> Neil
>>
> At present, only ete0 is used, and other components can be added later if need.
Hmm, ok so I added the other CPUs and I was able to trace on all cpus, so I was wondering why
at least those were not added because having only ete0 declared is quite useless.
=============><===========================================================
+ ete1 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu1>;
+
+ out-ports {
+ port {
+ ete1_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete1>;
+ };
+ };
+ };
+ };
+
+ ete2 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu2>;
+
+ out-ports {
+ port {
+ ete2_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete2>;
+ };
+ };
+ };
+ };
+
+ ete3 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu3>;
+
+ out-ports {
+ port {
+ ete3_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete3>;
+ };
+ };
+ };
+ };
+
+ ete4 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu4>;
+
+ out-ports {
+ port {
+ ete4_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete4>;
+ };
+ };
+ };
+ };
+
+ ete5 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu5>;
+
+ out-ports {
+ port {
+ ete5_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete5>;
+ };
+ };
+ };
+ };
+
+ ete6 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu6>;
+
+ out-ports {
+ port {
+ ete6_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete6>;
+ };
+ };
+ };
+ };
+
+ ete7 {
+ compatible = "arm,embedded-trace-extension";
+
+ cpu = <&cpu7>;
+
+ out-ports {
+ port {
+ ete7_out_funnel_ete: endpoint {
+ remote-endpoint = <&funnel_ete_in_ete7>;
+ };
+ };
+ };
+ };
+
funnel-ete {
compatible = "arm,coresight-static-funnel";
in-ports {
- port {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ port@0 {
+ reg = <0>;
funnel_ete_in_ete0: endpoint {
remote-endpoint = <&ete0_out_funnel_ete>;
};
};
+
+ port@1 {
+ reg = <1>;
+ funnel_ete_in_ete1: endpoint {
+ remote-endpoint = <&ete1_out_funnel_ete>;
+ };
+ };
+
+ port@2 {
+ reg = <2>;
+ funnel_ete_in_ete2: endpoint {
+ remote-endpoint = <&ete2_out_funnel_ete>;
+ };
+ };
+
+ port@3 {
+ reg = <3>;
+ funnel_ete_in_ete3: endpoint {
+ remote-endpoint = <&ete3_out_funnel_ete>;
+ };
+ };
+
+ port@4 {
+ reg = <4>;
+ funnel_ete_in_ete4: endpoint {
+ remote-endpoint = <&ete4_out_funnel_ete>;
+ };
+ };
+
+ port@5 {
+ reg = <5>;
+ funnel_ete_in_ete5: endpoint {
+ remote-endpoint = <&ete5_out_funnel_ete>;
+ };
+ };
+
+ port@6 {
+ reg = <6>;
+ funnel_ete_in_ete6: endpoint {
+ remote-endpoint = <&ete6_out_funnel_ete>;
+ };
+ };
+
+ port@7 {
+ reg = <7>;
+ funnel_ete_in_ete7: endpoint {
+ remote-endpoint = <&ete7_out_funnel_ete>;
+ };
+ };
};
=============><===========================================================
>>> +
>>> + funnel-ete {
>>> + compatible = "arm,coresight-static-funnel";
>>> +
>>> + in-ports {
>>> + port {
>>> + funnel_ete_in_ete0: endpoint {
>>> + remote-endpoint = <&ete0_out_funnel_ete>;
>>> + };
>>> + };
>>> + };
>>> +
>>> + out-ports {
>>> + port {
>>> + funnel_ete_out_funnel_apss: endpoint {
>>> + remote-endpoint = <&funnel_apss_in_funnel_ete>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> firmware {
>>> scm: scm {
>>> compatible = "qcom,scm-sm8650", "qcom,scm";
>>> @@ -4854,6 +4888,138 @@ data-pins {
>>> };
>>> };
>>> + funnel@10042000 {
>>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>>> +
>>> + reg = <0x0 0x10042000 0x0 0x1000>;
>>> +
>>> + clocks = <&aoss_qmp>;
>>> + clock-names = "apb_pclk";
>>> +
>>> + in-ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@4 {
>>> + reg = <4>;
>>> +
>>> + funnel_in1_in_funnel_apss: endpoint {
>>> + remote-endpoint = <&funnel_apss_out_funnel_in1>;
>>> + };
>>> + };
>>> + };
>>> +
>>> + out-ports {
>>> + port {
>>> + funnel_in1_out_funnel_qdss: endpoint {
>>> + remote-endpoint = <&funnel_qdss_in_funnel_in1>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> + funnel@10045000 {
>>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>>> +
>>> + reg = <0x0 0x10045000 0x0 0x1000>;
>>> +
>>> + clocks = <&aoss_qmp>;
>>> + clock-names = "apb_pclk";
>>> +
>>> + in-ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@1 {
>>> + reg = <1>;
>>> +
>>> + funnel_qdss_in_funnel_in1: endpoint {
>>> + remote-endpoint = <&funnel_in1_out_funnel_qdss>;
>>> + };
>>> + };
>>> + };
>>> +
>>> + out-ports {
>>> + port {
>>> + funnel_qdss_out_funnel_aoss: endpoint {
>>> + remote-endpoint = <&funnel_aoss_in_funnel_qdss>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> + funnel@10b04000 {
>>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>>> +
>>> + reg = <0x0 0x10b04000 0x0 0x1000>;
>>> +
>>> + clocks = <&aoss_qmp>;
>>> + clock-names = "apb_pclk";
>>> +
>>> + in-ports {
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + port@7 {
>>> + reg = <7>;
>>> +
>>> + funnel_aoss_in_funnel_qdss: endpoint {
>>> + remote-endpoint = <&funnel_qdss_out_funnel_aoss>;
>>> + };
>>> + };
>>> + };
>>> +
>>> + out-ports {
>>> + port {
>>> + funnel_aoss_out_tmc_etf: endpoint {
>>> + remote-endpoint = <&tmc_etf_in_funnel_aoss>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> + tmc@10b05000 {
>>> + compatible = "arm,coresight-tmc", "arm,primecell";
>>> +
>>> + reg = <0x0 0x10b05000 0x0 0x1000>;
>>> +
>>> + clocks = <&aoss_qmp>;
>>> + clock-names = "apb_pclk";
>>> +
>>> + in-ports {
>>> + port {
>>> + tmc_etf_in_funnel_aoss: endpoint {
>>> + remote-endpoint = <&funnel_aoss_out_tmc_etf>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> + funnel@13810000 {
>>> + compatible = "arm,coresight-dynamic-funnel", "arm,primecell";
>>> +
>>> + reg = <0x0 0x13810000 0x0 0x1000>;
>>> +
>>> + clocks = <&aoss_qmp>;
>>> + clock-names = "apb_pclk";
>>> +
>>> + in-ports {
>>> + port {
>>> + funnel_apss_in_funnel_ete: endpoint {
>>> + remote-endpoint = <&funnel_ete_out_funnel_apss>;
>>> + };
>>> + };
>>> + };
>>> +
>>> + out-ports {
>>> + port {
>>> + funnel_apss_out_funnel_in1: endpoint {
>>> + remote-endpoint = <&funnel_in1_in_funnel_apss>;
>>> + };
>>> + };
>>> + };
>>> + };
>>> +
>>> apps_smmu: iommu@15000000 {
>>> compatible = "qcom,sm8650-smmu-500", "qcom,smmu-500", "arm,mmu-500";
>>> reg = <0 0x15000000 0 0x100000>;
>>>
>>> ---
>>> base-commit: fac04efc5c793dccbd07e2d59af9f90b7fc0dca4
>>> change-id: 20241209-sm8650-cs-dt-ad649dcfa5e8
>>>
>>> Best regards,
>>
>
^ permalink raw reply [flat|nested] 8+ messages in thread* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-17 8:20 ` Yuanfang Zhang
2025-01-17 8:57 ` neil.armstrong
@ 2025-01-17 10:17 ` Dmitry Baryshkov
1 sibling, 0 replies; 8+ messages in thread
From: Dmitry Baryshkov @ 2025-01-17 10:17 UTC (permalink / raw)
To: Yuanfang Zhang
Cc: neil.armstrong, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley, kernel, linux-arm-msm,
devicetree, linux-kernel
On Fri, Jan 17, 2025 at 04:20:01PM +0800, Yuanfang Zhang wrote:
>
>
> On 1/16/2025 11:57 PM, neil.armstrong@linaro.org wrote:
> > Hi,
> >
> > On 07/01/2025 09:48, Yuanfang Zhang wrote:
> >> Add coresight components: Funnel, ETE and ETF for SM8650.
> >>
> >> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
> >> ---
> >> Changes in v4:
> >> - Re-sort these nodes by address.
> >> - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com
> >>
> >> Changes in v3:
> >> - Move ete0 and funnel-ete to /.
> >> - Update coding style.
> >> - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com
> >>
> >> Changes in v2:
> >> - Update compatible for funnel and etf.
> >> - remove unnecessary property: reg-names and arm,primecell-periphid.
> >> - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com
> >> ---
> >> arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
> >> 1 file changed, 166 insertions(+)
> >>
> >> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> >> index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644
> >> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> >> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> >> @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 {
> >> };
> >> };
> >> + ete0 {
> >> + compatible = "arm,embedded-trace-extension";
> >> +
> >> + cpu = <&cpu0>;
> >> +
> >> + out-ports {
> >> + port {
> >> + ete0_out_funnel_ete: endpoint {
> >> + remote-endpoint = <&funnel_ete_in_ete0>;
> >> + };
> >> + };
> >> + };
> >> + };
> >
> > Why only the cpu0 ete has been added ?
> >
> > And why are the other components (TPDA, TPDM, STM, CTI...) missing ?
> >
> > Neil
> >
> At present, only ete0 is used, and other components can be added later if need.
Please describe the hardware, not the usecase. If there are other trace
cells, please add them.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650
2025-01-07 8:48 [PATCH v4] arm64: dts: qcom: Add coresight node for SM8650 Yuanfang Zhang
` (2 preceding siblings ...)
2025-01-16 15:57 ` neil.armstrong
@ 2025-01-17 11:12 ` Krzysztof Kozlowski
3 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2025-01-17 11:12 UTC (permalink / raw)
To: Yuanfang Zhang, Bjorn Andersson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: kernel, linux-arm-msm, devicetree, linux-kernel
On 07/01/2025 09:48, Yuanfang Zhang wrote:
> Add coresight components: Funnel, ETE and ETF for SM8650.
>
> Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
> ---
> Changes in v4:
> - Re-sort these nodes by address.
> - Link to v3: https://lore.kernel.org/r/20250103-sm8650-cs-dt-v3-1-759a3f6a3cc8@quicinc.com
>
> Changes in v3:
> - Move ete0 and funnel-ete to /.
> - Update coding style.
> - Link to v2: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v2-1-cf24c6c9bddc@quicinc.com
>
> Changes in v2:
> - Update compatible for funnel and etf.
> - remove unnecessary property: reg-names and arm,primecell-periphid.
> - Link to v1: https://lore.kernel.org/r/20241210-sm8650-cs-dt-v1-1-269693451584@quicinc.com
> ---
> arch/arm64/boot/dts/qcom/sm8650.dtsi | 166 +++++++++++++++++++++++++++++++++++
> 1 file changed, 166 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> index 25e47505adcb790d09f1d2726386438487255824..49d6567fbd2e68b66b517d8d9180c7443f8bf611 100644
> --- a/arch/arm64/boot/dts/qcom/sm8650.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi
> @@ -365,6 +365,40 @@ cluster_sleep_1: cluster-sleep-1 {
> };
> };
>
> + ete0 {
Isn't this being changed to ete-[0-9]? I think I saw some patch for this.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread