Re: [PATCH v2 02/11] media: qcom: iris: extract common set_preset_registers function

[Dikshita Agarwal <dikshita.agarwal@oss.qualcomm.com>]

On 2/28/2026 8:56 PM, Dmitry Baryshkov wrote:
> The set_preset_registers is (currently) common to all supported devices.
> Extract it to a iris_vpu_common.c
> 

Then it can be removed from platform data and can be called directly since
as of now its common for all supported devices, this can change for a
different VPU variant eg: AR50LT and at that time it can be changed to vpu ops.

Thanks,
Dikshita
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
>  drivers/media/platform/qcom/iris/iris_platform_gen1.c |  9 ++-------
>  drivers/media/platform/qcom/iris/iris_platform_gen2.c | 13 ++++---------
>  drivers/media/platform/qcom/iris/iris_vpu_common.c    |  5 +++++
>  drivers/media/platform/qcom/iris/iris_vpu_common.h    |  2 ++
>  4 files changed, 13 insertions(+), 16 deletions(-)
> 
> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen1.c b/drivers/media/platform/qcom/iris/iris_platform_gen1.c
> index 1bbdefc48d71..a3eebcacba7b 100644
> --- a/drivers/media/platform/qcom/iris/iris_platform_gen1.c
> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen1.c
> @@ -260,11 +260,6 @@ static struct platform_inst_caps platform_inst_cap_sm8250 = {
>  	.max_operating_rate = MAXIMUM_FPS,
>  };
>  
> -static void iris_set_sm8250_preset_registers(struct iris_core *core)
> -{
> -	writel(0x0, core->reg_base + 0xB0088);
> -}
> -
>  static const struct icc_info sm8250_icc_table[] = {
>  	{ "cpu-cfg",    1000, 1000     },
>  	{ "video-mem",  1000, 15000000 },
> @@ -343,7 +338,7 @@ const struct iris_platform_data sm8250_data = {
>  	.init_hfi_response_ops = iris_hfi_gen1_response_ops_init,
>  	.get_vpu_buffer_size = iris_vpu_buf_size,
>  	.vpu_ops = &iris_vpu2_ops,
> -	.set_preset_registers = iris_set_sm8250_preset_registers,
> +	.set_preset_registers = iris_vpu_set_preset_registers,
>  	.icc_tbl = sm8250_icc_table,
>  	.icc_tbl_size = ARRAY_SIZE(sm8250_icc_table),
>  	.clk_rst_tbl = sm8250_clk_reset_table,
> @@ -397,7 +392,7 @@ const struct iris_platform_data sc7280_data = {
>  	.init_hfi_response_ops = iris_hfi_gen1_response_ops_init,
>  	.get_vpu_buffer_size = iris_vpu_buf_size,
>  	.vpu_ops = &iris_vpu2_ops,
> -	.set_preset_registers = iris_set_sm8250_preset_registers,
> +	.set_preset_registers = iris_vpu_set_preset_registers,
>  	.icc_tbl = sm8250_icc_table,
>  	.icc_tbl_size = ARRAY_SIZE(sm8250_icc_table),
>  	.bw_tbl_dec = sc7280_bw_table_dec,
> diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
> index 1f23ddb972f0..f8754451ac18 100644
> --- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c
> +++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
> @@ -756,11 +756,6 @@ static struct platform_inst_caps platform_inst_cap_sm8550 = {
>  	.max_operating_rate = MAXIMUM_FPS,
>  };
>  
> -static void iris_set_sm8550_preset_registers(struct iris_core *core)
> -{
> -	writel(0x0, core->reg_base + 0xB0088);
> -}
> -
>  static const struct icc_info sm8550_icc_table[] = {
>  	{ "cpu-cfg",    1000, 1000     },
>  	{ "video-mem",  1000, 15000000 },
> @@ -917,7 +912,7 @@ const struct iris_platform_data sm8550_data = {
>  	.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
>  	.get_vpu_buffer_size = iris_vpu_buf_size,
>  	.vpu_ops = &iris_vpu3_ops,
> -	.set_preset_registers = iris_set_sm8550_preset_registers,
> +	.set_preset_registers = iris_vpu_set_preset_registers,
>  	.icc_tbl = sm8550_icc_table,
>  	.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
>  	.clk_rst_tbl = sm8550_clk_reset_table,
> @@ -1018,7 +1013,7 @@ const struct iris_platform_data sm8650_data = {
>  	.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
>  	.get_vpu_buffer_size = iris_vpu33_buf_size,
>  	.vpu_ops = &iris_vpu33_ops,
> -	.set_preset_registers = iris_set_sm8550_preset_registers,
> +	.set_preset_registers = iris_vpu_set_preset_registers,
>  	.icc_tbl = sm8550_icc_table,
>  	.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
>  	.clk_rst_tbl = sm8650_clk_reset_table,
> @@ -1114,7 +1109,7 @@ const struct iris_platform_data sm8750_data = {
>  	.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
>  	.get_vpu_buffer_size = iris_vpu33_buf_size,
>  	.vpu_ops = &iris_vpu35_ops,
> -	.set_preset_registers = iris_set_sm8550_preset_registers,
> +	.set_preset_registers = iris_vpu_set_preset_registers,
>  	.icc_tbl = sm8550_icc_table,
>  	.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
>  	.clk_rst_tbl = sm8750_clk_reset_table,
> @@ -1212,7 +1207,7 @@ const struct iris_platform_data qcs8300_data = {
>  	.init_hfi_response_ops = iris_hfi_gen2_response_ops_init,
>  	.get_vpu_buffer_size = iris_vpu_buf_size,
>  	.vpu_ops = &iris_vpu3_ops,
> -	.set_preset_registers = iris_set_sm8550_preset_registers,
> +	.set_preset_registers = iris_vpu_set_preset_registers,
>  	.icc_tbl = sm8550_icc_table,
>  	.icc_tbl_size = ARRAY_SIZE(sm8550_icc_table),
>  	.clk_rst_tbl = sm8550_clk_reset_table,
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.c b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> index 548e5f1727fd..e07e47dc9977 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.c
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.c
> @@ -485,3 +485,8 @@ int iris_vpu_power_on(struct iris_core *core)
>  
>  	return ret;
>  }
> +
> +void iris_vpu_set_preset_registers(struct iris_core *core)
> +{
> +	writel(0x0, core->reg_base + 0xb0088);
> +}
> diff --git a/drivers/media/platform/qcom/iris/iris_vpu_common.h b/drivers/media/platform/qcom/iris/iris_vpu_common.h
> index f6dffc613b82..07728c4c72b6 100644
> --- a/drivers/media/platform/qcom/iris/iris_vpu_common.h
> +++ b/drivers/media/platform/qcom/iris/iris_vpu_common.h
> @@ -39,4 +39,6 @@ int iris_vpu35_vpu4x_power_on_controller(struct iris_core *core);
>  void iris_vpu35_vpu4x_program_bootup_registers(struct iris_core *core);
>  u64 iris_vpu3x_vpu4x_calculate_frequency(struct iris_inst *inst, size_t data_size);
>  
> +void iris_vpu_set_preset_registers(struct iris_core *core);
> +
>  #endif
>