From: Lukas Wunner <lukas@wunner.de>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Cc: bhelgaas@google.com, lpieralisi@kernel.org, kw@linux.com,
linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,
linux-kernel@vger.kernel.org, cassel@kernel.org,
wilfred.mallawa@wdc.com
Subject: Re: [PATCH 1/2] PCI: Save and restore root port config space in pcibios_reset_secondary_bus()
Date: Sun, 25 May 2025 09:22:03 +0200 [thread overview]
Message-ID: <aDLFG06J-kXnvckG@wunner.de> (raw)
In-Reply-To: <20250524185304.26698-2-manivannan.sadhasivam@linaro.org>
On Sun, May 25, 2025 at 12:23:03AM +0530, Manivannan Sadhasivam wrote:
> --- a/drivers/pci/pci.c
> +++ b/drivers/pci/pci.c
> @@ -4985,10 +4985,19 @@ void __weak pcibios_reset_secondary_bus(struct pci_dev *dev)
> struct pci_host_bridge *host = pci_find_host_bridge(dev->bus);
> int ret;
>
> - if (host->reset_slot) {
> + if (pci_is_root_bus(dev->bus) && host->reset_slot) {
> + /*
> + * Save the config space of the root port before doing the
> + * reset, since the state could be lost. The device state
> + * should've been saved by the caller.
> + */
> + pci_save_state(dev);
> ret = host->reset_slot(host, dev);
Nit: Capitalize terms as the PCIe Base Spec does, i.e. "Root Port".
"The device state" is ambiguous as the Root Port is a device itself
and even referred to by the "dev" variable. I think what you mean
is "The Endpoint state".
Thanks,
Lukas
next prev parent reply other threads:[~2025-05-25 7:22 UTC|newest]
Thread overview: 16+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-05-24 18:53 [PATCH 0/2] PCI: Slot reset fixes Manivannan Sadhasivam
2025-05-24 18:53 ` [PATCH 1/2] PCI: Save and restore root port config space in pcibios_reset_secondary_bus() Manivannan Sadhasivam
2025-05-24 20:54 ` Niklas Cassel
2025-05-25 2:36 ` Wilfred Mallawa
2025-05-25 7:22 ` Lukas Wunner [this message]
2025-05-25 7:58 ` Manivannan Sadhasivam
2025-05-26 6:54 ` Lukas Wunner
2025-05-26 11:16 ` Manivannan Sadhasivam
2025-05-24 18:53 ` [PATCH 2/2] PCI: Rename host_bridge::reset_slot() to host_bridge::reset_root_port() Manivannan Sadhasivam
2025-05-24 20:57 ` Niklas Cassel
2025-05-25 2:38 ` Wilfred Mallawa
2025-05-25 8:00 ` Manivannan Sadhasivam
2025-05-24 21:51 ` kernel test robot
2025-05-25 7:26 ` Lukas Wunner
2025-05-26 0:47 ` [PATCH 0/2] PCI: Slot reset fixes Wilfred Mallawa
2025-05-26 5:53 ` Manivannan Sadhasivam
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