From: Konrad Dybcio <konrad.dybcio@linaro.org>
To: Bartosz Golaszewski <brgl@bgdev.pl>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org,
linux-kernel@vger.kernel.org, linux-clk@vger.kernel.org,
linux-arm-kernel@lists.infradead.org, iommu@lists.linux.dev,
Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
Subject: Re: [PATCH 6/7] arm64: dts: qcom: sa8775p: add the GPU clock controller node
Date: Wed, 29 Mar 2023 13:31:58 +0200 [thread overview]
Message-ID: <ab09d5eb-b303-bfa4-4f35-283ab30ffed2@linaro.org> (raw)
In-Reply-To: <20230328193632.226095-7-brgl@bgdev.pl>
On 28.03.2023 21:36, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
>
> Add the GPUCC node for sa8775p platforms.
>
> Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
> ---
> arch/arm64/boot/dts/qcom/sa8775p.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/sa8775p.dtsi b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> index 9ab630c7d81b..4c45ad1cc7ff 100644
> --- a/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> +++ b/arch/arm64/boot/dts/qcom/sa8775p.dtsi
> @@ -591,6 +591,18 @@ tcsr_mutex: hwlock@1f40000 {
> #hwlock-cells = <1>;
> };
>
> + gpucc: clock-controller@3d90000 {
> + compatible = "qcom,sa8775p-gpucc";
> + reg = <0x0 0x03d90000 0x0 0xa000>;
> + clocks = <&gcc GCC_GPU_CFG_AHB_CLK>,
> + <&rpmhcc RPMH_CXO_CLK>,
> + <&gcc GCC_GPU_GPLL0_CLK_SRC>,
> + <&gcc GCC_GPU_GPLL0_DIV_CLK_SRC>;
Without the first clock, as pointed out in the clk review:
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
(that also makes it compatible with the generic gpucc bindings!)
Konrad
> + #clock-cells = <1>;
> + #reset-cells = <1>;
> + #power-domain-cells = <1>;
> + };
> +
> pdc: interrupt-controller@b220000 {
> compatible = "qcom,sa8775p-pdc", "qcom,pdc";
> reg = <0x0 0x0b220000 0x0 0x30000>,
next prev parent reply other threads:[~2023-03-29 11:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-03-28 19:36 [PATCH 0/7] arm64: dts: qcom: sa8775p: add more IOMMUs Bartosz Golaszewski
2023-03-28 19:36 ` [PATCH 1/7] dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P Bartosz Golaszewski
2023-03-29 8:30 ` Krzysztof Kozlowski
2023-03-28 19:36 ` [PATCH 2/7] clk: qcom: add the GPUCC driver for sa8775p Bartosz Golaszewski
2023-03-29 2:15 ` Stephen Boyd
2023-04-06 11:20 ` Bartosz Golaszewski
2023-04-10 19:09 ` Stephen Boyd
2023-03-29 11:30 ` Konrad Dybcio
2023-03-28 19:36 ` [PATCH 3/7] arm64: defconfig: enable the SA8775P GPUCC driver Bartosz Golaszewski
2023-03-29 8:33 ` Krzysztof Kozlowski
2023-04-06 13:28 ` Dmitry Baryshkov
2023-03-28 19:36 ` [PATCH 4/7] dt-bindings: iommu: arm,smmu: enable clocks for sa8775p Bartosz Golaszewski
2023-03-29 8:31 ` Krzysztof Kozlowski
2023-04-03 20:41 ` Rob Herring
2023-04-03 22:38 ` Konrad Dybcio
2023-03-28 19:36 ` [PATCH 5/7] arm64: dts: qcom: sa8775p: add the pcie smmu node Bartosz Golaszewski
2023-03-29 11:33 ` Konrad Dybcio
2023-03-28 19:36 ` [PATCH 6/7] arm64: dts: qcom: sa8775p: add the GPU clock controller node Bartosz Golaszewski
2023-03-29 11:31 ` Konrad Dybcio [this message]
2023-03-28 19:36 ` [PATCH 7/7] arm64: dts: qcom: sa8775p: add the GPU IOMMU node Bartosz Golaszewski
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