From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Abhinaba Rakshit <quic_arakshit@quicinc.com>,
Thara Gopinath <thara.gopinath@gmail.com>,
Herbert Xu <herbert@gondor.apana.org.au>,
"David S. Miller" <davem@davemloft.net>,
Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: linux-arm-msm@vger.kernel.org, linux-crypto@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 2/2] arm64: dts: qcom: qcs615: add QCrypto nodes
Date: Tue, 25 Feb 2025 14:52:36 +0100 [thread overview]
Message-ID: <ac161039-af36-4e6c-90ea-ef858ea31e86@oss.qualcomm.com> (raw)
In-Reply-To: <20250224-enable-qce-for-qcs615-v1-2-e7c665347eef@quicinc.com>
On 24.02.2025 11:04 AM, Abhinaba Rakshit wrote:
> Add the QCE and Crypto BAM DMA nodes.
>
> Signed-off-by: Abhinaba Rakshit <quic_arakshit@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/qcs615.dtsi | 25 +++++++++++++++++++++++++
> 1 file changed, 25 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> index f4abfad474ea62dea13d05eb874530947e1e8d3e..25e98d20ec1d941f0b45cc3d94f298065c9a5566 100644
> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
> @@ -1114,6 +1114,31 @@ ufs_mem_phy: phy@1d87000 {
> status = "disabled";
> };
>
> + cryptobam: dma-controller@1dc4000 {
> + compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
> + reg = <0x0 0x01dc4000 0x0 0x24000>;
> + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
> + #dma-cells = <1>;
> + qcom,ee = <0>;
> + qcom,controlled-remotely;
> + num-channels = <16>;
> + qcom,num-ees = <4>;
> + iommus = <&apps_smmu 0x0104 0x0011>,
> + <&apps_smmu 0x0114 0x0011>;
(0x0114 & ~ 0x0011) == (0x0104 & ~0x0011), try dropping the second entry
here and below and see if things still work
> + };
> +
> + crypto: crypto@1dfa000 {
> + compatible = "qcom,qcs615-qce", "qcom,sm8150-qce", "qcom,qce";
> + reg = <0x0 0x01dfa000 0x0 0x6000>;
> + dmas = <&cryptobam 4>, <&cryptobam 5>;
> + dma-names = "rx", "tx";
> + iommus = <&apps_smmu 0x0104 0x0011>,
> + <&apps_smmu 0x0114 0x0011>;
> + interconnects = <&aggre1_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
> + &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
Please align the '&'s
Konrad
next prev parent reply other threads:[~2025-02-25 13:52 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-24 10:04 [PATCH 0/2] Enable Qualcomm Crypto Engine for QCS615 Abhinaba Rakshit
2025-02-24 10:04 ` [PATCH 1/2] dt-bindings: crypto: qcom-qce: document QCS615 crypto engine Abhinaba Rakshit
2025-02-24 20:12 ` Rob Herring (Arm)
2025-02-24 10:04 ` [PATCH 2/2] arm64: dts: qcom: qcs615: add QCrypto nodes Abhinaba Rakshit
2025-02-25 13:52 ` Konrad Dybcio [this message]
2025-03-18 8:57 ` Abhinaba Rakshit
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