Linux ARM-MSM sub-architecture
 help / color / mirror / Atom feed
* [PATCH] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali
@ 2025-09-24 23:23 Jingyi Wang
  2025-10-09 10:53 ` Krzysztof Kozlowski
  0 siblings, 1 reply; 3+ messages in thread
From: Jingyi Wang @ 2025-09-24 23:23 UTC (permalink / raw)
  To: Sibi Sankar, Jassi Brar, Rob Herring, Krzysztof Kozlowski,
	Conor Dooley
  Cc: linux-arm-msm, linux-kernel, devicetree, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang, Jingyi Wang

Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
Kaanapali, which is compatible with X1E80100, use fallback to indicate
this.

Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
---
 Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++--
 1 file changed, 7 insertions(+), 2 deletions(-)

diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
index f7342d04beec..6f72f78e4b72 100644
--- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
+++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
@@ -15,8 +15,13 @@ description:
 
 properties:
   compatible:
-    items:
-      - const: qcom,x1e80100-cpucp-mbox
+    oneOf:
+      - items:
+          - enum:
+              - qcom,kaanapali-cpucp-mbox
+          - const: qcom,x1e80100-cpucp-mbox
+      - enum:
+          - qcom,x1e80100-cpucp-mbox
 
   reg:
     items:

---
base-commit: ae2d20002576d2893ecaff25db3d7ef9190ac0b6
change-id: 20250917-knp-cpufreq-4730f03c925a

Best regards,
-- 
Jingyi Wang <jingyi.wang@oss.qualcomm.com>


^ permalink raw reply related	[flat|nested] 3+ messages in thread

* Re: [PATCH] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali
  2025-09-24 23:23 [PATCH] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali Jingyi Wang
@ 2025-10-09 10:53 ` Krzysztof Kozlowski
  2025-10-09 10:57   ` Krzysztof Kozlowski
  0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-09 10:53 UTC (permalink / raw)
  To: Jingyi Wang, Sibi Sankar, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-kernel, devicetree, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang

On 25/09/2025 08:23, Jingyi Wang wrote:
> Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
> Kaanapali, which is compatible with X1E80100, use fallback to indicate
> this.
> 
> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
> ---
>  Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++--
>  1 file changed, 7 insertions(+), 2 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
> index f7342d04beec..6f72f78e4b72 100644
> --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
> +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
> @@ -15,8 +15,13 @@ description:
>  
>  properties:
>    compatible:
> -    items:
> -      - const: qcom,x1e80100-cpucp-mbox
> +    oneOf:

No, you send conflicting work with Glymur. Just send ONE PATCH.

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: [PATCH] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali
  2025-10-09 10:53 ` Krzysztof Kozlowski
@ 2025-10-09 10:57   ` Krzysztof Kozlowski
  0 siblings, 0 replies; 3+ messages in thread
From: Krzysztof Kozlowski @ 2025-10-09 10:57 UTC (permalink / raw)
  To: Jingyi Wang, Sibi Sankar, Jassi Brar, Rob Herring,
	Krzysztof Kozlowski, Conor Dooley
  Cc: linux-arm-msm, linux-kernel, devicetree, aiqun.yu, tingwei.zhang,
	trilok.soni, yijie.yang

On 09/10/2025 19:53, Krzysztof Kozlowski wrote:
> On 25/09/2025 08:23, Jingyi Wang wrote:
>> Document CPUSS Control Processor (CPUCP) mailbox controller for Qualcomm
>> Kaanapali, which is compatible with X1E80100, use fallback to indicate
>> this.
>>
>> Signed-off-by: Jingyi Wang <jingyi.wang@oss.qualcomm.com>
>> ---
>>  Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml | 9 +++++++--
>>  1 file changed, 7 insertions(+), 2 deletions(-)
>>
>> diff --git a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>> index f7342d04beec..6f72f78e4b72 100644
>> --- a/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>> +++ b/Documentation/devicetree/bindings/mailbox/qcom,cpucp-mbox.yaml
>> @@ -15,8 +15,13 @@ description:
>>  
>>  properties:
>>    compatible:
>> -    items:
>> -      - const: qcom,x1e80100-cpucp-mbox
>> +    oneOf:
> 
> No, you send conflicting work with Glymur. Just send ONE PATCH.


And replying here the SAME as I said to Sibi:

This entire split is just huge churn, huge duplication of work and quite
a lot of review put onto the community. You should have coordinated your
work better.

I am disappointed because you just don't think about the reviewing
process, about what maintainers should do with that. You just send what
was told you to send.

Explain to us - why do we want to have two 99% same patches sent the
SAME DAY from the same company and do same work - review and applying -
twice, instead of having only one?

Why maintainers should accept this?

Best regards,
Krzysztof

^ permalink raw reply	[flat|nested] 3+ messages in thread

end of thread, other threads:[~2025-10-09 10:57 UTC | newest]

Thread overview: 3+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-09-24 23:23 [PATCH] dt-bindings: mailbox: qcom: Add CPUCP mailbox controller bindings for Kaanapali Jingyi Wang
2025-10-09 10:53 ` Krzysztof Kozlowski
2025-10-09 10:57   ` Krzysztof Kozlowski

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox