Re: [PATCH v2 1/2] arm64: dts: qcom: Add support for secondary USB node on QCS615

[Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>]

On 12/12/2024 11:40 PM, Konrad Dybcio wrote:
> On 11.12.2024 9:26 AM, Song Xue wrote:
>> From: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>>
>> Add support for secondary USB controller and its high-speed phy
>> on QCS615.
>>
>> Signed-off-by: Krishna Kurapati <krishna.kurapati@oss.qualcomm.com>
>> Co-developed-by: Song Xue <quic_songxue@quicinc.com>
>> Signed-off-by: Song Xue <quic_songxue@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qcs615.dtsi | 76 ++++++++++++++++++++++++++++++++++++
>>   1 file changed, 76 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qcs615.dtsi b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> index b8388dcca94cd8f4e6f1360305d5f6c7fff4eec3..651c6c8b8bc40886139fa235874e834928e14e77 100644
>> --- a/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> +++ b/arch/arm64/boot/dts/qcom/qcs615.dtsi
>> @@ -3079,6 +3079,20 @@ usb_1_hsphy: phy@88e2000 {
>>   			status = "disabled";
>>   		};
>>   
>> +		usb_hsphy_2: phy@88e3000 {
>> +			compatible = "qcom,qcs615-qusb2-phy";
>> +			reg = <0x0 0x088e3000 0x0 0x180>;
>> +
>> +			clocks = <&gcc GCC_AHB2PHY_WEST_CLK>, <&rpmhcc RPMH_CXO_CLK>;
>> +			clock-names = "cfg_ahb", "ref";
> 
> Having this be a vertical list would be nice
> 
> Nonetheless, this looks good and the magic numbers all line
> up with what the computer tells me. You may want to check
> with Krishna Kurapati whether snps,parkmode-disable-ss-quirk
> here as well.
> 
> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>


Thanks for the review Konrad.

This is HS only controller and this quirk is not necessary.

Regards,
Krishna,