From: Shivnandan Kumar <quic_kshivnan@quicinc.com>
To: Sibi Sankar <quic_sibis@quicinc.com>, <andersson@kernel.org>,
<konrad.dybcio@linaro.org>, <djakov@kernel.org>,
<robh+dt@kernel.org>, <krzysztof.kozlowski+dt@linaro.org>,
<srinivas.kandagatla@linaro.org>
Cc: <linux-kernel@vger.kernel.org>, <linux-arm-msm@vger.kernel.org>,
<devicetree@vger.kernel.org>, <linux-pm@vger.kernel.org>,
<quic_rgottimu@quicinc.com>, <conor+dt@kernel.org>,
<dmitry.baryshkov@linaro.org>, <abel.vesa@linaro.org>
Subject: Re: [PATCH 3/4] arm64: dts: qcom: x1e80100: Add BWMONs
Date: Thu, 6 Jun 2024 14:39:52 +0530 [thread overview]
Message-ID: <b9ee77da-bd51-4d32-8f35-d38fe8b77f44@quicinc.com> (raw)
In-Reply-To: <20240604011157.2358019-4-quic_sibis@quicinc.com>
On 6/4/2024 6:41 AM, Sibi Sankar wrote:
> Add the CPU and LLCC BWMONs on X1E80100 SoCs.
>
> Signed-off-by: Sibi Sankar <quic_sibis@quicinc.com>
> ---
> arch/arm64/boot/dts/qcom/x1e80100.dtsi | 169 +++++++++++++++++++++++++
> 1 file changed, 169 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/x1e80100.dtsi b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> index 1929c34ae70a..d86c4d3be126 100644
> --- a/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> +++ b/arch/arm64/boot/dts/qcom/x1e80100.dtsi
> @@ -5329,6 +5329,175 @@ cpu_scp_lpri1: scp-sram-section@200 {
> };
> };
>
> + pmu@24091000 {
> + compatible = "qcom,x1e80100-llcc-bwmon", "qcom,sc7280-llcc-bwmon";
> + reg = <0 0x24091000 0 0x1000>;
> +
> + interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&mc_virt MASTER_LLCC 3 &mc_virt SLAVE_EBI1 3>;
> +
> + operating-points-v2 = <&llcc_bwmon_opp_table>;
> +
> + llcc_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-0 {
Nitpick,In one table, we start from ‘opp-0,’ while in the other table,
it begins with ‘opp-1,it is better to make it consistent across table.
> + opp-peak-kBps = <800000>;
> + };
> +
> + opp-1 {
> + opp-peak-kBps = <2188000>;
> + };
> +
> + opp-2 {
> + opp-peak-kBps = <3072000>;
> + };
> +
> + opp-3 {
> + opp-peak-kBps = <6220800>;
> + };
> +
> + opp-4 {
> + opp-peak-kBps = <6835200>;
> + };
> +
> + opp-5 {
> + opp-peak-kBps = <8371200>;
> + };
> +
> + opp-6 {
> + opp-peak-kBps = <10944000>;
> + };
> +
> + opp-7 {
> + opp-peak-kBps = <12748800>;
> + };
> +
> + opp-8 {
> + opp-peak-kBps = <14745600>;
> + };
> +
> + opp-9 {
> + opp-peak-kBps = <16896000>;
> + };
> + };
> + };
> +
> + pmu@240b3400 {
> + compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
> + reg = <0 0x240b3400 0 0x600>;
> +
> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
> + operating-points-v2 = <&cpu0_bwmon_opp_table>;
> +
> + cpu0_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-1 {
> + opp-peak-kBps = <4800000>;
> + };
> +
> + opp-2 {
> + opp-peak-kBps = <7464000>;
> + };
> +
> + opp-3 {
> + opp-peak-kBps = <9600000>;
> + };
> +
> + opp-4 {
> + opp-peak-kBps = <12896000>;
> + };
> +
> + opp-5 {
> + opp-peak-kBps = <14928000>;
> + };
> +
> + opp-6 {
> + opp-peak-kBps = <17064000>;
> + };
> + };
> + };
> +
> + pmu@240b5400 {
> + compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
> + reg = <0 0x240b5400 0 0x600>;
> +
> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
> + operating-points-v2 = <&cpu8_bwmon_opp_table>;
> +
> + cpu8_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-1 {
> + opp-peak-kBps = <4800000>;
> + };
> +
> + opp-2 {
> + opp-peak-kBps = <7464000>;
> + };
> +
> + opp-3 {
> + opp-peak-kBps = <9600000>;
> + };
> +
> + opp-4 {
> + opp-peak-kBps = <12896000>;
> + };
> +
> + opp-5 {
> + opp-peak-kBps = <14928000>;
> + };
> +
> + opp-6 {
> + opp-peak-kBps = <17064000>;
> + };
> + };
> + };
> +
> + pmu@240b6400 {
> + compatible = "qcom,x1e80100-cpu-bwmon", "qcom,sdm845-bwmon";
> + reg = <0 0x240b6400 0 0x600>;
> +
> + interrupts = <GIC_SPI 581 IRQ_TYPE_LEVEL_HIGH>;
> +
> + interconnects = <&gem_noc MASTER_APPSS_PROC 3 &gem_noc SLAVE_LLCC 3>;
> + operating-points-v2 = <&cpu4_bwmon_opp_table>;
> +
> + cpu4_bwmon_opp_table: opp-table {
> + compatible = "operating-points-v2";
> +
> + opp-1 {
> + opp-peak-kBps = <4800000>;
> + };
> +
> + opp-2 {
> + opp-peak-kBps = <7464000>;
> + };
> +
> + opp-3 {
> + opp-peak-kBps = <9600000>;
> + };
> +
> + opp-4 {
> + opp-peak-kBps = <12896000>;
> + };
> +
> + opp-5 {
> + opp-peak-kBps = <14928000>;
> + };
> +
> + opp-6 {
> + opp-peak-kBps = <17064000>;
> + };
> + };
> + };
> +
> system-cache-controller@25000000 {
> compatible = "qcom,x1e80100-llcc";
> reg = <0 0x25000000 0 0x200000>,
Thanks,
Shivnandan
next prev parent reply other threads:[~2024-06-06 9:10 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-04 1:11 [PATCH 0/4] arm64: dts: qcom: x1e80100: Enable bwmon and fastrpc support Sibi Sankar
2024-06-04 1:11 ` [PATCH 1/4] dt-bindings: interconnect: qcom,msm8998-bwmon: Add X1E80100 BWMON instances Sibi Sankar
2024-06-04 6:46 ` Krzysztof Kozlowski
2024-06-04 1:11 ` [PATCH 2/4] soc: qcom: icc-bwmon: Allow for interrupts to be shared across instances Sibi Sankar
2024-06-04 6:46 ` Krzysztof Kozlowski
2024-06-13 17:02 ` Sibi Sankar
2024-06-14 8:24 ` Krzysztof Kozlowski
2024-06-14 20:19 ` Sibi Sankar
2024-06-14 21:42 ` Dmitry Baryshkov
2024-06-15 2:15 ` Sibi Sankar
2024-06-04 1:11 ` [PATCH 3/4] arm64: dts: qcom: x1e80100: Add BWMONs Sibi Sankar
2024-06-06 9:09 ` Shivnandan Kumar [this message]
2024-06-13 16:51 ` Sibi Sankar
2024-06-06 9:56 ` Konrad Dybcio
2024-06-13 17:18 ` Sibi Sankar
2024-06-04 1:11 ` [PATCH 4/4] arm64: dts: qcom: x1e80100: Add fastrpc nodes Sibi Sankar
2024-06-06 2:45 ` Bjorn Andersson
2024-06-13 16:50 ` Sibi Sankar
2024-06-06 10:30 ` [PATCH 0/4] arm64: dts: qcom: x1e80100: Enable bwmon and fastrpc support Konrad Dybcio
2024-06-13 17:27 ` Sibi Sankar
2024-06-18 14:39 ` Konrad Dybcio
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