From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>,
"Rafael J. Wysocki" <rafael@kernel.org>,
Daniel Lezcano <daniel.lezcano@linaro.org>,
Zhang Rui <rui.zhang@intel.com>,
Lukasz Luba <lukasz.luba@arm.com>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Conor Dooley <conor+dt@kernel.org>,
Jonathan Cameron <jic23@kernel.org>,
Lars-Peter Clausen <lars@metafoo.de>, Lee Jones <lee@kernel.org>,
Stephen Boyd <sboyd@kernel.org>, Amit Kucheria <amitk@kernel.org>,
Thara Gopinath <thara.gopinath@gmail.com>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konradybcio@kernel.org>
Cc: Ajit Pandey <quic_ajipan@quicinc.com>,
Imran Shaik <quic_imrashai@quicinc.com>,
Taniya Das <quic_tdas@quicinc.com>,
Jagadeesh Kona <quic_jkona@quicinc.com>,
quic_kamalw@quicinc.com, quic_jprakash@quicinc.com,
linux-arm-msm@vger.kernel.org, linux-pm@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-iio@vger.kernel.org
Subject: Re: [PATCH RFC v2 3/5] thermal: qcom: Add support for MBG thermal monitoring
Date: Fri, 13 Dec 2024 16:48:58 +0100 [thread overview]
Message-ID: <cf2f2510-9d27-4473-bf50-45b14725f4c5@oss.qualcomm.com> (raw)
In-Reply-To: <20241212-mbg-v2-support-v2-3-3249a4339b6e@quicinc.com>
On 12.12.2024 5:11 PM, Satya Priya Kakitapalli wrote:
> Add driver for the MBG thermal monitoring device. It monitors
> the die temperature, and when there is a level 1 upper threshold
> violation, it receives an interrupt over spmi. The driver reads
> the fault status register and notifies thermal accordingly.
>
> Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
> ---
[...]
> +static const struct mbg_map_table map_table[] = {
Is this peripheral/pmic-specific?
> + /* minT vtemp0 tc */
> + { -60000, 4337, 1967 },
> + { -40000, 4731, 1964 },
> + { -20000, 5124, 1957 },
> + { 0, 5515, 1949 },
> + { 20000, 5905, 1940 },
> + { 40000, 6293, 1930 },
> + { 60000, 6679, 1921 },
> + { 80000, 7064, 1910 },
> + { 100000, 7446, 1896 },
> + { 120000, 7825, 1878 },
> + { 140000, 8201, 1859 },
> +};
> +
> +static int mbg_tm_get_temp(struct thermal_zone_device *tz, int *temp)
> +{
> + struct mbg_tm_chip *chip = thermal_zone_device_priv(tz);
> + int ret, milli_celsius;
> +
> + if (!temp)
> + return -EINVAL;
> +
> + if (chip->last_thres_crossed) {
> + pr_debug("last_temp: %d\n", chip->last_temp);
Use dev_dbg for consistency with the other debug prints
> + chip->last_thres_crossed = false;
> + *temp = chip->last_temp;
> + return 0;
> + }
> +
> + ret = iio_read_channel_processed(chip->adc, &milli_celsius);
> + if (ret < 0) {
> + dev_err(chip->dev, "failed to read iio channel %d\n", ret);
> + return ret;
> + }
> +
> + *temp = milli_celsius;
> +
> + return 0;
> +}
> +
> +static int temp_to_vtemp(int temp)
> +{
> +
> + int idx, vtemp, tc = 0, t0 = 0, vtemp0 = 0;
> +
> + for (idx = 0; idx < ARRAY_SIZE(map_table); idx++)
> + if (temp >= map_table[idx].min_temp &&
> + temp < (map_table[idx].min_temp + 20000)) {
Please align the two lines, tab width is 8 for kernel code
> + tc = map_table[idx].tc;
> + t0 = map_table[idx].min_temp;
> + vtemp0 = map_table[idx].vtemp0;
> + break;
> + }
> +
> + /*
> + * Formula to calculate vtemp(mV) from a given temp
> + * vtemp = (temp - minT) * tc + vtemp0
> + * tc, t0 and vtemp0 values are mentioned in the map_table array.
> + */
> + vtemp = ((temp - t0) * tc + vtemp0 * 100000) / 1000000;
So you say vtemp = ... and the func is called temp_to_vtemp
> + return abs(vtemp - MBG_TEMP_DEFAULT_TEMP_MV) / MBG_TEMP_STEP_MV;
But you end up returning a scaled version of it..
Please clarify that in the code
> +}
> +
> +static int mbg_tm_set_trip_temp(struct thermal_zone_device *tz, int low_temp,
> + int temp)
> +{
> + struct mbg_tm_chip *chip = thermal_zone_device_priv(tz);
> + int ret = 0;
> +
> + guard(mutex)(&chip->lock);
> +
> + /* The HW has a limitation that the trip set must be above 25C */
> + if (temp > MBG_MIN_TRIP_TEMP && temp < MBG_MAX_SUPPORTED_TEMP) {
> + regmap_set_bits(chip->map,
> + chip->base + MBG_TEMP_MON2_MISC_CFG, MON2_UP_THRESH_EN);
> + ret = regmap_write(chip->map, chip->base + MON2_LVL1_UP_THRESH,
> + temp_to_vtemp(temp));
> + if (ret < 0)
> + return ret;
> + } else {
> + dev_dbg(chip->dev, "Set trip b/w 25C and 160C\n");
> + regmap_clear_bits(chip->map,
> + chip->base + MBG_TEMP_MON2_MISC_CFG, MON2_UP_THRESH_EN);
> + }
> +
> + /*
> + * Configure the last_temp one degree higher, to ensure the
> + * violated temp is returned to thermal framework when it reads
> + * temperature for the first time after the violation happens.
> + * This is needed to account for the inaccuracy in the conversion
> + * formula used which leads to the thermal framework setting back
> + * the same thresholds in case the temperature it reads does not
> + * show violation.
> + */
> + chip->last_temp = temp + MBG_TEMP_CONSTANT;
> +
> + return ret;
> +}
> +
> +static const struct thermal_zone_device_ops mbg_tm_ops = {
> + .get_temp = mbg_tm_get_temp,
> + .set_trips = mbg_tm_set_trip_temp,
> +};
> +
> +static irqreturn_t mbg_tm_isr(int irq, void *data)
> +{
> + struct mbg_tm_chip *chip = data;
> + int ret, val;
> +
> + scoped_guard(mutex, &chip->lock) {
> + ret = regmap_read(chip->map,
> + chip->base + MBG_TEMP_MON2_FAULT_STATUS, &val);
> + if (ret < 0)
> + return IRQ_HANDLED;
> + }
> +
> + if ((val & MON_FAULT_STATUS_MASK) & MON_FAULT_STATUS_LVL1) {
> + if ((val & MON_POLARITY_STATUS_MASK) & MON_POLARITY_STATUS_UPR) {
Just checking the last argument to AND in both lines is enough, as
they're both parts of the bitfield
[...]
> + ret = device_property_read_u32(chip->dev, "reg", &res);
> + if (ret < 0)
> + return ret;
return dev_err_probe(dev, ret, "Couldn't read reg property"\n);
> +
> + chip->base = res;
> +
> + chip->irq = platform_get_irq(pdev, 0);
> + if (chip->irq < 0)
> + return chip->irq;
Similarly here
> +
> + chip->adc = devm_iio_channel_get(&pdev->dev, "thermal");
> + if (IS_ERR(chip->adc))
> + return dev_err_probe(&pdev->dev, PTR_ERR(chip->adc),
> + "failed to get adc channel\n");
> +
> + chip->tz_dev = devm_thermal_of_zone_register(&pdev->dev, 0,
> + chip, &mbg_tm_ops);
> + if (IS_ERR(chip->tz_dev))
> + return dev_err_probe(&pdev->dev, PTR_ERR(chip->tz_dev),
> + "failed to register sensor\n");
Please also make the error messages start with an uppercase letter
> +
> + return devm_request_threaded_irq(&pdev->dev, chip->irq, NULL,
> + mbg_tm_isr, IRQF_ONESHOT, node->name, chip);
> +}
> +
> +static const struct of_device_id mbg_tm_match_table[] = {
> + { .compatible = "qcom,spmi-pm8775-mbg-tm" },
I don't think the 'spmi' bit belongs here
Konrad
next prev parent reply other threads:[~2024-12-13 15:49 UTC|newest]
Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-12 16:11 [PATCH RFC v2 0/5] Add support for MBG Thermal monitoring device Satya Priya Kakitapalli
2024-12-12 16:11 ` [PATCH RFC v2 1/5] dt-bindings: thermal: Add MBG thermal monitor support Satya Priya Kakitapalli
2024-12-12 17:44 ` Rob Herring (Arm)
2024-12-13 8:38 ` Krzysztof Kozlowski
[not found] ` <7a5db383-914c-4c1e-846e-5d68cc6a7765@quicinc.com>
2025-02-11 11:46 ` Krzysztof Kozlowski
2025-02-11 11:50 ` Krzysztof Kozlowski
2025-02-11 23:57 ` Dmitry Baryshkov
2025-02-12 6:06 ` Krzysztof Kozlowski
2025-02-12 11:12 ` Dmitry Baryshkov
2025-02-12 6:24 ` Satya Priya Kakitapalli
2025-02-12 6:47 ` Krzysztof Kozlowski
2024-12-13 15:50 ` Konrad Dybcio
2024-12-12 16:11 ` [PATCH RFC v2 2/5] dt-bindings: mfd: qcom,spmi-pmic: Add MBG thermal monitor ref Satya Priya Kakitapalli
2024-12-12 17:44 ` Rob Herring (Arm)
2024-12-13 8:40 ` Krzysztof Kozlowski
2024-12-12 16:11 ` [PATCH RFC v2 3/5] thermal: qcom: Add support for MBG thermal monitoring Satya Priya Kakitapalli
2024-12-13 15:48 ` Konrad Dybcio [this message]
2024-12-30 9:45 ` Satya Priya Kakitapalli
2024-12-30 14:06 ` Konrad Dybcio
2025-01-16 8:05 ` Satya Priya Kakitapalli
2025-01-16 21:18 ` Konrad Dybcio
2024-12-14 14:17 ` Jonathan Cameron
2024-12-12 16:11 ` [PATCH RFC v2 4/5] arm64: dts: qcom: sa8775p-pmics: Add vadc support on SA8775P Satya Priya Kakitapalli
2024-12-12 16:11 ` [PATCH RFC v2 5/5] arm64: dts: qcom: sa8775p-pmics: Add support for MBG TM Satya Priya Kakitapalli
2025-02-11 13:24 ` Konrad Dybcio
2024-12-13 8:38 ` [PATCH RFC v2 0/5] Add support for MBG Thermal monitoring device Krzysztof Kozlowski
2024-12-13 9:20 ` Satya Priya Kakitapalli
2024-12-13 15:52 ` Krzysztof Kozlowski
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=cf2f2510-9d27-4473-bf50-45b14725f4c5@oss.qualcomm.com \
--to=konrad.dybcio@oss.qualcomm.com \
--cc=amitk@kernel.org \
--cc=andersson@kernel.org \
--cc=conor+dt@kernel.org \
--cc=daniel.lezcano@linaro.org \
--cc=devicetree@vger.kernel.org \
--cc=jic23@kernel.org \
--cc=konradybcio@kernel.org \
--cc=krzk+dt@kernel.org \
--cc=lars@metafoo.de \
--cc=lee@kernel.org \
--cc=linux-arm-msm@vger.kernel.org \
--cc=linux-iio@vger.kernel.org \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pm@vger.kernel.org \
--cc=lukasz.luba@arm.com \
--cc=quic_ajipan@quicinc.com \
--cc=quic_imrashai@quicinc.com \
--cc=quic_jkona@quicinc.com \
--cc=quic_jprakash@quicinc.com \
--cc=quic_kamalw@quicinc.com \
--cc=quic_skakitap@quicinc.com \
--cc=quic_tdas@quicinc.com \
--cc=rafael@kernel.org \
--cc=robh@kernel.org \
--cc=rui.zhang@intel.com \
--cc=sboyd@kernel.org \
--cc=thara.gopinath@gmail.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox