* [DPU PATCH 0/6] drm/msm: Fix dpu compile for unlikely #ifdef paths
@ 2018-06-28 20:53 Sean Paul
[not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
0 siblings, 1 reply; 8+ messages in thread
From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw)
To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW,
linux-arm-msm-u79uwXL29TY76Z2rM5mHXA
Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w,
Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw,
abhinavk-sgV2jX0FEOL9JmXXK+q4OQ
I took a pass through the driver looking for CONFIG_ paths that were
untested. I found a few cases where either compile was broken, or the
config path was never used. Here's a few patches to fix it up.
Here's hoping this will avoid any nastygrams from folks running into
compilation issues once dpu is upstream.
Sean
Sean Paul (6):
drm/msm: Remove DPU_DBG->pr_err ifdef gate
drm/msm: Alphabetize dpu files in Makefile
drm/msm: Remove dpu bus scaling code
drm/msm: Remove ion from dpu
drm/msm: Fix dpu compile when CONFIG_DEBUG_FS !defined
drm/msm: Remove remnants of dsi-staging
drivers/gpu/drm/msm/Makefile | 8 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 35 --
drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 17 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h | 4 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 32 +-
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 4 -
.../gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 522 +-----------------
.../gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 65 +--
8 files changed, 10 insertions(+), 677 deletions(-)
--
Sean Paul, Software Engineer, Google / Chromium OS
_______________________________________________
Freedreno mailing list
Freedreno@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/freedreno
^ permalink raw reply [flat|nested] 8+ messages in thread[parent not found: <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>]
* [DPU PATCH 1/6] drm/msm: Remove DPU_DBG->pr_err ifdef gate [not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> @ 2018-06-28 20:53 ` Sean Paul 2018-06-28 20:53 ` [DPU PATCH 2/6] drm/msm: Alphabetize dpu files in Makefile Sean Paul ` (4 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw) To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ It's pretty easy to just s/debug/err/ Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h | 4 ---- 1 file changed, 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h index 773b52e71a22..bc07381d7429 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_io_util.h @@ -17,11 +17,7 @@ #include <linux/platform_device.h> #include <linux/types.h> -#ifdef DEBUG -#define DEV_DBG(fmt, args...) pr_err(fmt, ##args) -#else #define DEV_DBG(fmt, args...) pr_debug(fmt, ##args) -#endif #define DEV_INFO(fmt, args...) pr_info(fmt, ##args) #define DEV_WARN(fmt, args...) pr_warn(fmt, ##args) #define DEV_ERR(fmt, args...) pr_err(fmt, ##args) -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [DPU PATCH 2/6] drm/msm: Alphabetize dpu files in Makefile [not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2018-06-28 20:53 ` [DPU PATCH 1/6] drm/msm: Remove DPU_DBG->pr_err ifdef gate Sean Paul @ 2018-06-28 20:53 ` Sean Paul 2018-06-28 20:53 ` [DPU PATCH 3/6] drm/msm: Remove dpu bus scaling code Sean Paul ` (3 subsequent siblings) 5 siblings, 0 replies; 8+ messages in thread From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw) To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ See subject. Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/msm/Makefile | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 2604ccfd0653..3624b5af5ecd 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -70,11 +70,11 @@ msm-y := \ disp/dpu1/dpu_irq.o \ disp/dpu1/dpu_kms.o \ disp/dpu1/dpu_kms_utils.o \ + disp/dpu1/dpu_mdss.o \ disp/dpu1/dpu_plane.o \ + disp/dpu1/dpu_power_handle.o \ disp/dpu1/dpu_rm.o \ disp/dpu1/dpu_vbif.o \ - disp/dpu1/dpu_mdss.o \ - disp/dpu1/dpu_power_handle.o \ msm_atomic.o \ msm_debugfs.o \ msm_drv.o \ -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [DPU PATCH 3/6] drm/msm: Remove dpu bus scaling code [not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2018-06-28 20:53 ` [DPU PATCH 1/6] drm/msm: Remove DPU_DBG->pr_err ifdef gate Sean Paul 2018-06-28 20:53 ` [DPU PATCH 2/6] drm/msm: Alphabetize dpu files in Makefile Sean Paul @ 2018-06-28 20:53 ` Sean Paul [not found] ` <20180628205334.158846-4-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> 2018-06-28 20:53 ` [DPU PATCH 4/6] drm/msm: Remove ion from dpu Sean Paul ` (2 subsequent siblings) 5 siblings, 1 reply; 8+ messages in thread From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw) To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ QC bus scaling isn't upstream yet, so remove the bus scaling code until it is. Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 35 -- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 7 +- .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 522 +----------------- .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 65 +-- 4 files changed, 4 insertions(+), 625 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c index 1019ce7594ff..41c5191f9056 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c @@ -221,7 +221,6 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, struct drm_crtc *crtc, u32 bus_id) { - u64 bw_sum_of_intfs = 0, bus_ab_quota, bus_ib_quota; struct dpu_core_perf_params perf = { { 0 } }; enum dpu_crtc_client_type curr_client_type = dpu_crtc_get_client_type(crtc); @@ -239,45 +238,11 @@ static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, max(perf.max_per_pipe_ib[bus_id], dpu_cstate->new_perf.max_per_pipe_ib[bus_id]); - bw_sum_of_intfs += dpu_cstate->new_perf.bw_ctl[bus_id]; - DPU_DEBUG("crtc=%d bus_id=%d bw=%llu\n", tmp_crtc->base.id, bus_id, dpu_cstate->new_perf.bw_ctl[bus_id]); } } - - bus_ab_quota = max(bw_sum_of_intfs, kms->perf.perf_tune.min_bus_vote); - bus_ib_quota = perf.max_per_pipe_ib[bus_id]; - - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { - bus_ab_quota = kms->perf.fix_core_ab_vote; - bus_ib_quota = kms->perf.fix_core_ib_vote; - } - - switch (curr_client_type) { - case NRT_CLIENT: - ret = dpu_power_data_bus_set_quota( - &kms->phandle, kms->core_client, - DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT, - bus_id, bus_ab_quota, bus_ib_quota); - DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "nrt", - bus_id, bus_ab_quota, bus_ib_quota); - break; - - case RT_CLIENT: - ret = dpu_power_data_bus_set_quota( - &kms->phandle, kms->core_client, - DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT, - bus_id, bus_ab_quota, bus_ib_quota); - DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "rt", - bus_id, bus_ab_quota, bus_ib_quota); - break; - - default: - DPU_ERROR("invalid client type:%d\n", curr_client_type); - break; - } return ret; } diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 3889e4a7dfbc..605da85bb53f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -1265,11 +1265,7 @@ static int dpu_bind(struct device *dev, struct device *master, void *data) goto clk_rate_error; } - ret = dpu_power_resource_init(pdev, &dpu_kms->phandle); - if (ret) { - pr_err("dpu power resource init failed\n"); - goto power_init_fail; - } + dpu_power_resource_init(pdev, &dpu_kms->phandle); platform_set_drvdata(pdev, dpu_kms); @@ -1283,7 +1279,6 @@ static int dpu_bind(struct device *dev, struct device *master, void *data) priv->kms = &dpu_kms->base; return ret; -power_init_fail: clk_rate_error: msm_dss_put_clk(mp->clk_config, mp->num_clk); clk_get_error: diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c index f997bd9e109c..a68f1249388c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c @@ -24,132 +24,6 @@ #include "dpu_power_handle.h" #include "dpu_trace.h" -#ifdef CONFIG_QCOM_BUS_SCALING -#include <linux/msm-bus.h> -#include <linux/msm-bus-board.h> - -#define DPU_BUS_VECTOR_ENTRY(src_val, dst_val, ab_val, ib_val) \ - { \ - .src = src_val, \ - .dst = dst_val, \ - .ab = (ab_val), \ - .ib = (ib_val), \ - } - -static struct msm_bus_vectors dpu_reg_bus_vectors[] = { - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 0), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 76800000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 150000000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 300000000), -}; - -static struct msm_bus_paths dpu_reg_bus_usecases[] = { { - .num_paths = 1, - .vectors = &dpu_reg_bus_vectors[0], -}, { - .num_paths = 1, - .vectors = &dpu_reg_bus_vectors[1], -}, { - .num_paths = 1, - .vectors = &dpu_reg_bus_vectors[2], -}, { - .num_paths = 1, - .vectors = &dpu_reg_bus_vectors[3], -} }; - -static struct msm_bus_scale_pdata dpu_reg_bus_scale_table = { - .usecase = dpu_reg_bus_usecases, - .num_usecases = ARRAY_SIZE(dpu_reg_bus_usecases), - .name = "mdss_reg", -}; - -static struct msm_bus_vectors dpu_data_bus_vectors[] = { - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0, - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 0), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1, - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 0), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0, - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1, - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0, - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1, - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), -}; - -static struct msm_bus_paths dpu_data_bus_usecases[] = { { - .num_paths = 2, - .vectors = &dpu_data_bus_vectors[0], -}, { - .num_paths = 2, - .vectors = &dpu_data_bus_vectors[2], -}, { - .num_paths = 2, - .vectors = &dpu_data_bus_vectors[4], -} }; - -static struct msm_bus_scale_pdata dpu_data_bus_scale_table = { - .usecase = dpu_data_bus_usecases, - .num_usecases = ARRAY_SIZE(dpu_data_bus_usecases), - .name = "mdss_mnoc", -}; - -static struct msm_bus_vectors dpu_llcc_bus_vectors[] = { - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC, - MSM_BUS_SLAVE_LLCC, 0, 0), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC, - MSM_BUS_SLAVE_LLCC, 0, 6400000000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC, - MSM_BUS_SLAVE_LLCC, 0, 6400000000), -}; - -static struct msm_bus_paths dpu_llcc_bus_usecases[] = { { - .num_paths = 1, - .vectors = &dpu_llcc_bus_vectors[0], -}, { - .num_paths = 1, - .vectors = &dpu_llcc_bus_vectors[1], -}, { - .num_paths = 1, - .vectors = &dpu_llcc_bus_vectors[2], -} }; -static struct msm_bus_scale_pdata dpu_llcc_bus_scale_table = { - .usecase = dpu_llcc_bus_usecases, - .num_usecases = ARRAY_SIZE(dpu_llcc_bus_usecases), - .name = "mdss_llcc", -}; - -static struct msm_bus_vectors dpu_ebi_bus_vectors[] = { - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC, - MSM_BUS_SLAVE_EBI_CH0, 0, 0), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC, - MSM_BUS_SLAVE_EBI_CH0, 0, 6400000000), - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC, - MSM_BUS_SLAVE_EBI_CH0, 0, 6400000000), -}; - -static struct msm_bus_paths dpu_ebi_bus_usecases[] = { { - .num_paths = 1, - .vectors = &dpu_ebi_bus_vectors[0], -}, { - .num_paths = 1, - .vectors = &dpu_ebi_bus_vectors[1], -}, { - .num_paths = 1, - .vectors = &dpu_ebi_bus_vectors[2], -} }; -static struct msm_bus_scale_pdata dpu_ebi_bus_scale_table = { - .usecase = dpu_ebi_bus_usecases, - .num_usecases = ARRAY_SIZE(dpu_ebi_bus_usecases), - .name = "mdss_ebi", -}; -#endif - static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = { [DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus", [DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus", @@ -222,366 +96,15 @@ void dpu_power_client_destroy(struct dpu_power_handle *phandle, } } -#ifdef CONFIG_QCOM_BUS_SCALING - -#define MAX_AXI_PORT_COUNT 3 - -static int _dpu_power_data_bus_set_quota( - struct dpu_power_data_bus_handle *pdbus, - u64 ab_quota_rt, u64 ab_quota_nrt, - u64 ib_quota_rt, u64 ib_quota_nrt) -{ - int new_uc_idx; - u64 ab_quota[MAX_AXI_PORT_COUNT] = {0, 0}; - u64 ib_quota[MAX_AXI_PORT_COUNT] = {0, 0}; - int rc; - - if (pdbus->data_bus_hdl < 1) { - pr_err("invalid bus handle %d\n", pdbus->data_bus_hdl); - return -EINVAL; - } - - pdbus->ab_rt = ab_quota_rt; - pdbus->ib_rt = ib_quota_rt; - pdbus->ab_nrt = ab_quota_nrt; - pdbus->ib_nrt = ib_quota_nrt; - - if (pdbus->enable) { - ab_quota_rt = max_t(u64, ab_quota_rt, - DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); - ib_quota_rt = max_t(u64, ib_quota_rt, - DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); - ab_quota_nrt = max_t(u64, ab_quota_nrt, - DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); - ib_quota_nrt = max_t(u64, ib_quota_nrt, - DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); - } else { - ab_quota_rt = min_t(u64, ab_quota_rt, - DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); - ib_quota_rt = min_t(u64, ib_quota_rt, - DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); - ab_quota_nrt = min_t(u64, ab_quota_nrt, - DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); - ib_quota_nrt = min_t(u64, ib_quota_nrt, - DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); - } - - if (!ab_quota_rt && !ab_quota_nrt && !ib_quota_rt && !ib_quota_nrt) { - new_uc_idx = 0; - } else { - int i; - struct msm_bus_vectors *vect = NULL; - struct msm_bus_scale_pdata *bw_table = - pdbus->data_bus_scale_table; - u32 nrt_axi_port_cnt = pdbus->nrt_axi_port_cnt; - u32 total_axi_port_cnt = pdbus->axi_port_cnt; - u32 rt_axi_port_cnt = total_axi_port_cnt - nrt_axi_port_cnt; - - if (!bw_table || !total_axi_port_cnt || - total_axi_port_cnt > MAX_AXI_PORT_COUNT) { - pr_err("invalid input\n"); - return -EINVAL; - } - - if (pdbus->bus_channels) { - ib_quota_rt = div_u64(ib_quota_rt, - pdbus->bus_channels); - ib_quota_nrt = div_u64(ib_quota_nrt, - pdbus->bus_channels); - } - - if (nrt_axi_port_cnt) { - - ab_quota_rt = div_u64(ab_quota_rt, rt_axi_port_cnt); - ab_quota_nrt = div_u64(ab_quota_nrt, nrt_axi_port_cnt); - - for (i = 0; i < total_axi_port_cnt; i++) { - if (i < rt_axi_port_cnt) { - ab_quota[i] = ab_quota_rt; - ib_quota[i] = ib_quota_rt; - } else { - ab_quota[i] = ab_quota_nrt; - ib_quota[i] = ib_quota_nrt; - } - } - } else { - ab_quota[0] = div_u64(ab_quota_rt + ab_quota_nrt, - total_axi_port_cnt); - ib_quota[0] = ib_quota_rt + ib_quota_nrt; - - for (i = 1; i < total_axi_port_cnt; i++) { - ab_quota[i] = ab_quota[0]; - ib_quota[i] = ib_quota[0]; - } - } - - new_uc_idx = (pdbus->curr_bw_uc_idx % - (bw_table->num_usecases - 1)) + 1; - - for (i = 0; i < total_axi_port_cnt; i++) { - vect = &bw_table->usecase[new_uc_idx].vectors[i]; - vect->ab = ab_quota[i]; - vect->ib = ib_quota[i]; - - pr_debug( - "%s uc_idx=%d %s path idx=%d ab=%llu ib=%llu\n", - bw_table->name, - new_uc_idx, (i < rt_axi_port_cnt) ? "rt" : "nrt" - , i, vect->ab, vect->ib); - } - } - pdbus->curr_bw_uc_idx = new_uc_idx; - pdbus->ao_bw_uc_idx = new_uc_idx; - - DPU_ATRACE_BEGIN("msm_bus_scale_req"); - rc = msm_bus_scale_client_update_request(pdbus->data_bus_hdl, - new_uc_idx); - DPU_ATRACE_END("msm_bus_scale_req"); - - return rc; -} - -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, - int bus_client, u32 bus_id, - u64 ab_quota, u64 ib_quota) -{ - int rc = 0; - int i; - u64 total_ab_rt = 0, total_ib_rt = 0; - u64 total_ab_nrt = 0, total_ib_nrt = 0; - struct dpu_power_client *client; - - if (!phandle || !pclient || - bus_client >= DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX || - bus_id >= DPU_POWER_HANDLE_DBUS_ID_MAX) { - pr_err("invalid parameters\n"); - return -EINVAL; - } - - mutex_lock(&phandle->phandle_lock); - - pclient->ab[bus_client] = ab_quota; - pclient->ib[bus_client] = ib_quota; - trace_dpu_perf_update_bus(bus_client, ab_quota, ib_quota); - - list_for_each_entry(client, &phandle->power_client_clist, list) { - for (i = 0; i < DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX; i++) { - if (i == DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT) { - total_ab_nrt += client->ab[i]; - total_ib_nrt += client->ib[i]; - } else { - total_ab_rt += client->ab[i]; - total_ib_rt = max(total_ib_rt, client->ib[i]); - } - } - } - - if (phandle->data_bus_handle[bus_id].data_bus_hdl) - rc = _dpu_power_data_bus_set_quota( - &phandle->data_bus_handle[bus_id], - total_ab_rt, total_ab_nrt, - total_ib_rt, total_ib_nrt); - - mutex_unlock(&phandle->phandle_lock); - - return rc; -} - -static void dpu_power_data_bus_unregister( - struct dpu_power_data_bus_handle *pdbus) -{ - if (pdbus->data_bus_hdl) { - msm_bus_scale_unregister_client(pdbus->data_bus_hdl); - pdbus->data_bus_hdl = 0; - } -} - -static int dpu_power_data_bus_register(struct dpu_power_handle *phandle, - int index) -{ - struct dpu_power_data_bus_handle *pdbus = &phandle->data_bus_handle[index]; - - pdbus->bus_channels = 2; - pdbus->nrt_axi_port_cnt = 0; - pdbus->axi_port_cnt = 1; - - switch (index) { - case DPU_POWER_HANDLE_DBUS_ID_MNOC: - pdbus->data_bus_scale_table = &dpu_data_bus_scale_table; - pdbus->axi_port_cnt = 2; - break; - case DPU_POWER_HANDLE_DBUS_ID_LLCC: - pdbus->data_bus_scale_table = &dpu_llcc_bus_scale_table; - break; - case DPU_POWER_HANDLE_DBUS_ID_EBI: - pdbus->data_bus_scale_table = &dpu_ebi_bus_scale_table; - break; - default: - pr_err("invalid data_bus type: %d", index); - return -EINVAL; - } - - pdbus->data_bus_hdl = msm_bus_scale_register_client( - pdbus->data_bus_scale_table); - if (!pdbus->data_bus_hdl) { - pr_err("data_bus_client register failed\n"); - return -EINVAL; - } - pr_debug("register %s data_bus_hdl=%x\n", data_bus_name[index], - pdbus->data_bus_hdl); - - return 0; -} - -static int dpu_power_reg_bus_register(struct dpu_power_handle *phandle) -{ - phandle->reg_bus_hdl = msm_bus_scale_register_client( - &dpu_reg_bus_scale_table); - if (!phandle->reg_bus_hdl) { - pr_err("reg_bus_client register failed\n"); - return -EINVAL; - } - pr_debug("register reg_bus_hdl=%x\n", phandle->reg_bus_hdl); - - return 0; -} - -static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) -{ - if (reg_bus_hdl) - msm_bus_scale_unregister_client(reg_bus_hdl); -} - -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, - bool enable) -{ - int i; - - if (!phandle) { - pr_err("invalid param\n"); - return -EINVAL; - } - - for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; - i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - phandle->data_bus_handle[i].enable = enable; - - return 0; -} - -static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle *pdbus, - bool enable) -{ - int rc = 0; - - pdbus->enable = enable; - - if (pdbus->data_bus_hdl) - rc = _dpu_power_data_bus_set_quota(pdbus, pdbus->ab_rt, - pdbus->ab_nrt, pdbus->ib_rt, pdbus->ib_nrt); - - if (rc) - pr_err("failed to set data bus vote rc=%d enable:%d\n", - rc, enable); - - return rc; -} - -static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) -{ - int rc = 0; - - if (reg_bus_hdl) - rc = msm_bus_scale_client_update_request(reg_bus_hdl, - usecase_ndx); - if (rc) - pr_err("failed to set reg bus vote rc=%d\n", rc); - - return rc; -} -#else -static int dpu_power_data_bus_register(struct dpu_power_handle *phandle, - int index) -{ - return 0; -} - -static void dpu_power_data_bus_unregister( - struct dpu_power_data_bus_handle *pdbus) -{ -} - -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, - int bus_client, u32 bus_id, - u64 ab_quota, u64 ib_quota) -{ - return 0; -} - -static int dpu_power_reg_bus_register(struct dpu_power_handle *phandle) -{ - return 0; -} - -static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) -{ -} - -static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) -{ - return 0; -} - -static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle *pdbus, - bool enable) -{ - return 0; -} - -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, - bool enable) -{ - return 0; -} -#endif - -int dpu_power_resource_init(struct platform_device *pdev, +void dpu_power_resource_init(struct platform_device *pdev, struct dpu_power_handle *phandle) { - int rc = 0, i; - phandle->dev = &pdev->dev; - rc = dpu_power_reg_bus_register(phandle); - if (rc) { - pr_err("register bus parse failed rc=%d\n", rc); - return rc; - } - - for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; - i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { - rc = dpu_power_data_bus_register(phandle, i); - if (rc) { - pr_err("register data bus parse failed id=%d rc=%d\n", - i, rc); - goto data_bus_err; - } - } - INIT_LIST_HEAD(&phandle->power_client_clist); INIT_LIST_HEAD(&phandle->event_list); mutex_init(&phandle->phandle_lock); - - return rc; - -data_bus_err: - for (i--; i >= 0; i--) - dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); - dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); - return rc; } void dpu_power_resource_deinit(struct platform_device *pdev, @@ -589,7 +112,6 @@ void dpu_power_resource_deinit(struct platform_device *pdev, { struct dpu_power_client *curr_client, *next_client; struct dpu_power_event *curr_event, *next_event; - int i; if (!phandle || !pdev) { pr_err("invalid input param\n"); @@ -615,17 +137,11 @@ void dpu_power_resource_deinit(struct platform_device *pdev, list_del(&curr_event->list); } mutex_unlock(&phandle->phandle_lock); - - for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); - - dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); } int dpu_power_resource_enable(struct dpu_power_handle *phandle, struct dpu_power_client *pclient, bool enable) { - int rc = 0, i; bool changed = false; u32 max_usecase_ndx = VOTE_INDEX_DISABLE, prev_usecase_ndx; struct dpu_power_client *client; @@ -668,53 +184,19 @@ int dpu_power_resource_enable(struct dpu_power_handle *phandle, if (enable) { dpu_power_event_trigger_locked(phandle, DPU_POWER_EVENT_PRE_ENABLE); - - for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { - rc = dpu_power_data_bus_update( - &phandle->data_bus_handle[i], enable); - if (rc) { - pr_err("failed to set data bus vote id=%d rc=%d\n", - i, rc); - goto data_bus_hdl_err; - } - } - - rc = dpu_power_reg_bus_update(phandle->reg_bus_hdl, - max_usecase_ndx); - if (rc) { - pr_err("failed to set reg bus vote rc=%d\n", rc); - goto reg_bus_hdl_err; - } - dpu_power_event_trigger_locked(phandle, DPU_POWER_EVENT_POST_ENABLE); } else { dpu_power_event_trigger_locked(phandle, DPU_POWER_EVENT_PRE_DISABLE); - - dpu_power_reg_bus_update(phandle->reg_bus_hdl, - max_usecase_ndx); - - for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - dpu_power_data_bus_update(&phandle->data_bus_handle[i], - enable); - dpu_power_event_trigger_locked(phandle, DPU_POWER_EVENT_POST_DISABLE); } end: mutex_unlock(&phandle->phandle_lock); - return rc; - -reg_bus_hdl_err: - for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) - dpu_power_data_bus_update(&phandle->data_bus_handle[i], 0); -data_bus_hdl_err: - phandle->current_usecase_ndx = prev_usecase_ndx; - mutex_unlock(&phandle->phandle_lock); - return rc; + return 0; } struct dpu_power_event *dpu_power_handle_register_event( diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h index 193f46886bc2..344f74464eca 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h @@ -97,36 +97,6 @@ struct dpu_power_client { bool active; }; -/** - * struct dpu_power_data_handle: power handle struct for data bus - * @data_bus_scale_table: pointer to bus scaling table - * @data_bus_hdl: current data bus handle - * @axi_port_cnt: number of rt axi ports - * @nrt_axi_port_cnt: number of nrt axi ports - * @bus_channels: number of memory bus channels - * @curr_bw_uc_idx: current use case index of data bus - * @ao_bw_uc_idx: active only use case index of data bus - * @ab_rt: realtime ab quota - * @ib_rt: realtime ib quota - * @ab_nrt: non-realtime ab quota - * @ib_nrt: non-realtime ib quota - * @enable: true if bus is enabled - */ -struct dpu_power_data_bus_handle { - struct msm_bus_scale_pdata *data_bus_scale_table; - u32 data_bus_hdl; - u32 axi_port_cnt; - u32 nrt_axi_port_cnt; - u32 bus_channels; - u32 curr_bw_uc_idx; - u32 ao_bw_uc_idx; - u64 ab_rt; - u64 ib_rt; - u64 ab_nrt; - u64 ib_nrt; - bool enable; -}; - /* * struct dpu_power_event - local event registration structure * @client_name: name of the client registering @@ -151,8 +121,6 @@ struct dpu_power_event { * @phandle_lock: lock to synchronize the enable/disable * @dev: pointer to device structure * @usecase_ndx: current usecase index - * @reg_bus_hdl: current register bus handle - * @data_bus_handle: context structure for data bus control * @event_list: current power handle event list */ struct dpu_power_handle { @@ -160,9 +128,6 @@ struct dpu_power_handle { struct mutex phandle_lock; struct device *dev; u32 current_usecase_ndx; - u32 reg_bus_hdl; - struct dpu_power_data_bus_handle data_bus_handle - [DPU_POWER_HANDLE_DBUS_ID_MAX]; struct list_head event_list; }; @@ -170,10 +135,8 @@ struct dpu_power_handle { * dpu_power_resource_init() - initializes the dpu power handle * @pdev: platform device to search the power resources * @pdata: power handle to store the power resources - * - * Return: error code. */ -int dpu_power_resource_init(struct platform_device *pdev, +void dpu_power_resource_init(struct platform_device *pdev, struct dpu_power_handle *pdata); /** @@ -217,32 +180,6 @@ void dpu_power_client_destroy(struct dpu_power_handle *phandle, int dpu_power_resource_enable(struct dpu_power_handle *pdata, struct dpu_power_client *pclient, bool enable); -/** - * dpu_power_data_bus_state_update() - update data bus state - * @pdata: power handle containing the resources - * @enable: take enable vs disable path - * - * Return: error code. - */ -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, - bool enable); - -/** - * dpu_power_data_bus_set_quota() - set data bus quota for power client - * @phandle: power handle containing the resources - * @client: client information to set quota - * @bus_client: real-time or non-real-time bus client - * @bus_id: identifier of data bus, see DPU_POWER_HANDLE_DBUS_ID - * @ab_quota: arbitrated bus bandwidth - * @ib_quota: instantaneous bus bandwidth - * - * Return: zero if success, or error code otherwise - */ -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, - struct dpu_power_client *pclient, - int bus_client, u32 bus_id, - u64 ab_quota, u64 ib_quota); - /** * dpu_power_data_bus_bandwidth_ctrl() - control data bus bandwidth enable * @phandle: power handle containing the resources -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply related [flat|nested] 8+ messages in thread
[parent not found: <20180628205334.158846-4-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>]
* Re: [DPU PATCH 3/6] drm/msm: Remove dpu bus scaling code [not found] ` <20180628205334.158846-4-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> @ 2018-07-02 17:27 ` ryadav-sgV2jX0FEOL9JmXXK+q4OQ 0 siblings, 0 replies; 8+ messages in thread From: ryadav-sgV2jX0FEOL9JmXXK+q4OQ @ 2018-07-02 17:27 UTC (permalink / raw) To: Sean Paul Cc: linux-arm-msm-u79uwXL29TY76Z2rM5mHXA, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, jsanka-sgV2jX0FEOL9JmXXK+q4OQ, freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, hoegsberg-F7+t8E8rja9g9hUCZPvPmw On 2018-06-29 02:23, Sean Paul wrote: > QC bus scaling isn't upstream yet, so remove the bus scaling code until > it is. Hi Sean, MDP5 driver does have bus_scaling code under DOWNSTREAM_CONFIG_MSM_BUS_SCALING gate. On similar lines we kept the DPU bus_scaling code under the CONFIG_QCOM_BUS_SCALING (which is what used downstream) config for DPU too. But if you think we should remove it till bus_scale driver is upstreamed, I am fine bringing it back at a later point. > > Signed-off-by: Sean Paul <seanpaul@chromium.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c | 35 -- > drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 7 +- > .../gpu/drm/msm/disp/dpu1/dpu_power_handle.c | 522 +----------------- > .../gpu/drm/msm/disp/dpu1/dpu_power_handle.h | 65 +-- > 4 files changed, 4 insertions(+), 625 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > index 1019ce7594ff..41c5191f9056 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c > @@ -221,7 +221,6 @@ int dpu_core_perf_crtc_check(struct drm_crtc *crtc, > static int _dpu_core_perf_crtc_update_bus(struct dpu_kms *kms, > struct drm_crtc *crtc, u32 bus_id) > { > - u64 bw_sum_of_intfs = 0, bus_ab_quota, bus_ib_quota; > struct dpu_core_perf_params perf = { { 0 } }; > enum dpu_crtc_client_type curr_client_type > = dpu_crtc_get_client_type(crtc); > @@ -239,45 +238,11 @@ static int _dpu_core_perf_crtc_update_bus(struct > dpu_kms *kms, > max(perf.max_per_pipe_ib[bus_id], > dpu_cstate->new_perf.max_per_pipe_ib[bus_id]); > > - bw_sum_of_intfs += dpu_cstate->new_perf.bw_ctl[bus_id]; > - > DPU_DEBUG("crtc=%d bus_id=%d bw=%llu\n", > tmp_crtc->base.id, bus_id, > dpu_cstate->new_perf.bw_ctl[bus_id]); > } > } > - > - bus_ab_quota = max(bw_sum_of_intfs, > kms->perf.perf_tune.min_bus_vote); > - bus_ib_quota = perf.max_per_pipe_ib[bus_id]; > - > - if (kms->perf.perf_tune.mode == DPU_PERF_MODE_FIXED) { > - bus_ab_quota = kms->perf.fix_core_ab_vote; > - bus_ib_quota = kms->perf.fix_core_ib_vote; > - } > - > - switch (curr_client_type) { > - case NRT_CLIENT: > - ret = dpu_power_data_bus_set_quota( > - &kms->phandle, kms->core_client, > - DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT, > - bus_id, bus_ab_quota, bus_ib_quota); > - DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "nrt", > - bus_id, bus_ab_quota, bus_ib_quota); > - break; > - > - case RT_CLIENT: > - ret = dpu_power_data_bus_set_quota( > - &kms->phandle, kms->core_client, > - DPU_POWER_HANDLE_DATA_BUS_CLIENT_RT, > - bus_id, bus_ab_quota, bus_ib_quota); > - DPU_DEBUG("client:%s bus_id=%d ab=%llu ib=%llu\n", "rt", > - bus_id, bus_ab_quota, bus_ib_quota); > - break; > - > - default: > - DPU_ERROR("invalid client type:%d\n", curr_client_type); > - break; > - } > return ret; > } > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > index 3889e4a7dfbc..605da85bb53f 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c > @@ -1265,11 +1265,7 @@ static int dpu_bind(struct device *dev, struct > device *master, void *data) > goto clk_rate_error; > } > > - ret = dpu_power_resource_init(pdev, &dpu_kms->phandle); > - if (ret) { > - pr_err("dpu power resource init failed\n"); > - goto power_init_fail; > - } > + dpu_power_resource_init(pdev, &dpu_kms->phandle); > > platform_set_drvdata(pdev, dpu_kms); > > @@ -1283,7 +1279,6 @@ static int dpu_bind(struct device *dev, struct > device *master, void *data) > priv->kms = &dpu_kms->base; > return ret; > > -power_init_fail: > clk_rate_error: > msm_dss_put_clk(mp->clk_config, mp->num_clk); > clk_get_error: > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c > b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c > index f997bd9e109c..a68f1249388c 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.c > @@ -24,132 +24,6 @@ > #include "dpu_power_handle.h" > #include "dpu_trace.h" > > -#ifdef CONFIG_QCOM_BUS_SCALING > -#include <linux/msm-bus.h> > -#include <linux/msm-bus-board.h> > - > -#define DPU_BUS_VECTOR_ENTRY(src_val, dst_val, ab_val, ib_val) \ > - { \ > - .src = src_val, \ > - .dst = dst_val, \ > - .ab = (ab_val), \ > - .ib = (ib_val), \ > - } > - > -static struct msm_bus_vectors dpu_reg_bus_vectors[] = { > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, > - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 0), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, > - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 76800000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, > - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 150000000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_FIRST, > - MSM_BUS_SLAVE_DISPLAY_CFG, 0, 300000000), > -}; > - > -static struct msm_bus_paths dpu_reg_bus_usecases[] = { { > - .num_paths = 1, > - .vectors = &dpu_reg_bus_vectors[0], > -}, { > - .num_paths = 1, > - .vectors = &dpu_reg_bus_vectors[1], > -}, { > - .num_paths = 1, > - .vectors = &dpu_reg_bus_vectors[2], > -}, { > - .num_paths = 1, > - .vectors = &dpu_reg_bus_vectors[3], > -} }; > - > -static struct msm_bus_scale_pdata dpu_reg_bus_scale_table = { > - .usecase = dpu_reg_bus_usecases, > - .num_usecases = ARRAY_SIZE(dpu_reg_bus_usecases), > - .name = "mdss_reg", > -}; > - > -static struct msm_bus_vectors dpu_data_bus_vectors[] = { > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0, > - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 0), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1, > - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 0), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0, > - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1, > - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT0, > - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MDP_PORT1, > - MSM_BUS_SLAVE_MNOC_HF_MEM_NOC, 0, 6400000000), > -}; > - > -static struct msm_bus_paths dpu_data_bus_usecases[] = { { > - .num_paths = 2, > - .vectors = &dpu_data_bus_vectors[0], > -}, { > - .num_paths = 2, > - .vectors = &dpu_data_bus_vectors[2], > -}, { > - .num_paths = 2, > - .vectors = &dpu_data_bus_vectors[4], > -} }; > - > -static struct msm_bus_scale_pdata dpu_data_bus_scale_table = { > - .usecase = dpu_data_bus_usecases, > - .num_usecases = ARRAY_SIZE(dpu_data_bus_usecases), > - .name = "mdss_mnoc", > -}; > - > -static struct msm_bus_vectors dpu_llcc_bus_vectors[] = { > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC, > - MSM_BUS_SLAVE_LLCC, 0, 0), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC, > - MSM_BUS_SLAVE_LLCC, 0, 6400000000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_MNOC_HF_MEM_NOC, > - MSM_BUS_SLAVE_LLCC, 0, 6400000000), > -}; > - > -static struct msm_bus_paths dpu_llcc_bus_usecases[] = { { > - .num_paths = 1, > - .vectors = &dpu_llcc_bus_vectors[0], > -}, { > - .num_paths = 1, > - .vectors = &dpu_llcc_bus_vectors[1], > -}, { > - .num_paths = 1, > - .vectors = &dpu_llcc_bus_vectors[2], > -} }; > -static struct msm_bus_scale_pdata dpu_llcc_bus_scale_table = { > - .usecase = dpu_llcc_bus_usecases, > - .num_usecases = ARRAY_SIZE(dpu_llcc_bus_usecases), > - .name = "mdss_llcc", > -}; > - > -static struct msm_bus_vectors dpu_ebi_bus_vectors[] = { > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC, > - MSM_BUS_SLAVE_EBI_CH0, 0, 0), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC, > - MSM_BUS_SLAVE_EBI_CH0, 0, 6400000000), > - DPU_BUS_VECTOR_ENTRY(MSM_BUS_MASTER_LLCC, > - MSM_BUS_SLAVE_EBI_CH0, 0, 6400000000), > -}; > - > -static struct msm_bus_paths dpu_ebi_bus_usecases[] = { { > - .num_paths = 1, > - .vectors = &dpu_ebi_bus_vectors[0], > -}, { > - .num_paths = 1, > - .vectors = &dpu_ebi_bus_vectors[1], > -}, { > - .num_paths = 1, > - .vectors = &dpu_ebi_bus_vectors[2], > -} }; > -static struct msm_bus_scale_pdata dpu_ebi_bus_scale_table = { > - .usecase = dpu_ebi_bus_usecases, > - .num_usecases = ARRAY_SIZE(dpu_ebi_bus_usecases), > - .name = "mdss_ebi", > -}; > -#endif > - > static const char *data_bus_name[DPU_POWER_HANDLE_DBUS_ID_MAX] = { > [DPU_POWER_HANDLE_DBUS_ID_MNOC] = "qcom,dpu-data-bus", > [DPU_POWER_HANDLE_DBUS_ID_LLCC] = "qcom,dpu-llcc-bus", > @@ -222,366 +96,15 @@ void dpu_power_client_destroy(struct > dpu_power_handle *phandle, > } > } dpu_power_handle_get_dbus_name is unused, please remove it. Also data_bus_name can be removed. Thanks, Rajesh > > -#ifdef CONFIG_QCOM_BUS_SCALING > - > -#define MAX_AXI_PORT_COUNT 3 > - > -static int _dpu_power_data_bus_set_quota( > - struct dpu_power_data_bus_handle *pdbus, > - u64 ab_quota_rt, u64 ab_quota_nrt, > - u64 ib_quota_rt, u64 ib_quota_nrt) > -{ > - int new_uc_idx; > - u64 ab_quota[MAX_AXI_PORT_COUNT] = {0, 0}; > - u64 ib_quota[MAX_AXI_PORT_COUNT] = {0, 0}; > - int rc; > - > - if (pdbus->data_bus_hdl < 1) { > - pr_err("invalid bus handle %d\n", pdbus->data_bus_hdl); > - return -EINVAL; > - } > - > - pdbus->ab_rt = ab_quota_rt; > - pdbus->ib_rt = ib_quota_rt; > - pdbus->ab_nrt = ab_quota_nrt; > - pdbus->ib_nrt = ib_quota_nrt; > - > - if (pdbus->enable) { > - ab_quota_rt = max_t(u64, ab_quota_rt, > - DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); > - ib_quota_rt = max_t(u64, ib_quota_rt, > - DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); > - ab_quota_nrt = max_t(u64, ab_quota_nrt, > - DPU_POWER_HANDLE_ENABLE_BUS_AB_QUOTA); > - ib_quota_nrt = max_t(u64, ib_quota_nrt, > - DPU_POWER_HANDLE_ENABLE_BUS_IB_QUOTA); > - } else { > - ab_quota_rt = min_t(u64, ab_quota_rt, > - DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); > - ib_quota_rt = min_t(u64, ib_quota_rt, > - DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); > - ab_quota_nrt = min_t(u64, ab_quota_nrt, > - DPU_POWER_HANDLE_DISABLE_BUS_AB_QUOTA); > - ib_quota_nrt = min_t(u64, ib_quota_nrt, > - DPU_POWER_HANDLE_DISABLE_BUS_IB_QUOTA); > - } > - > - if (!ab_quota_rt && !ab_quota_nrt && !ib_quota_rt && !ib_quota_nrt) > { > - new_uc_idx = 0; > - } else { > - int i; > - struct msm_bus_vectors *vect = NULL; > - struct msm_bus_scale_pdata *bw_table = > - pdbus->data_bus_scale_table; > - u32 nrt_axi_port_cnt = pdbus->nrt_axi_port_cnt; > - u32 total_axi_port_cnt = pdbus->axi_port_cnt; > - u32 rt_axi_port_cnt = total_axi_port_cnt - nrt_axi_port_cnt; > - > - if (!bw_table || !total_axi_port_cnt || > - total_axi_port_cnt > MAX_AXI_PORT_COUNT) { > - pr_err("invalid input\n"); > - return -EINVAL; > - } > - > - if (pdbus->bus_channels) { > - ib_quota_rt = div_u64(ib_quota_rt, > - pdbus->bus_channels); > - ib_quota_nrt = div_u64(ib_quota_nrt, > - pdbus->bus_channels); > - } > - > - if (nrt_axi_port_cnt) { > - > - ab_quota_rt = div_u64(ab_quota_rt, rt_axi_port_cnt); > - ab_quota_nrt = div_u64(ab_quota_nrt, nrt_axi_port_cnt); > - > - for (i = 0; i < total_axi_port_cnt; i++) { > - if (i < rt_axi_port_cnt) { > - ab_quota[i] = ab_quota_rt; > - ib_quota[i] = ib_quota_rt; > - } else { > - ab_quota[i] = ab_quota_nrt; > - ib_quota[i] = ib_quota_nrt; > - } > - } > - } else { > - ab_quota[0] = div_u64(ab_quota_rt + ab_quota_nrt, > - total_axi_port_cnt); > - ib_quota[0] = ib_quota_rt + ib_quota_nrt; > - > - for (i = 1; i < total_axi_port_cnt; i++) { > - ab_quota[i] = ab_quota[0]; > - ib_quota[i] = ib_quota[0]; > - } > - } > - > - new_uc_idx = (pdbus->curr_bw_uc_idx % > - (bw_table->num_usecases - 1)) + 1; > - > - for (i = 0; i < total_axi_port_cnt; i++) { > - vect = &bw_table->usecase[new_uc_idx].vectors[i]; > - vect->ab = ab_quota[i]; > - vect->ib = ib_quota[i]; > - > - pr_debug( > - "%s uc_idx=%d %s path idx=%d ab=%llu ib=%llu\n", > - bw_table->name, > - new_uc_idx, (i < rt_axi_port_cnt) ? "rt" : "nrt" > - , i, vect->ab, vect->ib); > - } > - } > - pdbus->curr_bw_uc_idx = new_uc_idx; > - pdbus->ao_bw_uc_idx = new_uc_idx; > - > - DPU_ATRACE_BEGIN("msm_bus_scale_req"); > - rc = msm_bus_scale_client_update_request(pdbus->data_bus_hdl, > - new_uc_idx); > - DPU_ATRACE_END("msm_bus_scale_req"); > - > - return rc; > -} > - > -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, > - struct dpu_power_client *pclient, > - int bus_client, u32 bus_id, > - u64 ab_quota, u64 ib_quota) > -{ > - int rc = 0; > - int i; > - u64 total_ab_rt = 0, total_ib_rt = 0; > - u64 total_ab_nrt = 0, total_ib_nrt = 0; > - struct dpu_power_client *client; > - > - if (!phandle || !pclient || > - bus_client >= DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX || > - bus_id >= DPU_POWER_HANDLE_DBUS_ID_MAX) { > - pr_err("invalid parameters\n"); > - return -EINVAL; > - } > - > - mutex_lock(&phandle->phandle_lock); > - > - pclient->ab[bus_client] = ab_quota; > - pclient->ib[bus_client] = ib_quota; > - trace_dpu_perf_update_bus(bus_client, ab_quota, ib_quota); > - > - list_for_each_entry(client, &phandle->power_client_clist, list) { > - for (i = 0; i < DPU_POWER_HANDLE_DATA_BUS_CLIENT_MAX; i++) { > - if (i == DPU_POWER_HANDLE_DATA_BUS_CLIENT_NRT) { > - total_ab_nrt += client->ab[i]; > - total_ib_nrt += client->ib[i]; > - } else { > - total_ab_rt += client->ab[i]; > - total_ib_rt = max(total_ib_rt, client->ib[i]); > - } > - } > - } > - > - if (phandle->data_bus_handle[bus_id].data_bus_hdl) > - rc = _dpu_power_data_bus_set_quota( > - &phandle->data_bus_handle[bus_id], > - total_ab_rt, total_ab_nrt, > - total_ib_rt, total_ib_nrt); > - > - mutex_unlock(&phandle->phandle_lock); > - > - return rc; > -} > - > -static void dpu_power_data_bus_unregister( > - struct dpu_power_data_bus_handle *pdbus) > -{ > - if (pdbus->data_bus_hdl) { > - msm_bus_scale_unregister_client(pdbus->data_bus_hdl); > - pdbus->data_bus_hdl = 0; > - } > -} > - > -static int dpu_power_data_bus_register(struct dpu_power_handle > *phandle, > - int index) > -{ > - struct dpu_power_data_bus_handle *pdbus = > &phandle->data_bus_handle[index]; > - > - pdbus->bus_channels = 2; > - pdbus->nrt_axi_port_cnt = 0; > - pdbus->axi_port_cnt = 1; > - > - switch (index) { > - case DPU_POWER_HANDLE_DBUS_ID_MNOC: > - pdbus->data_bus_scale_table = &dpu_data_bus_scale_table; > - pdbus->axi_port_cnt = 2; > - break; > - case DPU_POWER_HANDLE_DBUS_ID_LLCC: > - pdbus->data_bus_scale_table = &dpu_llcc_bus_scale_table; > - break; > - case DPU_POWER_HANDLE_DBUS_ID_EBI: > - pdbus->data_bus_scale_table = &dpu_ebi_bus_scale_table; > - break; > - default: > - pr_err("invalid data_bus type: %d", index); > - return -EINVAL; > - } > - > - pdbus->data_bus_hdl = msm_bus_scale_register_client( > - pdbus->data_bus_scale_table); > - if (!pdbus->data_bus_hdl) { > - pr_err("data_bus_client register failed\n"); > - return -EINVAL; > - } > - pr_debug("register %s data_bus_hdl=%x\n", data_bus_name[index], > - pdbus->data_bus_hdl); > - > - return 0; > -} > - > -static int dpu_power_reg_bus_register(struct dpu_power_handle > *phandle) > -{ > - phandle->reg_bus_hdl = msm_bus_scale_register_client( > - &dpu_reg_bus_scale_table); > - if (!phandle->reg_bus_hdl) { > - pr_err("reg_bus_client register failed\n"); > - return -EINVAL; > - } > - pr_debug("register reg_bus_hdl=%x\n", phandle->reg_bus_hdl); > - > - return 0; > -} > - > -static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) > -{ > - if (reg_bus_hdl) > - msm_bus_scale_unregister_client(reg_bus_hdl); > -} > - > -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, > - bool enable) > -{ > - int i; > - > - if (!phandle) { > - pr_err("invalid param\n"); > - return -EINVAL; > - } > - > - for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; > - i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) > - phandle->data_bus_handle[i].enable = enable; > - > - return 0; > -} > - > -static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle > *pdbus, > - bool enable) > -{ > - int rc = 0; > - > - pdbus->enable = enable; > - > - if (pdbus->data_bus_hdl) > - rc = _dpu_power_data_bus_set_quota(pdbus, pdbus->ab_rt, > - pdbus->ab_nrt, pdbus->ib_rt, pdbus->ib_nrt); > - > - if (rc) > - pr_err("failed to set data bus vote rc=%d enable:%d\n", > - rc, enable); > - > - return rc; > -} > - > -static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) > -{ > - int rc = 0; > - > - if (reg_bus_hdl) > - rc = msm_bus_scale_client_update_request(reg_bus_hdl, > - usecase_ndx); > - if (rc) > - pr_err("failed to set reg bus vote rc=%d\n", rc); > - > - return rc; > -} > -#else > -static int dpu_power_data_bus_register(struct dpu_power_handle > *phandle, > - int index) > -{ > - return 0; > -} > - > -static void dpu_power_data_bus_unregister( > - struct dpu_power_data_bus_handle *pdbus) > -{ > -} > - > -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, > - struct dpu_power_client *pclient, > - int bus_client, u32 bus_id, > - u64 ab_quota, u64 ib_quota) > -{ > - return 0; > -} > - > -static int dpu_power_reg_bus_register(struct dpu_power_handle > *phandle) > -{ > - return 0; > -} > - > -static void dpu_power_reg_bus_unregister(u32 reg_bus_hdl) > -{ > -} > - > -static int dpu_power_reg_bus_update(u32 reg_bus_hdl, u32 usecase_ndx) > -{ > - return 0; > -} > - > -static int dpu_power_data_bus_update(struct dpu_power_data_bus_handle > *pdbus, > - bool enable) > -{ > - return 0; > -} > - > -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, > - bool enable) > -{ > - return 0; > -} > -#endif > - > -int dpu_power_resource_init(struct platform_device *pdev, > +void dpu_power_resource_init(struct platform_device *pdev, > struct dpu_power_handle *phandle) > { > - int rc = 0, i; > - > phandle->dev = &pdev->dev; > > - rc = dpu_power_reg_bus_register(phandle); > - if (rc) { > - pr_err("register bus parse failed rc=%d\n", rc); > - return rc; > - } > - > - for (i = DPU_POWER_HANDLE_DBUS_ID_MNOC; > - i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { > - rc = dpu_power_data_bus_register(phandle, i); > - if (rc) { > - pr_err("register data bus parse failed id=%d rc=%d\n", > - i, rc); > - goto data_bus_err; > - } > - } > - > INIT_LIST_HEAD(&phandle->power_client_clist); > INIT_LIST_HEAD(&phandle->event_list); > > mutex_init(&phandle->phandle_lock); > - > - return rc; > - > -data_bus_err: > - for (i--; i >= 0; i--) > - dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); > - dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); > - return rc; > } > > void dpu_power_resource_deinit(struct platform_device *pdev, > @@ -589,7 +112,6 @@ void dpu_power_resource_deinit(struct > platform_device *pdev, > { > struct dpu_power_client *curr_client, *next_client; > struct dpu_power_event *curr_event, *next_event; > - int i; > > if (!phandle || !pdev) { > pr_err("invalid input param\n"); > @@ -615,17 +137,11 @@ void dpu_power_resource_deinit(struct > platform_device *pdev, > list_del(&curr_event->list); > } > mutex_unlock(&phandle->phandle_lock); > - > - for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) > - dpu_power_data_bus_unregister(&phandle->data_bus_handle[i]); > - > - dpu_power_reg_bus_unregister(phandle->reg_bus_hdl); > } > > int dpu_power_resource_enable(struct dpu_power_handle *phandle, > struct dpu_power_client *pclient, bool enable) > { > - int rc = 0, i; > bool changed = false; > u32 max_usecase_ndx = VOTE_INDEX_DISABLE, prev_usecase_ndx; > struct dpu_power_client *client; > @@ -668,53 +184,19 @@ int dpu_power_resource_enable(struct > dpu_power_handle *phandle, > if (enable) { > dpu_power_event_trigger_locked(phandle, > DPU_POWER_EVENT_PRE_ENABLE); > - > - for (i = 0; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) { > - rc = dpu_power_data_bus_update( > - &phandle->data_bus_handle[i], enable); > - if (rc) { > - pr_err("failed to set data bus vote id=%d rc=%d\n", > - i, rc); > - goto data_bus_hdl_err; > - } > - } > - > - rc = dpu_power_reg_bus_update(phandle->reg_bus_hdl, > - max_usecase_ndx); > - if (rc) { > - pr_err("failed to set reg bus vote rc=%d\n", rc); > - goto reg_bus_hdl_err; > - } > - > dpu_power_event_trigger_locked(phandle, > DPU_POWER_EVENT_POST_ENABLE); > > } else { > dpu_power_event_trigger_locked(phandle, > DPU_POWER_EVENT_PRE_DISABLE); > - > - dpu_power_reg_bus_update(phandle->reg_bus_hdl, > - max_usecase_ndx); > - > - for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) > - dpu_power_data_bus_update(&phandle->data_bus_handle[i], > - enable); > - > dpu_power_event_trigger_locked(phandle, > DPU_POWER_EVENT_POST_DISABLE); > } > > end: > mutex_unlock(&phandle->phandle_lock); > - return rc; > - > -reg_bus_hdl_err: > - for (i = 0 ; i < DPU_POWER_HANDLE_DBUS_ID_MAX; i++) > - dpu_power_data_bus_update(&phandle->data_bus_handle[i], 0); > -data_bus_hdl_err: > - phandle->current_usecase_ndx = prev_usecase_ndx; > - mutex_unlock(&phandle->phandle_lock); > - return rc; > + return 0; > } > > struct dpu_power_event *dpu_power_handle_register_event( > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h > b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h > index 193f46886bc2..344f74464eca 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_power_handle.h > @@ -97,36 +97,6 @@ struct dpu_power_client { > bool active; > }; > > -/** > - * struct dpu_power_data_handle: power handle struct for data bus > - * @data_bus_scale_table: pointer to bus scaling table > - * @data_bus_hdl: current data bus handle > - * @axi_port_cnt: number of rt axi ports > - * @nrt_axi_port_cnt: number of nrt axi ports > - * @bus_channels: number of memory bus channels > - * @curr_bw_uc_idx: current use case index of data bus > - * @ao_bw_uc_idx: active only use case index of data bus > - * @ab_rt: realtime ab quota > - * @ib_rt: realtime ib quota > - * @ab_nrt: non-realtime ab quota > - * @ib_nrt: non-realtime ib quota > - * @enable: true if bus is enabled > - */ > -struct dpu_power_data_bus_handle { > - struct msm_bus_scale_pdata *data_bus_scale_table; > - u32 data_bus_hdl; > - u32 axi_port_cnt; > - u32 nrt_axi_port_cnt; > - u32 bus_channels; > - u32 curr_bw_uc_idx; > - u32 ao_bw_uc_idx; > - u64 ab_rt; > - u64 ib_rt; > - u64 ab_nrt; > - u64 ib_nrt; > - bool enable; > -}; > - > /* > * struct dpu_power_event - local event registration structure > * @client_name: name of the client registering > @@ -151,8 +121,6 @@ struct dpu_power_event { > * @phandle_lock: lock to synchronize the enable/disable > * @dev: pointer to device structure > * @usecase_ndx: current usecase index > - * @reg_bus_hdl: current register bus handle > - * @data_bus_handle: context structure for data bus control > * @event_list: current power handle event list > */ > struct dpu_power_handle { > @@ -160,9 +128,6 @@ struct dpu_power_handle { > struct mutex phandle_lock; > struct device *dev; > u32 current_usecase_ndx; > - u32 reg_bus_hdl; > - struct dpu_power_data_bus_handle data_bus_handle > - [DPU_POWER_HANDLE_DBUS_ID_MAX]; > struct list_head event_list; > }; > > @@ -170,10 +135,8 @@ struct dpu_power_handle { > * dpu_power_resource_init() - initializes the dpu power handle > * @pdev: platform device to search the power resources > * @pdata: power handle to store the power resources > - * > - * Return: error code. > */ > -int dpu_power_resource_init(struct platform_device *pdev, > +void dpu_power_resource_init(struct platform_device *pdev, > struct dpu_power_handle *pdata); > > /** > @@ -217,32 +180,6 @@ void dpu_power_client_destroy(struct > dpu_power_handle *phandle, > int dpu_power_resource_enable(struct dpu_power_handle *pdata, > struct dpu_power_client *pclient, bool enable); > > -/** > - * dpu_power_data_bus_state_update() - update data bus state > - * @pdata: power handle containing the resources > - * @enable: take enable vs disable path > - * > - * Return: error code. > - */ > -int dpu_power_data_bus_state_update(struct dpu_power_handle *phandle, > - bool enable); > - > -/** > - * dpu_power_data_bus_set_quota() - set data bus quota for power > client > - * @phandle: power handle containing the resources > - * @client: client information to set quota > - * @bus_client: real-time or non-real-time bus client > - * @bus_id: identifier of data bus, see DPU_POWER_HANDLE_DBUS_ID > - * @ab_quota: arbitrated bus bandwidth > - * @ib_quota: instantaneous bus bandwidth > - * > - * Return: zero if success, or error code otherwise > - */ > -int dpu_power_data_bus_set_quota(struct dpu_power_handle *phandle, > - struct dpu_power_client *pclient, > - int bus_client, u32 bus_id, > - u64 ab_quota, u64 ib_quota); > - > /** > * dpu_power_data_bus_bandwidth_ctrl() - control data bus bandwidth > enable > * @phandle: power handle containing the resources _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply [flat|nested] 8+ messages in thread
* [DPU PATCH 4/6] drm/msm: Remove ion from dpu [not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> ` (2 preceding siblings ...) 2018-06-28 20:53 ` [DPU PATCH 3/6] drm/msm: Remove dpu bus scaling code Sean Paul @ 2018-06-28 20:53 ` Sean Paul 2018-06-28 20:53 ` [DPU PATCH 5/6] drm/msm: Fix dpu compile when CONFIG_DEBUG_FS !defined Sean Paul 2018-06-28 20:53 ` [DPU PATCH 6/6] drm/msm: Remove remnants of dsi-staging Sean Paul 5 siblings, 0 replies; 8+ messages in thread From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw) To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ It's mostly gone and won't compile with CONFIG_ION, so remove the remaining pieces. Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 25 ------------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 4 ---- 2 files changed, 29 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 605da85bb53f..fcb94f01d8ad 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -599,15 +599,6 @@ static int _dpu_kms_drm_obj_init(struct dpu_kms *dpu_kms) return ret; } -#ifdef CONFIG_ION -static void dpu_kms_set_gem_flags(struct msm_gem_object *msm_obj, - uint32_t flags) -{ - if (msm_obj) - msm_obj->flags |= flags; -} -#endif - #ifdef CONFIG_DEBUG_FS static int dpu_kms_debugfs_init(struct msm_kms *kms, struct drm_minor *minor) { @@ -657,13 +648,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) _dpu_debugfs_destroy(dpu_kms); _dpu_kms_mmu_destroy(dpu_kms); -#ifdef CONFIG_ION - if (dpu_kms->iclient) { - ion_client_destroy(dpu_kms->iclient); - dpu_kms->iclient = NULL; - } -#endif - if (dpu_kms->catalog) { for (i = 0; i < dpu_kms->catalog->vbif_count; i++) { u32 vbif_idx = dpu_kms->catalog->vbif[i].id; @@ -1131,15 +1115,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms) } } -#ifdef CONFIG_ION - dpu_kms->iclient = msm_ion_client_create(dev->unique); - if (IS_ERR(dpu_kms->iclient)) { - rc = PTR_ERR(dpu_kms->iclient); - DPU_DEBUG("msm_ion_client not available: %d\n", rc); - dpu_kms->iclient = NULL; - } -#endif - rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog, &dpu_kms->phandle, _dpu_kms_get_clk(dpu_kms, "core_clk")); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index f7a3915b2907..407c1ed27fe6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -19,9 +19,6 @@ #ifndef __DPU_KMS_H__ #define __DPU_KMS_H__ -#ifdef CONFIG_CHROME_MSM_ION -#include <linux/msm_ion.h> -#endif #include "msm_drv.h" #include "msm_kms.h" #include "msm_mmu.h" @@ -118,7 +115,6 @@ struct dpu_kms { struct dpu_power_handle phandle; struct dpu_power_client *core_client; - struct ion_client *iclient; struct dpu_power_event *power_event; /* directory entry for debugfs */ -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [DPU PATCH 5/6] drm/msm: Fix dpu compile when CONFIG_DEBUG_FS !defined [not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> ` (3 preceding siblings ...) 2018-06-28 20:53 ` [DPU PATCH 4/6] drm/msm: Remove ion from dpu Sean Paul @ 2018-06-28 20:53 ` Sean Paul 2018-06-28 20:53 ` [DPU PATCH 6/6] drm/msm: Remove remnants of dsi-staging Sean Paul 5 siblings, 0 replies; 8+ messages in thread From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw) To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/msm/Makefile | 4 ++-- drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/Makefile b/drivers/gpu/drm/msm/Makefile index 3624b5af5ecd..1639ea8c0d13 100644 --- a/drivers/gpu/drm/msm/Makefile +++ b/drivers/gpu/drm/msm/Makefile @@ -49,7 +49,6 @@ msm-y := \ disp/dpu1/dpu_core_irq.o \ disp/dpu1/dpu_core_perf.o \ disp/dpu1/dpu_crtc.o \ - disp/dpu1/dpu_dbg.o \ disp/dpu1/dpu_encoder.o \ disp/dpu1/dpu_encoder_phys_cmd.o \ disp/dpu1/dpu_encoder_phys_vid.o \ @@ -92,7 +91,8 @@ msm-y := \ msm_ringbuffer.o \ msm_submitqueue.o -msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o +msm-$(CONFIG_DEBUG_FS) += adreno/a5xx_debugfs.o \ + disp/dpu1/dpu_dbg.o msm-$(CONFIG_DRM_FBDEV_EMULATION) += msm_fbdev.o msm-$(CONFIG_COMMON_CLK) += disp/mdp4/mdp4_lvds_pll.o diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h index 05504e676f6a..89edf2526aca 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h @@ -98,11 +98,11 @@ static inline void dpu_dbg_destroy(void) } static inline void dpu_dbg_dump(bool queue_work, const char *name, - bool dump_dbgbus_dpu, bool dump_dbgbus_vbif_rt); + bool dump_dbgbus_dpu, bool dump_dbgbus_vbif_rt) { } -void dpu_dbg_set_dpu_top_offset(u32 blk_off) +static inline void dpu_dbg_set_dpu_top_offset(u32 blk_off) { } -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply related [flat|nested] 8+ messages in thread
* [DPU PATCH 6/6] drm/msm: Remove remnants of dsi-staging [not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org> ` (4 preceding siblings ...) 2018-06-28 20:53 ` [DPU PATCH 5/6] drm/msm: Fix dpu compile when CONFIG_DEBUG_FS !defined Sean Paul @ 2018-06-28 20:53 ` Sean Paul 5 siblings, 0 replies; 8+ messages in thread From: Sean Paul @ 2018-06-28 20:53 UTC (permalink / raw) To: freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA Cc: jsanka-sgV2jX0FEOL9JmXXK+q4OQ, robdclark-Re5JQEeQqe8AvxtiuMwx3w, Sean Paul, hoegsberg-F7+t8E8rja9g9hUCZPvPmw, abhinavk-sgV2jX0FEOL9JmXXK+q4OQ Signed-off-by: Sean Paul <seanpaul@chromium.org> --- drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h | 13 ------------- 1 file changed, 13 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h index 89edf2526aca..1e6fa945f98b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_dbg.h @@ -68,15 +68,6 @@ void dpu_dbg_dump(bool queue_work, const char *name, bool dump_dbgbus_dpu, */ void dpu_dbg_set_dpu_top_offset(u32 blk_off); -/** - * dsi_ctrl_debug_dump - dump dsi debug dump status - */ -#if defined(CONFIG_DRM_MSM_DSI_STAGING) -void dsi_ctrl_debug_dump(void); -#else -static inline void dsi_ctrl_debug_dump(void) {} -#endif - #else static inline void dpu_dbg_init_dbg_buses(u32 hwversion) @@ -106,10 +97,6 @@ static inline void dpu_dbg_set_dpu_top_offset(u32 blk_off) { } -static inline void dsi_ctrl_debug_dump(void) -{ -} - #endif /* defined(CONFIG_DEBUG_FS) */ -- Sean Paul, Software Engineer, Google / Chromium OS _______________________________________________ Freedreno mailing list Freedreno@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/freedreno ^ permalink raw reply related [flat|nested] 8+ messages in thread
end of thread, other threads:[~2018-07-02 17:27 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2018-06-28 20:53 [DPU PATCH 0/6] drm/msm: Fix dpu compile for unlikely #ifdef paths Sean Paul
[not found] ` <20180628205334.158846-1-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2018-06-28 20:53 ` [DPU PATCH 1/6] drm/msm: Remove DPU_DBG->pr_err ifdef gate Sean Paul
2018-06-28 20:53 ` [DPU PATCH 2/6] drm/msm: Alphabetize dpu files in Makefile Sean Paul
2018-06-28 20:53 ` [DPU PATCH 3/6] drm/msm: Remove dpu bus scaling code Sean Paul
[not found] ` <20180628205334.158846-4-seanpaul-F7+t8E8rja9g9hUCZPvPmw@public.gmane.org>
2018-07-02 17:27 ` ryadav-sgV2jX0FEOL9JmXXK+q4OQ
2018-06-28 20:53 ` [DPU PATCH 4/6] drm/msm: Remove ion from dpu Sean Paul
2018-06-28 20:53 ` [DPU PATCH 5/6] drm/msm: Fix dpu compile when CONFIG_DEBUG_FS !defined Sean Paul
2018-06-28 20:53 ` [DPU PATCH 6/6] drm/msm: Remove remnants of dsi-staging Sean Paul
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox