Linux ARM-MSM sub-architecture
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From: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
To: Marijn Suijten <marijn.suijten@somainline.org>,
	Konrad Dybcio <konrad.dybcio@linaro.org>
Cc: linux-arm-msm@vger.kernel.org, andersson@kernel.org,
	agross@kernel.org, krzysztof.kozlowski@linaro.org,
	Rob Clark <robdclark@gmail.com>,
	Abhinav Kumar <quic_abhinavk@quicinc.com>,
	Sean Paul <sean@poorly.run>, David Airlie <airlied@gmail.com>,
	Daniel Vetter <daniel@ffwll.ch>, Robert Foss <rfoss@kernel.org>,
	AngeloGioacchino Del Regno 
	<angelogioacchino.delregno@somainline.org>,
	dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH 05/10] drm/msm/dpu: Allow variable SSPP/INTF_BLK size
Date: Mon, 13 Feb 2023 13:38:33 +0200	[thread overview]
Message-ID: <e6653ceb-bce1-9552-019d-278f455ba8a5@linaro.org> (raw)
In-Reply-To: <20230213111220.ietr4aro6xu4emtu@SoMainline.org>

On 13/02/2023 13:12, Marijn Suijten wrote:
> On 2023-02-11 13:26:51, Konrad Dybcio wrote:
>> These blocks are of variable length on different SoCs. Set the
>> correct values where I was able to retrieve it from downstream
>> DTs and leave the old defaults (0x1c8 for sspp and 0x280 for
>> intf) otherwise.
>>
>> Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
>> ---
>>   .../gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c    | 242 +++++++++---------
>>   1 file changed, 121 insertions(+), 121 deletions(-)
>>
>> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
>> index 802050118345..d9ef1e133c1e 100644
>> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
>> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> [..]
>> @@ -1848,10 +1848,10 @@ static struct dpu_dsc_cfg sm8150_dsc[] = {
>>   /*************************************************************
>>    * INTF sub blocks config
>>    *************************************************************/
>> -#define INTF_BLK(_name, _id, _base, _type, _ctrl_id, _progfetch, _features, _reg, _underrun_bit, _vsync_bit) \
>> +#define INTF_BLK(_name, _id, _base, _len, _type, _ctrl_id, _progfetch, _features, _reg, _underrun_bit, _vsync_bit) \
> 
> Dmitry and I discussed in #freedreno to instead add the INTF_BLK_DSI_TE
> macro that accounts for the INTF TE registers using this higher register
> area, as well as an extended signature to configure extra interrupts.

Yes, that's still the plan. It's slightly painful that we are touching 
this are simultaneously.

> 
> (Besides, I think the len is currently only used for snapshot dumping
> and no validation for out-of-blk reads/writes)

Yes. Because in most of the cases non-existing registers seem to be RAZ/WI.

> 
>>   	{\
>>   	.name = _name, .id = _id, \
>> -	.base = _base, .len = 0x280, \
>> +	.base = _base, .len = _len, \
>>   	.features = _features, \
>>   	.type = _type, \
>>   	.controller_id = _ctrl_id, \
> [..]
> 
> - Marijn

-- 
With best wishes
Dmitry


  reply	other threads:[~2023-02-13 11:38 UTC|newest]

Thread overview: 37+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-02-11 12:26 [PATCH 00/10] SM63(50|75) DPU support Konrad Dybcio
2023-02-11 12:26 ` [PATCH 01/10] dt-bindings: display/msm: dsi-controller-main: Add SM6350 Konrad Dybcio
2023-02-14 23:57   ` Rob Herring
2023-02-11 12:26 ` [PATCH 02/10] dt-bindings: display/msm: dsi-controller-main: Add SM6375 Konrad Dybcio
2023-02-14 23:57   ` Rob Herring
2023-02-11 12:26 ` [PATCH 03/10] dt-bindings: display/msm: Add SM6350 DPU & MDSS Konrad Dybcio
2023-02-11 16:33   ` Dmitry Baryshkov
2023-02-13 15:09   ` Rob Herring
2023-02-11 12:26 ` [PATCH 04/10] dt-bindings: display/msm: Add SM6375 " Konrad Dybcio
2023-02-13 15:09   ` Rob Herring
2023-02-11 12:26 ` [PATCH 05/10] drm/msm/dpu: Allow variable SSPP/INTF_BLK size Konrad Dybcio
2023-02-11 17:00   ` Dmitry Baryshkov
2023-02-13  9:41     ` Konrad Dybcio
2023-02-13 11:12   ` Marijn Suijten
2023-02-13 11:38     ` Dmitry Baryshkov [this message]
2023-02-13 14:31       ` Marijn Suijten
2023-02-13 14:40         ` Dmitry Baryshkov
2023-02-13 15:02           ` Marijn Suijten
2023-02-13 15:05             ` Dmitry Baryshkov
2023-02-11 12:26 ` [PATCH 06/10] drm/msm/dpu: Add SM6350 support Konrad Dybcio
2023-02-11 16:32   ` Dmitry Baryshkov
2023-02-13 11:15     ` Konrad Dybcio
2023-02-13 11:30       ` Marijn Suijten
2023-02-13 11:35         ` Dmitry Baryshkov
2023-02-13 14:28           ` Marijn Suijten
2023-02-13 14:58             ` Dmitry Baryshkov
2023-02-13 15:13               ` Dmitry Baryshkov
2023-02-13 15:14               ` Marijn Suijten
2023-02-13 16:25                 ` Dmitry Baryshkov
2023-02-13 19:14                   ` [Freedreno] " Abhinav Kumar
2023-02-13 20:24                     ` Dmitry Baryshkov
2023-02-11 12:26 ` [PATCH 07/10] drm/msm/dpu: Add SM6375 support Konrad Dybcio
2023-02-11 16:47   ` Dmitry Baryshkov
2023-02-13 11:16     ` Konrad Dybcio
2023-02-11 12:26 ` [PATCH 08/10] iommu/arm-smmu-qcom: Add SM6375 DPU compatible Konrad Dybcio
2023-02-11 12:26 ` [PATCH 09/10] iommu/arm-smmu-qcom: Add SM6350 " Konrad Dybcio
2023-02-11 12:26 ` [PATCH 10/10] iommu/arm-smmu-qcom: Sort the compatible list alphabetically Konrad Dybcio

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