[PATCH 0/3] Add devicetree support of USB for QDU/QRU1000

[PATCH 0/3] Add devicetree support of USB for QDU/QRU1000

[Komal Bajaj]

This series adds devicetree nodes to support interconnects and usb for qdu/qru1000.
This is based on previously sent driver series[1].
[1]
https://lore.kernel.org/linux-arm-msm/20240311120215.16845-1-quic_kbajaj@quicinc.com/

Komal Bajaj (3):
  arm64: dts: qcom: qdu1000: Add USB3 and PHY support
  arm64: dts: qcom: qdu1000-idp: enable USB nodes
  arm64: dts: qcom: qru1000-idp: enable USB nodes

 arch/arm64/boot/dts/qcom/qdu1000-idp.dts |  24 +++++
 arch/arm64/boot/dts/qcom/qdu1000.dtsi    | 119 +++++++++++++++++++++++
 arch/arm64/boot/dts/qcom/qru1000-idp.dts |  24 +++++
 3 files changed, 167 insertions(+)

--
2.42.0

[PATCH 1/3] arm64: dts: qcom: qdu1000: Add USB3 and PHY support

[Komal Bajaj]

Add devicetree nodes for enabling USB3 controller, Qcom QMP PHY and
SNPS HS PHY on QDU1000/QRU1000 SoCs.

Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qdu1000.dtsi | 119 ++++++++++++++++++++++++++
 1 file changed, 119 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000.dtsi b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
index 832f472c4b7a..fa153f6192cd 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000.dtsi
+++ b/arch/arm64/boot/dts/qcom/qdu1000.dtsi
@@ -6,6 +6,7 @@
 #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
 #include <dt-bindings/clock/qcom,rpmh.h>
 #include <dt-bindings/dma/qcom-gpi.h>
+#include <dt-bindings/interconnect/qcom,icc.h>
 #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/power/qcom-rpmpd.h>
@@ -913,6 +914,124 @@ opp-384000000 {
 			};
 		};

+		usb_1_hsphy: phy@88e3000 {
+			compatible = "qcom,qdu1000-usb-hs-phy",
+				     "qcom,usb-snps-hs-7nm-phy";
+			reg = <0x0 0x088e3000 0x0 0x120>;
+			#phy-cells = <0>;
+
+			clocks =<&gcc GCC_USB2_CLKREF_EN>;
+			clock-names = "ref";
+
+			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
+
+			status = "disabled";
+		};
+
+		usb_1_qmpphy: phy-wrapper@88e5000 {
+			compatible = "qcom,qdu1000-qmp-usb3-uni-phy";
+			reg = <0x0 0x088e5000 0x0 0x2000>;
+
+			clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
+				 <&gcc GCC_USB2_CLKREF_EN>,
+				 <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
+				 <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
+			clock-names = "aux",
+				      "ref",
+				      "com_aux",
+				      "pipe";
+
+			resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
+				 <&gcc GCC_USB3PHY_PHY_PRIM_BCR>;
+			reset-names = "phy",
+				      "phy_phy";
+
+			#clock-cells = <0>;
+			clock-output-names = "usb3_uni_phy_pipe_clk_src";
+
+			#phy-cells = <0>;
+
+			status = "disabled";
+		};
+
+		usb_1: usb@a6f8800 {
+			compatible = "qcom,qdu1000-dwc3", "qcom,dwc3";
+			reg = <0 0x0a6f8800 0 0x400>;
+			#address-cells = <2>;
+			#size-cells = <2>;
+			ranges;
+
+			clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
+				 <&gcc GCC_USB30_PRIM_MASTER_CLK>,
+				 <&gcc GCC_USB30_PRIM_SLEEP_CLK>,
+				 <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
+			clock-names = "cfg_noc",
+				      "core",
+				      "sleep",
+				      "mock_utmi";
+
+			assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
+					  <&gcc GCC_USB30_PRIM_MASTER_CLK>;
+			assigned-clock-rates = <19200000>, <200000000>;
+
+			interrupts-extended = <&intc GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>,
+					      <&pdc 6 IRQ_TYPE_LEVEL_HIGH>,
+					      <&pdc 8 IRQ_TYPE_EDGE_RISING>,
+					      <&pdc 9 IRQ_TYPE_EDGE_RISING>;
+			interrupt-names = "hs_phy_irq",
+					  "ss_phy_irq",
+					  "dp_hs_phy_irq",
+					  "dm_hs_phy_irq";
+
+			power-domains = <&gcc USB30_PRIM_GDSC>;
+			required-opps = <&rpmhpd_opp_nom>;
+
+			resets = <&gcc GCC_USB30_PRIM_BCR>;
+
+			interconnects = <&system_noc MASTER_USB3 QCOM_ICC_TAG_ALWAYS
+					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>,
+					<&gem_noc MASTER_APPSS_PROC QCOM_ICC_TAG_ALWAYS
+					 &system_noc SLAVE_USB3_0 QCOM_ICC_TAG_ALWAYS>;
+
+			interconnect-names = "usb-ddr",
+					     "apps-usb";
+
+			status = "disabled";
+
+			usb_1_dwc3: usb@a600000 {
+				compatible = "snps,dwc3";
+				reg = <0 0x0a600000 0 0xcd00>;
+				interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>;
+
+				iommus = <&apps_smmu 0xc0 0x0>;
+				snps,dis_u2_susphy_quirk;
+				snps,dis_enblslpm_quirk;
+				phys = <&usb_1_hsphy>,
+				       <&usb_1_qmpphy>;
+				phy-names = "usb2-phy",
+					    "usb3-phy";
+
+				ports {
+					#address-cells = <1>;
+					#size-cells = <0>;
+
+					port@0 {
+						reg = <0>;
+
+						usb_1_dwc3_hs: endpoint {
+						};
+					};
+
+					port@1 {
+						reg = <1>;
+
+						usb_1_dwc3_ss: endpoint {
+						};
+					};
+				};
+			};
+		};
+
 		pdc: interrupt-controller@b220000 {
 			compatible = "qcom,qdu1000-pdc", "qcom,pdc";
 			reg = <0x0 0xb220000 0x0 0x30000>, <0x0 0x174000f0 0x0 0x64>;
--
2.42.0

[PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Komal Bajaj]

Enable both USB controllers and associated hsphy and qmp phy nodes
on QDU1000 IDP.

Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
index 89b84fb0f70a..126bc71afd90 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
@@ -500,3 +500,27 @@ &tlmm {
 &uart7 {
 	status = "okay";
 };
+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "peripheral";
+	maximum-speed = "high-speed";
+};
+
+&usb_1_hsphy {
+	vdda-pll-supply = <&vreg_l8a_0p91>;
+	vdda18-supply = <&vreg_l14a_1p8>;
+	vdda33-supply = <&vreg_l2a_2p3>;
+
+	status = "okay";
+};
+
+&usb_1_qmpphy {
+	vdda-phy-supply = <&vreg_l8a_0p91>;
+	vdda-pll-supply = <&vreg_l3a_1p2>;
+
+	status = "okay";
+};
--
2.42.0

[PATCH 3/3] arm64: dts: qcom: qru1000-idp: enable USB nodes

[Komal Bajaj]

Enable both USB controllers and associated hsphy and qmp phy nodes
on QRU1000 IDP.

Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qru1000-idp.dts | 24 ++++++++++++++++++++++++
 1 file changed, 24 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qru1000-idp.dts b/arch/arm64/boot/dts/qcom/qru1000-idp.dts
index 258483af065b..c4d8027b8b20 100644
--- a/arch/arm64/boot/dts/qcom/qru1000-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qru1000-idp.dts
@@ -467,3 +467,27 @@ &tlmm {
 &uart7 {
 	status = "okay";
 };
+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "peripheral";
+	maximum-speed = "high-speed";
+};
+
+&usb_1_hsphy {
+	vdda-pll-supply = <&vreg_l8a_0p91>;
+	vdda18-supply = <&vreg_l14a_1p8>;
+	vdda33-supply = <&vreg_l2a_2p3>;
+
+	status = "okay";
+};
+
+&usb_1_qmpphy {
+	vdda-phy-supply = <&vreg_l8a_0p91>;
+	vdda-pll-supply = <&vreg_l3a_1p2>;
+
+	status = "okay";
+};
--
2.42.0

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Dmitry Baryshkov]

On Mon, 11 Mar 2024 at 14:10, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>
> Enable both USB controllers and associated hsphy and qmp phy nodes
> on QDU1000 IDP.
>
> Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 24 ++++++++++++++++++++++++
>  1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> index 89b84fb0f70a..126bc71afd90 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> @@ -500,3 +500,27 @@ &tlmm {
>  &uart7 {
>         status = "okay";
>  };
> +
> +&usb_1 {
> +       status = "okay";
> +};
> +
> +&usb_1_dwc3 {
> +       dr_mode = "peripheral";

Are these ports really peripheral-only?

> +       maximum-speed = "high-speed";
> +};
> +
> +&usb_1_hsphy {
> +       vdda-pll-supply = <&vreg_l8a_0p91>;
> +       vdda18-supply = <&vreg_l14a_1p8>;
> +       vdda33-supply = <&vreg_l2a_2p3>;
> +
> +       status = "okay";
> +};
> +
> +&usb_1_qmpphy {
> +       vdda-phy-supply = <&vreg_l8a_0p91>;
> +       vdda-pll-supply = <&vreg_l3a_1p2>;
> +
> +       status = "okay";
> +};
> --
> 2.42.0
>
>


-- 
With best wishes
Dmitry

Re: [PATCH 0/3] Add devicetree support of USB for QDU/QRU1000

[Rob Herring]

On Mon, 11 Mar 2024 17:38:56 +0530, Komal Bajaj wrote:
> This series adds devicetree nodes to support interconnects and usb for qdu/qru1000.
> This is based on previously sent driver series[1].
> [1]
> https://lore.kernel.org/linux-arm-msm/20240311120215.16845-1-quic_kbajaj@quicinc.com/
> 
> Komal Bajaj (3):
>   arm64: dts: qcom: qdu1000: Add USB3 and PHY support
>   arm64: dts: qcom: qdu1000-idp: enable USB nodes
>   arm64: dts: qcom: qru1000-idp: enable USB nodes
> 
>  arch/arm64/boot/dts/qcom/qdu1000-idp.dts |  24 +++++
>  arch/arm64/boot/dts/qcom/qdu1000.dtsi    | 119 +++++++++++++++++++++++
>  arch/arm64/boot/dts/qcom/qru1000-idp.dts |  24 +++++
>  3 files changed, 167 insertions(+)
> 
> --
> 2.42.0
> 
> 
> 


My bot found new DTB warnings on the .dts files added or changed in this
series.

Some warnings may be from an existing SoC .dtsi. Or perhaps the warnings
are fixed by another series. Ultimately, it is up to the platform
maintainer whether these warnings are acceptable or not. No need to reply
unless the platform maintainer has comments.

If you already ran DT checks and didn't see these error(s), then
make sure dt-schema is up to date:

  pip3 install dtschema --upgrade


New warnings running 'make CHECK_DTBS=y qcom/qdu1000-idp.dtb qcom/qru1000-idp.dtb' for 20240311120859.18489-1-quic_kbajaj@quicinc.com:

arch/arm64/boot/dts/qcom/qru1000-idp.dtb: phy@88e3000: compatible: 'oneOf' conditional failed, one must be fixed:
	['qcom,qdu1000-usb-hs-phy', 'qcom,usb-snps-hs-7nm-phy'] is too long
	'qcom,qdu1000-usb-hs-phy' is not one of ['qcom,sc8180x-usb-hs-phy', 'qcom,usb-snps-femto-v2-phy']
	'qcom,qdu1000-usb-hs-phy' is not one of ['qcom,sa8775p-usb-hs-phy', 'qcom,sc8280xp-usb-hs-phy']
	'qcom,qdu1000-usb-hs-phy' is not one of ['qcom,sc7280-usb-hs-phy', 'qcom,sdx55-usb-hs-phy', 'qcom,sdx65-usb-hs-phy', 'qcom,sm6375-usb-hs-phy', 'qcom,sm8150-usb-hs-phy', 'qcom,sm8250-usb-hs-phy', 'qcom,sm8350-usb-hs-phy', 'qcom,sm8450-usb-hs-phy']
	'qcom,usb-snps-hs-5nm-phy' was expected
	from schema $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
arch/arm64/boot/dts/qcom/qdu1000-idp.dtb: phy@88e3000: compatible: 'oneOf' conditional failed, one must be fixed:
	['qcom,qdu1000-usb-hs-phy', 'qcom,usb-snps-hs-7nm-phy'] is too long
	'qcom,qdu1000-usb-hs-phy' is not one of ['qcom,sc8180x-usb-hs-phy', 'qcom,usb-snps-femto-v2-phy']
	'qcom,qdu1000-usb-hs-phy' is not one of ['qcom,sa8775p-usb-hs-phy', 'qcom,sc8280xp-usb-hs-phy']
	'qcom,qdu1000-usb-hs-phy' is not one of ['qcom,sc7280-usb-hs-phy', 'qcom,sdx55-usb-hs-phy', 'qcom,sdx65-usb-hs-phy', 'qcom,sm6375-usb-hs-phy', 'qcom,sm8150-usb-hs-phy', 'qcom,sm8250-usb-hs-phy', 'qcom,sm8350-usb-hs-phy', 'qcom,sm8450-usb-hs-phy']
	'qcom,usb-snps-hs-5nm-phy' was expected
	from schema $id: http://devicetree.org/schemas/phy/qcom,usb-snps-femto-v2.yaml#
arch/arm64/boot/dts/qcom/qru1000-idp.dtb: /soc@0/phy@88e3000: failed to match any schema with compatible: ['qcom,qdu1000-usb-hs-phy', 'qcom,usb-snps-hs-7nm-phy']
arch/arm64/boot/dts/qcom/qdu1000-idp.dtb: /soc@0/phy@88e3000: failed to match any schema with compatible: ['qcom,qdu1000-usb-hs-phy', 'qcom,usb-snps-hs-7nm-phy']
arch/arm64/boot/dts/qcom/qru1000-idp.dtb: /soc@0/phy-wrapper@88e5000: failed to match any schema with compatible: ['qcom,qdu1000-qmp-usb3-uni-phy']
arch/arm64/boot/dts/qcom/qdu1000-idp.dtb: /soc@0/phy-wrapper@88e5000: failed to match any schema with compatible: ['qcom,qdu1000-qmp-usb3-uni-phy']
arch/arm64/boot/dts/qcom/qru1000-idp.dtb: usb@a6f8800: compatible:0: 'qcom,qdu1000-dwc3' is not one of ['qcom,ipq4019-dwc3', 'qcom,ipq5018-dwc3', 'qcom,ipq5332-dwc3', 'qcom,ipq6018-dwc3', 'qcom,ipq8064-dwc3', 'qcom,ipq8074-dwc3', 'qcom,ipq9574-dwc3', 'qcom,msm8953-dwc3', 'qcom,msm8994-dwc3', 'qcom,msm8996-dwc3', 'qcom,msm8998-dwc3', 'qcom,qcm2290-dwc3', 'qcom,qcs404-dwc3', 'qcom,sa8775p-dwc3', 'qcom,sc7180-dwc3', 'qcom,sc7280-dwc3', 'qcom,sc8280xp-dwc3', 'qcom,sdm660-dwc3', 'qcom,sdm670-dwc3', 'qcom,sdm845-dwc3', 'qcom,sdx55-dwc3', 'qcom,sdx65-dwc3', 'qcom,sdx75-dwc3', 'qcom,sm4250-dwc3', 'qcom,sm6115-dwc3', 'qcom,sm6125-dwc3', 'qcom,sm6350-dwc3', 'qcom,sm6375-dwc3', 'qcom,sm8150-dwc3', 'qcom,sm8250-dwc3', 'qcom,sm8350-dwc3', 'qcom,sm8450-dwc3', 'qcom,sm8550-dwc3', 'qcom,sm8650-dwc3', 'qcom,x1e80100-dwc3']
	from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
arch/arm64/boot/dts/qcom/qru1000-idp.dtb: /soc@0/usb@a6f8800: failed to match any schema with compatible: ['qcom,qdu1000-dwc3', 'qcom,dwc3']
arch/arm64/boot/dts/qcom/qdu1000-idp.dtb: usb@a6f8800: compatible:0: 'qcom,qdu1000-dwc3' is not one of ['qcom,ipq4019-dwc3', 'qcom,ipq5018-dwc3', 'qcom,ipq5332-dwc3', 'qcom,ipq6018-dwc3', 'qcom,ipq8064-dwc3', 'qcom,ipq8074-dwc3', 'qcom,ipq9574-dwc3', 'qcom,msm8953-dwc3', 'qcom,msm8994-dwc3', 'qcom,msm8996-dwc3', 'qcom,msm8998-dwc3', 'qcom,qcm2290-dwc3', 'qcom,qcs404-dwc3', 'qcom,sa8775p-dwc3', 'qcom,sc7180-dwc3', 'qcom,sc7280-dwc3', 'qcom,sc8280xp-dwc3', 'qcom,sdm660-dwc3', 'qcom,sdm670-dwc3', 'qcom,sdm845-dwc3', 'qcom,sdx55-dwc3', 'qcom,sdx65-dwc3', 'qcom,sdx75-dwc3', 'qcom,sm4250-dwc3', 'qcom,sm6115-dwc3', 'qcom,sm6125-dwc3', 'qcom,sm6350-dwc3', 'qcom,sm6375-dwc3', 'qcom,sm8150-dwc3', 'qcom,sm8250-dwc3', 'qcom,sm8350-dwc3', 'qcom,sm8450-dwc3', 'qcom,sm8550-dwc3', 'qcom,sm8650-dwc3', 'qcom,x1e80100-dwc3']
	from schema $id: http://devicetree.org/schemas/usb/qcom,dwc3.yaml#
arch/arm64/boot/dts/qcom/qdu1000-idp.dtb: /soc@0/usb@a6f8800: failed to match any schema with compatible: ['qcom,qdu1000-dwc3', 'qcom,dwc3']

Re: [PATCH 1/3] arm64: dts: qcom: qdu1000: Add USB3 and PHY support

[Krzysztof Kozlowski]

On 11/03/2024 13:08, Komal Bajaj wrote:
> @@ -6,6 +6,7 @@
>  #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
>  #include <dt-bindings/clock/qcom,rpmh.h>
>  #include <dt-bindings/dma/qcom-gpi.h>
> +#include <dt-bindings/interconnect/qcom,icc.h>
>  #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/power/qcom-rpmpd.h>
> @@ -913,6 +914,124 @@ opp-384000000 {
>  			};
>  		};
> 
> +		usb_1_hsphy: phy@88e3000 {
> +			compatible = "qcom,qdu1000-usb-hs-phy",
> +				     "qcom,usb-snps-hs-7nm-phy";
> +			reg = <0x0 0x088e3000 0x0 0x120>;
> +			#phy-cells = <0>;
> +
> +			clocks =<&gcc GCC_USB2_CLKREF_EN>;
> +			clock-names = "ref";
> +
> +			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
> +
> +			status = "disabled";
> +		};
> +
> +		usb_1_qmpphy: phy-wrapper@88e5000 {

That's a phy, isn't it? So node name "phy".

Best regards,
Krzysztof

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Konrad Dybcio]

On 3/11/24 13:14, Dmitry Baryshkov wrote:
> On Mon, 11 Mar 2024 at 14:10, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>>
>> Enable both USB controllers and associated hsphy and qmp phy nodes
>> on QDU1000 IDP.
>>
>> Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
>> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>> ---
>>   arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 24 ++++++++++++++++++++++++
>>   1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> index 89b84fb0f70a..126bc71afd90 100644
>> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>> @@ -500,3 +500,27 @@ &tlmm {
>>   &uart7 {
>>          status = "okay";
>>   };
>> +
>> +&usb_1 {
>> +       status = "okay";
>> +};
>> +
>> +&usb_1_dwc3 {
>> +       dr_mode = "peripheral";
> 
> Are these ports really peripheral-only?
> 
>> +       maximum-speed = "high-speed";

More importantly, are these ports really HS-only?

Konrad

Re: [PATCH 1/3] arm64: dts: qcom: qdu1000: Add USB3 and PHY support

[Komal Bajaj]

On 3/11/2024 10:02 PM, Krzysztof Kozlowski wrote:
> On 11/03/2024 13:08, Komal Bajaj wrote:
>> @@ -6,6 +6,7 @@
>>   #include <dt-bindings/clock/qcom,qdu1000-gcc.h>
>>   #include <dt-bindings/clock/qcom,rpmh.h>
>>   #include <dt-bindings/dma/qcom-gpi.h>
>> +#include <dt-bindings/interconnect/qcom,icc.h>
>>   #include <dt-bindings/interconnect/qcom,qdu1000-rpmh.h>
>>   #include <dt-bindings/interrupt-controller/arm-gic.h>
>>   #include <dt-bindings/power/qcom-rpmpd.h>
>> @@ -913,6 +914,124 @@ opp-384000000 {
>>   			};
>>   		};
>>
>> +		usb_1_hsphy: phy@88e3000 {
>> +			compatible = "qcom,qdu1000-usb-hs-phy",
>> +				     "qcom,usb-snps-hs-7nm-phy";
>> +			reg = <0x0 0x088e3000 0x0 0x120>;
>> +			#phy-cells = <0>;
>> +
>> +			clocks =<&gcc GCC_USB2_CLKREF_EN>;
>> +			clock-names = "ref";
>> +
>> +			resets = <&gcc GCC_QUSB2PHY_PRIM_BCR>;
>> +
>> +			status = "disabled";
>> +		};
>> +
>> +		usb_1_qmpphy: phy-wrapper@88e5000 {
> 
> That's a phy, isn't it? So node name "phy".

My mistake, will correct it.

Thanks
Komal

> 
> Best regards,
> Krzysztof
> 

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Komal Bajaj]

On 3/12/2024 5:34 AM, Konrad Dybcio wrote:
> 
> 
> On 3/11/24 13:14, Dmitry Baryshkov wrote:
>> On Mon, 11 Mar 2024 at 14:10, Komal Bajaj <quic_kbajaj@quicinc.com> 
>> wrote:
>>>
>>> Enable both USB controllers and associated hsphy and qmp phy nodes
>>> on QDU1000 IDP.
>>>
>>> Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
>>> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
>>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 24 ++++++++++++++++++++++++
>>>   1 file changed, 24 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts 
>>> b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>>> index 89b84fb0f70a..126bc71afd90 100644
>>> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>>> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>>> @@ -500,3 +500,27 @@ &tlmm {
>>>   &uart7 {
>>>          status = "okay";
>>>   };
>>> +
>>> +&usb_1 {
>>> +       status = "okay";
>>> +};
>>> +
>>> +&usb_1_dwc3 {
>>> +       dr_mode = "peripheral";
>>
>> Are these ports really peripheral-only?

This was done for testing. Will add the usb-role-switch role.

>>
>>> +       maximum-speed = "high-speed";
> 
> More importantly, are these ports really HS-only?

Apologies for this, added it for testing purpose only, forgot to remove it.
Will remove it.

Thanks
Komal

> 
> Konrad

[PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Komal Bajaj]

Enable both USB controllers and associated hsphy and qmp phy
nodes on QDU1000 IDP. Add the usb type B port linked with the
DWC3 USB controller switched to OTG mode and tagged with
usb-role-switch.

Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
---
 arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 65 ++++++++++++++++++++++++
 1 file changed, 65 insertions(+)

diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
index 89b84fb0f70a..26442e707b5e 100644
--- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
+++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
@@ -46,6 +46,33 @@ ppvar_sys: ppvar-sys-regulator {
 		regulator-boot-on;
 	};

+	usb_conn_gpio: usb-conn-gpio {
+		compatible = "gpio-usb-b-connector";
+		vbus-gpio =  <&pm8150_gpios 7 GPIO_ACTIVE_HIGH>;
+		id-gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>;
+		vbus-supply = <&vbus_supply_regulator>;
+
+		pinctrl-0 = <&usb_vbus_det_default
+			     &usb_id_det_default>;
+		pinctrl-names = "default";
+
+		port {
+			usb_port0_connector: endpoint {
+				remote-endpoint = <&usb_1_dwc3_hs>;
+			};
+		};
+	};
+
+	vbus_supply_regulator: vbus-supply-regulator {
+		compatible = "regulator-fixed";
+		regulator-name = "vbus_supply";
+
+		gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
+		pinctrl-0 = <&usb_vbus_boost_default>;
+		pinctrl-names = "default";
+		enable-active-high;
+	};
+
 	vph_pwr: vph-pwr-regulator {
 		compatible = "regulator-fixed";
 		regulator-name = "vph_pwr";
@@ -239,6 +266,16 @@ vreg_l18a_1p2: ldo18 {
 	};
 };

+&pm8150_gpios {
+	usb_vbus_det_default: usb-vbus-det-default {
+		pins = "gpio7";
+		function = "normal";
+		input-enable;
+		bias-pull-up;
+		power-source = <0>;
+	};
+};
+
 &qup_i2c1_data_clk {
 	drive-strength = <2>;
 	bias-pull-up;
@@ -500,3 +537,31 @@ &tlmm {
 &uart7 {
 	status = "okay";
 };
+
+&usb_1 {
+	status = "okay";
+};
+
+&usb_1_dwc3 {
+	dr_mode = "otg";
+	usb-role-switch;
+};
+
+&usb_1_dwc3_hs {
+	remote-endpoint = <&usb_port0_connector>;
+};
+
+&usb_1_hsphy {
+	vdda-pll-supply = <&vreg_l8a_0p91>;
+	vdda18-supply = <&vreg_l14a_1p8>;
+	vdda33-supply = <&vreg_l2a_2p3>;
+
+	status = "okay";
+};
+
+&usb_1_qmpphy {
+	vdda-phy-supply = <&vreg_l8a_0p91>;
+	vdda-pll-supply = <&vreg_l3a_1p2>;
+
+	status = "okay";
+};
--
2.42.0

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Dmitry Baryshkov]

On Tue, 19 Mar 2024 at 11:11, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>
> Enable both USB controllers and associated hsphy and qmp phy
> nodes on QDU1000 IDP. Add the usb type B port linked with the
> DWC3 USB controller switched to OTG mode and tagged with
> usb-role-switch.
>
> Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 65 ++++++++++++++++++++++++
>  1 file changed, 65 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> index 89b84fb0f70a..26442e707b5e 100644
> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> @@ -46,6 +46,33 @@ ppvar_sys: ppvar-sys-regulator {
>                 regulator-boot-on;
>         };
>
> +       usb_conn_gpio: usb-conn-gpio {
> +               compatible = "gpio-usb-b-connector";

If this board has only a USB-B connector, can it really handle USB 3.0?

> +               vbus-gpio =  <&pm8150_gpios 7 GPIO_ACTIVE_HIGH>;
> +               id-gpio = <&tlmm 42 GPIO_ACTIVE_HIGH>;
> +               vbus-supply = <&vbus_supply_regulator>;
> +
> +               pinctrl-0 = <&usb_vbus_det_default
> +                            &usb_id_det_default>;
> +               pinctrl-names = "default";
> +
> +               port {
> +                       usb_port0_connector: endpoint {
> +                               remote-endpoint = <&usb_1_dwc3_hs>;
> +                       };
> +               };
> +       };
> +
> +       vbus_supply_regulator: vbus-supply-regulator {
> +               compatible = "regulator-fixed";
> +               regulator-name = "vbus_supply";
> +
> +               gpio = <&tlmm 43 GPIO_ACTIVE_HIGH>;
> +               pinctrl-0 = <&usb_vbus_boost_default>;
> +               pinctrl-names = "default";
> +               enable-active-high;
> +       };
> +
>         vph_pwr: vph-pwr-regulator {
>                 compatible = "regulator-fixed";
>                 regulator-name = "vph_pwr";
> @@ -239,6 +266,16 @@ vreg_l18a_1p2: ldo18 {
>         };
>  };
>
> +&pm8150_gpios {
> +       usb_vbus_det_default: usb-vbus-det-default {
> +               pins = "gpio7";
> +               function = "normal";
> +               input-enable;
> +               bias-pull-up;
> +               power-source = <0>;
> +       };
> +};
> +
>  &qup_i2c1_data_clk {
>         drive-strength = <2>;
>         bias-pull-up;
> @@ -500,3 +537,31 @@ &tlmm {
>  &uart7 {
>         status = "okay";
>  };
> +
> +&usb_1 {
> +       status = "okay";
> +};
> +
> +&usb_1_dwc3 {
> +       dr_mode = "otg";

Nit: this is the default setting.

> +       usb-role-switch;
> +};
> +
> +&usb_1_dwc3_hs {
> +       remote-endpoint = <&usb_port0_connector>;
> +};
> +
> +&usb_1_hsphy {
> +       vdda-pll-supply = <&vreg_l8a_0p91>;
> +       vdda18-supply = <&vreg_l14a_1p8>;
> +       vdda33-supply = <&vreg_l2a_2p3>;
> +
> +       status = "okay";
> +};
> +
> +&usb_1_qmpphy {
> +       vdda-phy-supply = <&vreg_l8a_0p91>;
> +       vdda-pll-supply = <&vreg_l3a_1p2>;
> +
> +       status = "okay";
> +};
> --
> 2.42.0
>
>


-- 
With best wishes
Dmitry

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Bjorn Andersson]

On Tue, Mar 19, 2024 at 11:52:15AM +0200, Dmitry Baryshkov wrote:
> On Tue, 19 Mar 2024 at 11:11, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
> >
> > Enable both USB controllers and associated hsphy and qmp phy
> > nodes on QDU1000 IDP. Add the usb type B port linked with the
> > DWC3 USB controller switched to OTG mode and tagged with
> > usb-role-switch.
> >
> > Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
> > Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
> > Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 65 ++++++++++++++++++++++++
> >  1 file changed, 65 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> > index 89b84fb0f70a..26442e707b5e 100644
> > --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> > +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> > @@ -46,6 +46,33 @@ ppvar_sys: ppvar-sys-regulator {
> >                 regulator-boot-on;
> >         };
> >
> > +       usb_conn_gpio: usb-conn-gpio {
> > +               compatible = "gpio-usb-b-connector";
> 
> If this board has only a USB-B connector, can it really handle USB 3.0?
> 

Here's a USB 3.0 Type-B cable, so no problem there:
https://en.wikipedia.org/wiki/USB_hardware#/media/File:USB_3.0_plug,_type_B_-_1709.jpg


@Komal, please confirm that this is the connector you have on the IDP?

Regards,
Bjorn

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Krishna Kurapati PSSNV]

On 4/2/2024 4:25 AM, Bjorn Andersson wrote:
> On Tue, Mar 19, 2024 at 11:52:15AM +0200, Dmitry Baryshkov wrote:
>> On Tue, 19 Mar 2024 at 11:11, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
>>>
>>> Enable both USB controllers and associated hsphy and qmp phy
>>> nodes on QDU1000 IDP. Add the usb type B port linked with the
>>> DWC3 USB controller switched to OTG mode and tagged with
>>> usb-role-switch.
>>>
>>> Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
>>> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
>>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
>>> ---
>>>   arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 65 ++++++++++++++++++++++++
>>>   1 file changed, 65 insertions(+)
>>>
>>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>>> index 89b84fb0f70a..26442e707b5e 100644
>>> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>>> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
>>> @@ -46,6 +46,33 @@ ppvar_sys: ppvar-sys-regulator {
>>>                  regulator-boot-on;
>>>          };
>>>
>>> +       usb_conn_gpio: usb-conn-gpio {
>>> +               compatible = "gpio-usb-b-connector";
>>
>> If this board has only a USB-B connector, can it really handle USB 3.0?
>>
> 
> Here's a USB 3.0 Type-B cable, so no problem there:
> https://en.wikipedia.org/wiki/USB_hardware#/media/File:USB_3.0_plug,_type_B_-_1709.jpg
> 
> 
> @Komal, please confirm that this is the connector you have on the IDP?
> 

Hi Bjorn,

  Sorry for the confusion. The QDU1000 IDP has a Type-C connector. The 
type-c switch present between SoC and the connector is HD3SS3220 (from TI).

  I think Dmitry's comment was that if it is 3.0, is it Type-C ? and if 
it is Type-C, then the compatible written in the being 
"gpio-usb-b-connector" would mean that there is a Type-B connector for 
someone who looks at the DT. (Dmitry, Please correct me if I understood 
the comment wrong).

  I tried to push a series for adding a compatible to gpio conn driver 
[1] to resolve this and explained the connection specifics to Dmitry [2] 
and he suggested me to add a compatible for just the switch present on 
qdu1000 idp.

Dmitry, Krzysztof,

I was looking into the code again and it turns out there is a driver 
specific to HD3SS3220 switch [3] in linux already. I tried to check if 
it can be reused here but that driver relies on I2C communication 
between the SoC and the HD3SS3220 chip to get information on role 
switch. But in QDU1000 IDP board, there is no I2C communication present 
between SoC and the switch. Those lines have been cut off. The SoC only 
knows about VBUS/ID pins (other than DM/DP/SS Lanes) and no other I2C 
connections between the switch and the SoC. We still need to make use of 
vbus/id pins to decide which role we need to shift into. Can we still go 
ahead with using usb-conn-gpio driver by adding the compatible 
(qcom,qdu1000-hd3ss3220) and using it in DT ?

Let me know your thoughts on this.

[1]: 
https://lore.kernel.org/all/6f2df222-36d4-468e-99a7-9c48fae85aa9@quicinc.com/

[2]: 
https://lore.kernel.org/all/6f2df222-36d4-468e-99a7-9c48fae85aa9@quicinc.com/

[3]: 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/usb/typec/hd3ss3220.c?h=v6.9-rc2

Regards,
Krishna,

Re: [PATCH 2/3] arm64: dts: qcom: qdu1000-idp: enable USB nodes

[Dmitry Baryshkov]

On Wed, 3 Apr 2024 at 10:50, Krishna Kurapati PSSNV
<quic_kriskura@quicinc.com> wrote:
>
>
>
> On 4/2/2024 4:25 AM, Bjorn Andersson wrote:
> > On Tue, Mar 19, 2024 at 11:52:15AM +0200, Dmitry Baryshkov wrote:
> >> On Tue, 19 Mar 2024 at 11:11, Komal Bajaj <quic_kbajaj@quicinc.com> wrote:
> >>>
> >>> Enable both USB controllers and associated hsphy and qmp phy
> >>> nodes on QDU1000 IDP. Add the usb type B port linked with the
> >>> DWC3 USB controller switched to OTG mode and tagged with
> >>> usb-role-switch.
> >>>
> >>> Co-developed-by: Amrit Anand <quic_amrianan@quicinc.com>
> >>> Signed-off-by: Amrit Anand <quic_amrianan@quicinc.com>
> >>> Signed-off-by: Komal Bajaj <quic_kbajaj@quicinc.com>
> >>> ---
> >>>   arch/arm64/boot/dts/qcom/qdu1000-idp.dts | 65 ++++++++++++++++++++++++
> >>>   1 file changed, 65 insertions(+)
> >>>
> >>> diff --git a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> >>> index 89b84fb0f70a..26442e707b5e 100644
> >>> --- a/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> >>> +++ b/arch/arm64/boot/dts/qcom/qdu1000-idp.dts
> >>> @@ -46,6 +46,33 @@ ppvar_sys: ppvar-sys-regulator {
> >>>                  regulator-boot-on;
> >>>          };
> >>>
> >>> +       usb_conn_gpio: usb-conn-gpio {
> >>> +               compatible = "gpio-usb-b-connector";
> >>
> >> If this board has only a USB-B connector, can it really handle USB 3.0?
> >>
> >
> > Here's a USB 3.0 Type-B cable, so no problem there:
> > https://en.wikipedia.org/wiki/USB_hardware#/media/File:USB_3.0_plug,_type_B_-_1709.jpg
> >
> >
> > @Komal, please confirm that this is the connector you have on the IDP?
> >
>
> Hi Bjorn,
>
>   Sorry for the confusion. The QDU1000 IDP has a Type-C connector. The
> type-c switch present between SoC and the connector is HD3SS3220 (from TI).
>
>   I think Dmitry's comment was that if it is 3.0, is it Type-C ? and if
> it is Type-C, then the compatible written in the being
> "gpio-usb-b-connector" would mean that there is a Type-B connector for
> someone who looks at the DT. (Dmitry, Please correct me if I understood
> the comment wrong).
>
>   I tried to push a series for adding a compatible to gpio conn driver
> [1] to resolve this and explained the connection specifics to Dmitry [2]
> and he suggested me to add a compatible for just the switch present on
> qdu1000 idp.
>
> Dmitry, Krzysztof,
>
> I was looking into the code again and it turns out there is a driver
> specific to HD3SS3220 switch [3] in linux already. I tried to check if
> it can be reused here but that driver relies on I2C communication
> between the SoC and the HD3SS3220 chip to get information on role
> switch. But in QDU1000 IDP board, there is no I2C communication present
> between SoC and the switch. Those lines have been cut off. The SoC only
> knows about VBUS/ID pins (other than DM/DP/SS Lanes) and no other I2C
> connections between the switch and the SoC. We still need to make use of
> vbus/id pins to decide which role we need to shift into. Can we still go
> ahead with using usb-conn-gpio driver by adding the compatible
> (qcom,qdu1000-hd3ss3220) and using it in DT ?

Is Qualcomm a manufacturer of the device? It is not.
Is qdu1000 a part of the device? It is not.

So the compatible string should be "ti,hd3ss3220". Which is fine to be
used in the platform driver. Just describe the differences in the
schema.


>
> Let me know your thoughts on this.
>
> [1]:
> https://lore.kernel.org/all/6f2df222-36d4-468e-99a7-9c48fae85aa9@quicinc.com/
>
> [2]:
> https://lore.kernel.org/all/6f2df222-36d4-468e-99a7-9c48fae85aa9@quicinc.com/
>
> [3]:
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/usb/typec/hd3ss3220.c?h=v6.9-rc2
>
> Regards,
> Krishna,
>
>
>


-- 
With best wishes
Dmitry