Re: [PATCH 1/2] dt-bindings: interrupt-controller: qcom,pdc: Document x1p42100 PDC

["Maulik Shah (mkshah)" <maulik.shah@oss.qualcomm.com>]

On 12/31/2025 4:19 PM, Krzysztof Kozlowski wrote:
> On 31/12/2025 11:18, Maulik Shah wrote:
>> Purwa shares the Hamoa (X1E80100) PDC device, but the hardware register
> 
> We don't use Hamoa name in upstream.

Okay, I will not use hamoa/purwa, will use X1E80100/X1P42100 everywhere in v2.

> 
>> bug addressed in commit e9a48ea4d90b ("irqchip/qcom-pdc: Workaround
>> hardware register bug on X1E80100") is already fixed in Purwa silicon.
>>
>> Hamoa compatible forces the software workaround. Add PDC compatible
>> for purwa as "qcom,x1p42100-pdc" to remove the workaround from Purwa.
>>
>> Fixes: f08edb529916 ("arm64: dts: qcom: Add X1P42100 SoC and CRD")
> 
> Your are describing wrong bug being fixed... or actually not a bug.
> Every SoC should have dedicated compatible (see writing bindings) and
> missing compatible is not a bug.

The X1P42100 SoC today shares most of the devices with X1E80100 SoC as is,
with X1E80100 as bigger brother.

Adding new compatible for X1P42100 PDC to avoid applying the S/W workaround
for the H/W bug of X1E80100 should be as per writing bindings which says,
   - DO add new compatibles in case there are new features or bugs.

Adding The Fixes: tag for binding will also help when patch-2 of the series
gets backported, the binding change also gets automatically picked up.

Thanks,
Maulik