[PATCH v3 0/2] spi: aspeed: Fix division by zero

[PATCH v3 0/2] spi: aspeed: Fix division by zero

[Cédric Le Goater]

Hello,

Here is a small series adding some debug and fixing a division by zero
on a board using normal speed reads.

Thanks,

C.

 Changes since v2:

 - improved commit log 

C?dric Le Goater (2):
  spi: aspeed: Add dev_dbg() to dump the spi-mem direct mapping
    descriptor
  spi: aspeed: Fix division by zero

 drivers/spi/spi-aspeed-smc.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

-- 
2.35.3

[PATCH v3 1/2] spi: aspeed: Add dev_dbg() to dump the spi-mem direct mapping descriptor

[Cédric Le Goater]

The default value of the control register is set using the direct
mapping information passed to the ->dirmap_create() handler. Dump the
mapping range and the SPI memory operation characteristics to analyze
how the register value has been computed.

  spi-aspeed-smc 1e630000.spi: CE0 read dirmap [ 0x00000000 - 0x04000000 ] OP 0x6c mode:1.1.1.4 naddr:0x4 ndummies:0x1
  ...
  spi-aspeed-smc 1e630000.spi: CE0 write dirmap [ 0x00000000 - 0x04000000 ] OP 0x12 mode:1.1.0.1 naddr:0x4 ndummies:0x0

Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
Signed-off-by: C?dric Le Goater <clg@kaod.org>
---
 drivers/spi/spi-aspeed-smc.c | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index 496f3e1e9079..ac64be289e59 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -558,6 +558,14 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
 	u32 ctl_val;
 	int ret = 0;
 
+	dev_dbg(aspi->dev,
+		"CE%d %s dirmap [ 0x%.8llx - 0x%.8llx ] OP %#x mode:%d.%d.%d.%d naddr:%#x ndummies:%#x\n",
+		chip->cs, op->data.dir == SPI_MEM_DATA_IN ? "read" : "write",
+		desc->info.offset, desc->info.offset + desc->info.length,
+		op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
+		op->dummy.buswidth, op->data.buswidth,
+		op->addr.nbytes, op->dummy.nbytes);
+
 	chip->clk_freq = desc->mem->spi->max_speed_hz;
 
 	/* Only for reads */
-- 
2.35.3

[PATCH v3 1/2] spi: aspeed: Add dev_dbg() to dump the spi-mem direct mapping descriptor

[Joel Stanley]

On Wed, 22 Jun 2022 at 16:16, C?dric Le Goater <clg@kaod.org> wrote:
>
> The default value of the control register is set using the direct
> mapping information passed to the ->dirmap_create() handler. Dump the
> mapping range and the SPI memory operation characteristics to analyze
> how the register value has been computed.
>
>   spi-aspeed-smc 1e630000.spi: CE0 read dirmap [ 0x00000000 - 0x04000000 ] OP 0x6c mode:1.1.1.4 naddr:0x4 ndummies:0x1
>   ...
>   spi-aspeed-smc 1e630000.spi: CE0 write dirmap [ 0x00000000 - 0x04000000 ] OP 0x12 mode:1.1.0.1 naddr:0x4 ndummies:0x0
>
> Reviewed-by: Paul Menzel <pmenzel@molgen.mpg.de>
> Signed-off-by: C?dric Le Goater <clg@kaod.org>

Very handy! Thanks C?dric.

Reviewed-by: Joel Stanley <joel@jms.id.au>

> ---
>  drivers/spi/spi-aspeed-smc.c | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
> index 496f3e1e9079..ac64be289e59 100644
> --- a/drivers/spi/spi-aspeed-smc.c
> +++ b/drivers/spi/spi-aspeed-smc.c
> @@ -558,6 +558,14 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
>         u32 ctl_val;
>         int ret = 0;
>
> +       dev_dbg(aspi->dev,
> +               "CE%d %s dirmap [ 0x%.8llx - 0x%.8llx ] OP %#x mode:%d.%d.%d.%d naddr:%#x ndummies:%#x\n",
> +               chip->cs, op->data.dir == SPI_MEM_DATA_IN ? "read" : "write",
> +               desc->info.offset, desc->info.offset + desc->info.length,
> +               op->cmd.opcode, op->cmd.buswidth, op->addr.buswidth,
> +               op->dummy.buswidth, op->data.buswidth,
> +               op->addr.nbytes, op->dummy.nbytes);
> +
>         chip->clk_freq = desc->mem->spi->max_speed_hz;
>
>         /* Only for reads */
> --
> 2.35.3
>

[PATCH v3 2/2] spi: aspeed: Fix division by zero

[Cédric Le Goater]

When using the normal read operation for data transfers, the dummy bus
width is zero. In that case, they are no dummy bytes to transfer and
setting the dummy field in the controller register becomes useless.

Issue was found on a custom "Bifrost" board based on the AST2500 SoC
and using a MX25L51245GMI-08G SPI Flash.

Reported-by: Ian Woloschin <ian.woloschin@akamai.com>
Reviewed-by: Pratyush Yadav <p.yadav@ti.com>
Tested-by: Ian Woloschin <iwolosch@akamai.com>
Fixes: 54613fc6659b ("spi: aspeed: Add support for direct mapping")
Signed-off-by: C?dric Le Goater <clg@kaod.org>
---
 drivers/spi/spi-aspeed-smc.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/drivers/spi/spi-aspeed-smc.c b/drivers/spi/spi-aspeed-smc.c
index ac64be289e59..3e891bf22470 100644
--- a/drivers/spi/spi-aspeed-smc.c
+++ b/drivers/spi/spi-aspeed-smc.c
@@ -582,9 +582,11 @@ static int aspeed_spi_dirmap_create(struct spi_mem_dirmap_desc *desc)
 	ctl_val = readl(chip->ctl) & ~CTRL_IO_CMD_MASK;
 	ctl_val |= aspeed_spi_get_io_mode(op) |
 		op->cmd.opcode << CTRL_COMMAND_SHIFT |
-		CTRL_IO_DUMMY_SET(op->dummy.nbytes / op->dummy.buswidth) |
 		CTRL_IO_MODE_READ;
 
+	if (op->dummy.nbytes)
+		ctl_val |= CTRL_IO_DUMMY_SET(op->dummy.nbytes / op->dummy.buswidth);
+
 	/* Tune 4BYTE address mode */
 	if (op->addr.nbytes) {
 		u32 addr_mode = readl(aspi->regs + CE_CTRL_REG);
-- 
2.35.3

[PATCH v3 2/2] spi: aspeed: Fix division by zero

[Mark Brown]

On Wed, Jun 22, 2022 at 06:16:17PM +0200, C?dric Le Goater wrote:

> Fixes: 54613fc6659b ("spi: aspeed: Add support for direct mapping")

This commit isn't in mainline.
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[PATCH v3 2/2] spi: aspeed: Fix division by zero

[Cédric Le Goater]

On 6/29/22 19:09, Mark Brown wrote:
> On Wed, Jun 22, 2022 at 06:16:17PM +0200, C?dric Le Goater wrote:
> 
>> Fixes: 54613fc6659b ("spi: aspeed: Add support for direct mapping")
> 
> This commit isn't in mainline.

drat. It's the OpenBMC kernel. I will resend. Sorry about that.

C.

[PATCH v3 2/2] spi: aspeed: Fix division by zero

[Mark Brown]

On Wed, Jun 29, 2022 at 07:21:08PM +0200, C?dric Le Goater wrote:
> On 6/29/22 19:09, Mark Brown wrote:
> > On Wed, Jun 22, 2022 at 06:16:17PM +0200, C?dric Le Goater wrote:
> > 
> > > Fixes: 54613fc6659b ("spi: aspeed: Add support for direct mapping")
> > 
> > This commit isn't in mainline.

> drat. It's the OpenBMC kernel. I will resend. Sorry about that.

It's OK, I fixed it up locally.
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[PATCH v3 2/2] spi: aspeed: Fix division by zero

[Cédric Le Goater]

On 6/29/22 19:27, Mark Brown wrote:
> On Wed, Jun 29, 2022 at 07:21:08PM +0200, C?dric Le Goater wrote:
>> On 6/29/22 19:09, Mark Brown wrote:
>>> On Wed, Jun 22, 2022 at 06:16:17PM +0200, C?dric Le Goater wrote:
>>>
>>>> Fixes: 54613fc6659b ("spi: aspeed: Add support for direct mapping")
>>>
>>> This commit isn't in mainline.
> 
>> drat. It's the OpenBMC kernel. I will resend. Sorry about that.
> 
> It's OK, I fixed it up locally.


Thanks,

C.

[PATCH v3 0/2] spi: aspeed: Fix division by zero

[Mark Brown]

On Wed, 22 Jun 2022 18:16:15 +0200, C?dric Le Goater wrote:
> Here is a small series adding some debug and fixing a division by zero
> on a board using normal speed reads.
> 
> Thanks,
> 
> C.
> 
> [...]

Applied to

   https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi.git for-next

Thanks!

[1/2] spi: aspeed: Add dev_dbg() to dump the spi-mem direct mapping descriptor
      commit: 8988ba7dec43aabd43adb1214b922b8873e9da88
[2/2] spi: aspeed: Fix division by zero
      commit: 30554a1f0fd6a5d2e2413bdc05389995d5611736

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing
and review of the tree, please engage with people reporting problems and
send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they
should be sent as incremental updates against current git, existing
patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying
to this mail.

Thanks,
Mark