* [PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address
@ 2021-01-27 18:23 Konstantin Aladyshev
2021-01-27 23:16 ` Andrew Jeffery
0 siblings, 1 reply; 2+ messages in thread
From: Konstantin Aladyshev @ 2021-01-27 18:23 UTC (permalink / raw)
To: linux-aspeed
AMD EthanolX CRB uses 2-byte POST codes which are sent to ports 0x80/0x81.
Currently ASPEED controller snoops only 0x80 port and therefore captures
only the lower byte of each POST code.
Enable secondary LPC snooping address to capture the higher byte of POST
codes.
Signed-off-by: Konstantin Aladyshev <aladyshev22@gmail.com>
---
arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
index 96ff0aea64e5..ac2d04cfaf2f 100644
--- a/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-amd-ethanolx.dts
@@ -218,7 +218,7 @@
&lpc_snoop {
status = "okay";
- snoop-ports = <0x80>;
+ snoop-ports = <0x80>, <0x81>;
};
&lpc_ctrl {
--
2.17.1
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2021-01-27 18:23 [PATCH] ARM: dts: aspeed: amd-ethanolx: Enable secondary LPC snooping address Konstantin Aladyshev
2021-01-27 23:16 ` Andrew Jeffery
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