* [PATCH] ARM: dts: aspeed: cmm: enable ehci host controllers
From: Tao Ren @ 2019-05-09 3:43 UTC (permalink / raw)
To: linux-aspeed
Enable ehci0 and ehci1 USB host controllers on Facebook Backpack CMM BMC.
Signed-off-by: Tao Ren <taoren@fb.com>
---
arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
index 43aba4071a5c..d519d307aa2a 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-cmm.dts
@@ -372,3 +372,11 @@
&adc {
status = "okay";
};
+
+&ehci0 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
--
2.17.1
^ permalink raw reply related
* [PATCH 1/7] media: aspeed: fix a kernel warning on clk control
From: Benjamin Herrenschmidt @ 2019-05-09 2:16 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <3786afed-c34d-e3f0-4cd5-620185807091@linux.intel.com>
On Wed, 2019-05-08 at 18:19 -0700, Jae Hyun Yoo wrote:
> I changed that from a bool because the maintainer of this code, Eddie
> doesn't like adding of an additional flag. I'll change it back with
> codes in the first submit:
> https://www.spinics.net/lists/linux-media/msg148955.html
>
> Eddie,
> Please let me know if you have any objection on that.
Ok, so random flags ... ugh.
Well, you can approach it either way. Have them all be bitops or all be
bool.
The tricky thing however is that if they are bitops you need to ensure
that they are *all* manipulated under the same lock. If not you have to
use the atomic bitops variants.
The reason I don't like that is that experience shows that most uses of
such atomic variants in drivers usually are failed attempts at papering
over broken locking.
If everything is covered by a lock, then using the non-atomic versions
is more efficient, but so is using bool (optionally with :1 bitfield
qualifiers to avoid wasting memory), which from a pure C language
perspective I think is more expressive of what you are doing and more
readable.
Cheers,
Ben.
^ permalink raw reply
* [PATCH 1/7] media: aspeed: fix a kernel warning on clk control
From: Jae Hyun Yoo @ 2019-05-09 1:19 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <3b4269d829467870f0b6adac18089b93114fcd3c.camel@kernel.crashing.org>
On 5/8/2019 6:08 PM, Benjamin Herrenschmidt wrote:
> On Wed, 2019-05-08 at 15:19 -0700, Jae Hyun Yoo wrote:
>> On 5/7/2019 11:31 PM, Benjamin Herrenschmidt wrote:
>>> On Thu, 2019-05-02 at 12:13 -0700, Jae Hyun Yoo wrote:
>>>> Video engine clock control functions in the Aspeed video engine
>>>> driver are being called from multiple context without any
>>>> protection so video clocks can be double disabled and eventually
>>>> it causes a kernel warning with stack dump printing out like
>>>> below:
>>>
>>> I already objected to the use of set_bit, clear_bit etc...
>>>
>>> Either you are protected by a spinlock, in which case you don't
>>> need
>>> them, use either the __ versions (non atomic) or just a bloody bool
>>> flag which is a lot clearer and will generated better code. Or you
>>> aren't protected in which case the code seems racy.
>>
>> Got it. I'll use __set_bit and __clear_bit instead. Thanks for
>> your pointing it out.
>
> Why not a bool ? Any reason why you prefer bitops ? They are a bit of
> an old-fashioned way of doing things unless you are actively trying to
> save space by craming several flags in the same word.
>
> Note: If you do the latter, ensure all users are properly locked, dont'
> mix the __set_bit and set_bit variants on the same word.
I changed that from a bool because the maintainer of this code, Eddie
doesn't like adding of an additional flag. I'll change it back with
codes in the first submit:
https://www.spinics.net/lists/linux-media/msg148955.html
Eddie,
Please let me know if you have any objection on that.
Thanks,
Jae
> Cheers,
> Ben.
>> Regards,
>> Jae
>>
>>>> [ 515.540498] ------------[ cut here ]------------
>>>> [ 515.545174] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:684
>>>> clk_core_unprepare+0x13c/0x170
>>>> [ 515.553806] vclk-gate already unprepared
>>>> [ 515.557841] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
>>>> G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4
>>>> #1
>>>> [ 515.568973] Hardware name: Generic DT based system
>>>> [ 515.573777] Backtrace:
>>>> [ 515.576272] [<80107cdc>] (dump_backtrace) from [<80107f10>]
>>>> (show_stack+0x20/0x24)
>>>> [ 515.583930] r7:803a5614 r6:00000009 r5:00000000 r4:9d88fe1c
>>>> [ 515.589712] [<80107ef0>] (show_stack) from [<80690184>]
>>>> (dump_stack+0x20/0x28)
>>>> [ 515.597053] [<80690164>] (dump_stack) from [<80116044>]
>>>> (__warn.part.3+0xb4/0xdc)
>>>> [ 515.604557] [<80115f90>] (__warn.part.3) from [<801160d8>]
>>>> (warn_slowpath_fmt+0x6c/0x90)
>>>> [ 515.612734] r6:000002ac r5:8080befc r4:80a07008
>>>> [ 515.617463] [<80116070>] (warn_slowpath_fmt) from [<803a5614>]
>>>> (clk_core_unprepare+0x13c/0x170)
>>>> [ 515.626167] r3:8080cdf4 r2:8080bfc0
>>>> [ 515.629834] r7:98d682a8 r6:9d8a9200 r5:9e5151a0 r4:97abd620
>>>> [ 515.635530] [<803a54d8>] (clk_core_unprepare) from
>>>> [<803a76a4>]
>>>> (clk_unprepare+0x34/0x3c)
>>>> [ 515.643812] r5:9e5151a0 r4:97abd620
>>>> [ 515.647529] [<803a7670>] (clk_unprepare) from [<804f36ec>]
>>>> (aspeed_video_off+0x38/0x50)
>>>> [ 515.655539] r5:9e5151a0 r4:9e504000
>>>> [ 515.659242] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
>>>> (aspeed_video_release+0x90/0x114)
>>>> [ 515.668036] r5:9e5044b0 r4:9e504000
>>>> [ 515.671643] [<804f42c8>] (aspeed_video_release) from
>>>> [<804d302c>]
>>>> (v4l2_release+0xd4/0xe8)
>>>> [ 515.679999] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
>>>> [ 515.685695] [<804d2f58>] (v4l2_release) from [<80236454>]
>>>> (__fput+0x98/0x1c4)
>>>> [ 515.692914] r5:9e51b608 r4:9d8a9200
>>>> [ 515.696597] [<802363bc>] (__fput) from [<802365e8>]
>>>> (____fput+0x18/0x1c)
>>>> [ 515.703315] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
>>>> r5:9d8e35a0 r4:9d8e38dc
>>>> [ 515.711167] [<802365d0>] (____fput) from [<80131ca4>]
>>>> (task_work_run+0x7c/0xa0)
>>>> [ 515.718596] [<80131c28>] (task_work_run) from [<80106884>]
>>>> (do_work_pending+0x4a8/0x578)
>>>> [ 515.726777] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
>>>> [ 515.732466] [<801063dc>] (do_work_pending) from [<8010106c>]
>>>> (slow_work_pending+0xc/0x20)
>>>> [ 515.740727] Exception stack(0x9d88ffb0 to 0x9d88fff8)
>>>> [ 515.745840] ffa0: 00000000
>>>> 76f18094 00000000 00000000
>>>> [ 515.754122] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
>>>> 00000000 48e20fa4 00000000
>>>> [ 515.762386] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
>>>> 00000007
>>>> [ 515.769097] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
>>>> r6:7eda4c20 r5:00176778
>>>> [ 515.777006] r4:00000007
>>>> [ 515.779558] ---[ end trace 12c04aadef8afbbb ]---
>>>> [ 515.784176] ------------[ cut here ]------------
>>>> [ 515.788817] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:825
>>>> clk_core_disable+0x18c/0x204
>>>> [ 515.797161] eclk-gate already disabled
>>>> [ 515.800916] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
>>>> G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4
>>>> #1
>>>> [ 515.811945] Hardware name: Generic DT based system
>>>> [ 515.816730] Backtrace:
>>>> [ 515.819210] [<80107cdc>] (dump_backtrace) from [<80107f10>]
>>>> (show_stack+0x20/0x24)
>>>> [ 515.826782] r7:803a5900 r6:00000009 r5:00000000 r4:9d88fe04
>>>> [ 515.832454] [<80107ef0>] (show_stack) from [<80690184>]
>>>> (dump_stack+0x20/0x28)
>>>> [ 515.839687] [<80690164>] (dump_stack) from [<80116044>]
>>>> (__warn.part.3+0xb4/0xdc)
>>>> [ 515.847170] [<80115f90>] (__warn.part.3) from [<801160d8>]
>>>> (warn_slowpath_fmt+0x6c/0x90)
>>>> [ 515.855247] r6:00000339 r5:8080befc r4:80a07008
>>>> [ 515.859868] [<80116070>] (warn_slowpath_fmt) from [<803a5900>]
>>>> (clk_core_disable+0x18c/0x204)
>>>> [ 515.868385] r3:8080cdd0 r2:8080c00c
>>>> [ 515.871957] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:97abd560
>>>> [ 515.877615] [<803a5774>] (clk_core_disable) from [<803a59a0>]
>>>> (clk_core_disable_lock+0x28/0x34)
>>>> [ 515.886301] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:a0000013
>>>> [ 515.891960] [<803a5978>] (clk_core_disable_lock) from
>>>> [<803a7714>]
>>>> (clk_disable+0x2c/0x30)
>>>> [ 515.900216] r5:9e5151a0 r4:9e515f60
>>>> [ 515.903816] [<803a76e8>] (clk_disable) from [<804f36f8>]
>>>> (aspeed_video_off+0x44/0x50)
>>>> [ 515.911656] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
>>>> (aspeed_video_release+0x90/0x114)
>>>> [ 515.920341] r5:9e5044b0 r4:9e504000
>>>> [ 515.923921] [<804f42c8>] (aspeed_video_release) from
>>>> [<804d302c>]
>>>> (v4l2_release+0xd4/0xe8)
>>>> [ 515.932184] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
>>>> [ 515.937851] [<804d2f58>] (v4l2_release) from [<80236454>]
>>>> (__fput+0x98/0x1c4)
>>>> [ 515.944980] r5:9e51b608 r4:9d8a9200
>>>> [ 515.948559] [<802363bc>] (__fput) from [<802365e8>]
>>>> (____fput+0x18/0x1c)
>>>> [ 515.955257] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
>>>> r5:9d8e35a0 r4:9d8e38dc
>>>> [ 515.963008] [<802365d0>] (____fput) from [<80131ca4>]
>>>> (task_work_run+0x7c/0xa0)
>>>> [ 515.970333] [<80131c28>] (task_work_run) from [<80106884>]
>>>> (do_work_pending+0x4a8/0x578)
>>>> [ 515.978421] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
>>>> [ 515.984086] [<801063dc>] (do_work_pending) from [<8010106c>]
>>>> (slow_work_pending+0xc/0x20)
>>>> [ 515.992247] Exception stack(0x9d88ffb0 to 0x9d88fff8)
>>>> [ 515.997296] ffa0: 00000000
>>>> 76f18094 00000000 00000000
>>>> [ 516.005473] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
>>>> 00000000 48e20fa4 00000000
>>>> [ 516.013642] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
>>>> 00000007
>>>> [ 516.020257] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
>>>> r6:7eda4c20 r5:00176778
>>>> [ 516.028072] r4:00000007
>>>> [ 516.030606] ---[ end trace 12c04aadef8afbbc ]---
>>>>
>>>> To prevent this issue, this commit adds spinlock protection and
>>>> clock status checking logic into the Aspeed video engine driver.
>>>>
>>>> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
>>>> Reviewed-by: Eddie James <eajames@linux.ibm.com>
>>>> ---
>>>> drivers/media/platform/aspeed-video.c | 32
>>>> ++++++++++++++++++++++++-
>>>> --
>>>> 1 file changed, 29 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/drivers/media/platform/aspeed-video.c
>>>> b/drivers/media/platform/aspeed-video.c
>>>> index 55c55a68b016..2dac6d20b180 100644
>>>> --- a/drivers/media/platform/aspeed-video.c
>>>> +++ b/drivers/media/platform/aspeed-video.c
>>>> @@ -187,6 +187,7 @@ enum {
>>>> VIDEO_STREAMING,
>>>> VIDEO_FRAME_INPRG,
>>>> VIDEO_STOPPED,
>>>> + VIDEO_CLOCKS_ON,
>>>> };
>>>>
>>>> struct aspeed_video_addr {
>>>> @@ -483,19 +484,29 @@ static void
>>>> aspeed_video_enable_mode_detect(struct aspeed_video *video)
>>>>
>>>> static void aspeed_video_off(struct aspeed_video *video)
>>>> {
>>>> + if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
>>>> + return;
>>>> +
>>>> /* Disable interrupts */
>>>> aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
>>>>
>>>> /* Turn off the relevant clocks */
>>>> clk_disable_unprepare(video->vclk);
>>>> clk_disable_unprepare(video->eclk);
>>>> +
>>>> + clear_bit(VIDEO_CLOCKS_ON, &video->flags);
>>>> }
>>>>
>>>> static void aspeed_video_on(struct aspeed_video *video)
>>>> {
>>>> + if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
>>>> + return;
>>>> +
>>>> /* Turn on the relevant clocks */
>>>> clk_prepare_enable(video->eclk);
>>>> clk_prepare_enable(video->vclk);
>>>> +
>>>> + set_bit(VIDEO_CLOCKS_ON, &video->flags);
>>>> }
>>>>
>>>> static void aspeed_video_bufs_done(struct aspeed_video *video,
>>>> @@ -513,12 +524,14 @@ static void aspeed_video_bufs_done(struct
>>>> aspeed_video *video,
>>>>
>>>> static void aspeed_video_irq_res_change(struct aspeed_video
>>>> *video)
>>>> {
>>>> + spin_lock(&video->lock);
>>>> dev_dbg(video->dev, "Resolution changed; resetting\n");
>>>>
>>>> set_bit(VIDEO_RES_CHANGE, &video->flags);
>>>> clear_bit(VIDEO_FRAME_INPRG, &video->flags);
>>>>
>>>> aspeed_video_off(video);
>>>> + spin_unlock(&video->lock);
>>>> aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
>>>>
>>>> schedule_delayed_work(&video->res_work,
>>>> RESOLUTION_CHANGE_DELAY);
>>>> @@ -938,9 +951,13 @@ static void aspeed_video_init_regs(struct
>>>> aspeed_video *video)
>>>>
>>>> static void aspeed_video_start(struct aspeed_video *video)
>>>> {
>>>> + unsigned long flags;
>>>> +
>>>> + spin_lock_irqsave(&video->lock, flags);
>>>> aspeed_video_on(video);
>>>>
>>>> aspeed_video_init_regs(video);
>>>> + spin_unlock_irqrestore(&video->lock, flags);
>>>>
>>>> /* Resolution set to 640x480 if no signal found */
>>>> aspeed_video_get_resolution(video);
>>>> @@ -956,6 +973,9 @@ static void aspeed_video_start(struct
>>>> aspeed_video *video)
>>>>
>>>> static void aspeed_video_stop(struct aspeed_video *video)
>>>> {
>>>> + unsigned long flags;
>>>> +
>>>> + spin_lock_irqsave(&video->lock, flags);
>>>> set_bit(VIDEO_STOPPED, &video->flags);
>>>> cancel_delayed_work_sync(&video->res_work);
>>>>
>>>> @@ -969,6 +989,7 @@ static void aspeed_video_stop(struct
>>>> aspeed_video
>>>> *video)
>>>>
>>>> video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
>>>> video->flags = 0;
>>>> + spin_unlock_irqrestore(&video->lock, flags);
>>>> }
>>>>
>>>> static int aspeed_video_querycap(struct file *file, void *fh,
>>>> @@ -1306,16 +1327,21 @@ static void
>>>> aspeed_video_resolution_work(struct work_struct *work)
>>>> struct delayed_work *dwork = to_delayed_work(work);
>>>> struct aspeed_video *video = container_of(dwork, struct
>>>> aspeed_video,
>>>> res_work);
>>>> - u32 input_status = video->v4l2_input_status;
>>>> + unsigned long flags;
>>>> + u32 input_status;
>>>>
>>>> + spin_lock_irqsave(&video->lock, flags);
>>>> + input_status = video->v4l2_input_status;
>>>> aspeed_video_on(video);
>>>>
>>>> /* Exit early in case no clients remain */
>>>> - if (test_bit(VIDEO_STOPPED, &video->flags))
>>>> + if (test_bit(VIDEO_STOPPED, &video->flags)) {
>>>> + spin_unlock_irqrestore(&video->lock, flags);
>>>> goto done;
>>>> + }
>>>>
>>>> aspeed_video_init_regs(video);
>>>> -
>>>> + spin_unlock_irqrestore(&video->lock, flags);
>>>> aspeed_video_get_resolution(video);
>>>>
>>>> if (video->detected_timings.width != video-
>>>>> active_timings.width ||
>
^ permalink raw reply
* [PATCH 1/7] media: aspeed: fix a kernel warning on clk control
From: Benjamin Herrenschmidt @ 2019-05-09 1:08 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <6e93467e-1556-3cfd-b15c-c12b6907f526@linux.intel.com>
On Wed, 2019-05-08 at 15:19 -0700, Jae Hyun Yoo wrote:
> On 5/7/2019 11:31 PM, Benjamin Herrenschmidt wrote:
> > On Thu, 2019-05-02 at 12:13 -0700, Jae Hyun Yoo wrote:
> > > Video engine clock control functions in the Aspeed video engine
> > > driver are being called from multiple context without any
> > > protection so video clocks can be double disabled and eventually
> > > it causes a kernel warning with stack dump printing out like
> > > below:
> >
> > I already objected to the use of set_bit, clear_bit etc...
> >
> > Either you are protected by a spinlock, in which case you don't
> > need
> > them, use either the __ versions (non atomic) or just a bloody bool
> > flag which is a lot clearer and will generated better code. Or you
> > aren't protected in which case the code seems racy.
>
> Got it. I'll use __set_bit and __clear_bit instead. Thanks for
> your pointing it out.
Why not a bool ? Any reason why you prefer bitops ? They are a bit of
an old-fashioned way of doing things unless you are actively trying to
save space by craming several flags in the same word.
Note: If you do the latter, ensure all users are properly locked, dont'
mix the __set_bit and set_bit variants on the same word.
Cheers,
Ben.
> Regards,
> Jae
>
> > > [ 515.540498] ------------[ cut here ]------------
> > > [ 515.545174] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:684
> > > clk_core_unprepare+0x13c/0x170
> > > [ 515.553806] vclk-gate already unprepared
> > > [ 515.557841] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
> > > G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4
> > > #1
> > > [ 515.568973] Hardware name: Generic DT based system
> > > [ 515.573777] Backtrace:
> > > [ 515.576272] [<80107cdc>] (dump_backtrace) from [<80107f10>]
> > > (show_stack+0x20/0x24)
> > > [ 515.583930] r7:803a5614 r6:00000009 r5:00000000 r4:9d88fe1c
> > > [ 515.589712] [<80107ef0>] (show_stack) from [<80690184>]
> > > (dump_stack+0x20/0x28)
> > > [ 515.597053] [<80690164>] (dump_stack) from [<80116044>]
> > > (__warn.part.3+0xb4/0xdc)
> > > [ 515.604557] [<80115f90>] (__warn.part.3) from [<801160d8>]
> > > (warn_slowpath_fmt+0x6c/0x90)
> > > [ 515.612734] r6:000002ac r5:8080befc r4:80a07008
> > > [ 515.617463] [<80116070>] (warn_slowpath_fmt) from [<803a5614>]
> > > (clk_core_unprepare+0x13c/0x170)
> > > [ 515.626167] r3:8080cdf4 r2:8080bfc0
> > > [ 515.629834] r7:98d682a8 r6:9d8a9200 r5:9e5151a0 r4:97abd620
> > > [ 515.635530] [<803a54d8>] (clk_core_unprepare) from
> > > [<803a76a4>]
> > > (clk_unprepare+0x34/0x3c)
> > > [ 515.643812] r5:9e5151a0 r4:97abd620
> > > [ 515.647529] [<803a7670>] (clk_unprepare) from [<804f36ec>]
> > > (aspeed_video_off+0x38/0x50)
> > > [ 515.655539] r5:9e5151a0 r4:9e504000
> > > [ 515.659242] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
> > > (aspeed_video_release+0x90/0x114)
> > > [ 515.668036] r5:9e5044b0 r4:9e504000
> > > [ 515.671643] [<804f42c8>] (aspeed_video_release) from
> > > [<804d302c>]
> > > (v4l2_release+0xd4/0xe8)
> > > [ 515.679999] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
> > > [ 515.685695] [<804d2f58>] (v4l2_release) from [<80236454>]
> > > (__fput+0x98/0x1c4)
> > > [ 515.692914] r5:9e51b608 r4:9d8a9200
> > > [ 515.696597] [<802363bc>] (__fput) from [<802365e8>]
> > > (____fput+0x18/0x1c)
> > > [ 515.703315] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
> > > r5:9d8e35a0 r4:9d8e38dc
> > > [ 515.711167] [<802365d0>] (____fput) from [<80131ca4>]
> > > (task_work_run+0x7c/0xa0)
> > > [ 515.718596] [<80131c28>] (task_work_run) from [<80106884>]
> > > (do_work_pending+0x4a8/0x578)
> > > [ 515.726777] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
> > > [ 515.732466] [<801063dc>] (do_work_pending) from [<8010106c>]
> > > (slow_work_pending+0xc/0x20)
> > > [ 515.740727] Exception stack(0x9d88ffb0 to 0x9d88fff8)
> > > [ 515.745840] ffa0: 00000000
> > > 76f18094 00000000 00000000
> > > [ 515.754122] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
> > > 00000000 48e20fa4 00000000
> > > [ 515.762386] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
> > > 00000007
> > > [ 515.769097] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
> > > r6:7eda4c20 r5:00176778
> > > [ 515.777006] r4:00000007
> > > [ 515.779558] ---[ end trace 12c04aadef8afbbb ]---
> > > [ 515.784176] ------------[ cut here ]------------
> > > [ 515.788817] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:825
> > > clk_core_disable+0x18c/0x204
> > > [ 515.797161] eclk-gate already disabled
> > > [ 515.800916] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
> > > G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4
> > > #1
> > > [ 515.811945] Hardware name: Generic DT based system
> > > [ 515.816730] Backtrace:
> > > [ 515.819210] [<80107cdc>] (dump_backtrace) from [<80107f10>]
> > > (show_stack+0x20/0x24)
> > > [ 515.826782] r7:803a5900 r6:00000009 r5:00000000 r4:9d88fe04
> > > [ 515.832454] [<80107ef0>] (show_stack) from [<80690184>]
> > > (dump_stack+0x20/0x28)
> > > [ 515.839687] [<80690164>] (dump_stack) from [<80116044>]
> > > (__warn.part.3+0xb4/0xdc)
> > > [ 515.847170] [<80115f90>] (__warn.part.3) from [<801160d8>]
> > > (warn_slowpath_fmt+0x6c/0x90)
> > > [ 515.855247] r6:00000339 r5:8080befc r4:80a07008
> > > [ 515.859868] [<80116070>] (warn_slowpath_fmt) from [<803a5900>]
> > > (clk_core_disable+0x18c/0x204)
> > > [ 515.868385] r3:8080cdd0 r2:8080c00c
> > > [ 515.871957] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:97abd560
> > > [ 515.877615] [<803a5774>] (clk_core_disable) from [<803a59a0>]
> > > (clk_core_disable_lock+0x28/0x34)
> > > [ 515.886301] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:a0000013
> > > [ 515.891960] [<803a5978>] (clk_core_disable_lock) from
> > > [<803a7714>]
> > > (clk_disable+0x2c/0x30)
> > > [ 515.900216] r5:9e5151a0 r4:9e515f60
> > > [ 515.903816] [<803a76e8>] (clk_disable) from [<804f36f8>]
> > > (aspeed_video_off+0x44/0x50)
> > > [ 515.911656] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
> > > (aspeed_video_release+0x90/0x114)
> > > [ 515.920341] r5:9e5044b0 r4:9e504000
> > > [ 515.923921] [<804f42c8>] (aspeed_video_release) from
> > > [<804d302c>]
> > > (v4l2_release+0xd4/0xe8)
> > > [ 515.932184] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
> > > [ 515.937851] [<804d2f58>] (v4l2_release) from [<80236454>]
> > > (__fput+0x98/0x1c4)
> > > [ 515.944980] r5:9e51b608 r4:9d8a9200
> > > [ 515.948559] [<802363bc>] (__fput) from [<802365e8>]
> > > (____fput+0x18/0x1c)
> > > [ 515.955257] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
> > > r5:9d8e35a0 r4:9d8e38dc
> > > [ 515.963008] [<802365d0>] (____fput) from [<80131ca4>]
> > > (task_work_run+0x7c/0xa0)
> > > [ 515.970333] [<80131c28>] (task_work_run) from [<80106884>]
> > > (do_work_pending+0x4a8/0x578)
> > > [ 515.978421] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
> > > [ 515.984086] [<801063dc>] (do_work_pending) from [<8010106c>]
> > > (slow_work_pending+0xc/0x20)
> > > [ 515.992247] Exception stack(0x9d88ffb0 to 0x9d88fff8)
> > > [ 515.997296] ffa0: 00000000
> > > 76f18094 00000000 00000000
> > > [ 516.005473] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
> > > 00000000 48e20fa4 00000000
> > > [ 516.013642] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
> > > 00000007
> > > [ 516.020257] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
> > > r6:7eda4c20 r5:00176778
> > > [ 516.028072] r4:00000007
> > > [ 516.030606] ---[ end trace 12c04aadef8afbbc ]---
> > >
> > > To prevent this issue, this commit adds spinlock protection and
> > > clock status checking logic into the Aspeed video engine driver.
> > >
> > > Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
> > > Reviewed-by: Eddie James <eajames@linux.ibm.com>
> > > ---
> > > drivers/media/platform/aspeed-video.c | 32
> > > ++++++++++++++++++++++++-
> > > --
> > > 1 file changed, 29 insertions(+), 3 deletions(-)
> > >
> > > diff --git a/drivers/media/platform/aspeed-video.c
> > > b/drivers/media/platform/aspeed-video.c
> > > index 55c55a68b016..2dac6d20b180 100644
> > > --- a/drivers/media/platform/aspeed-video.c
> > > +++ b/drivers/media/platform/aspeed-video.c
> > > @@ -187,6 +187,7 @@ enum {
> > > VIDEO_STREAMING,
> > > VIDEO_FRAME_INPRG,
> > > VIDEO_STOPPED,
> > > + VIDEO_CLOCKS_ON,
> > > };
> > >
> > > struct aspeed_video_addr {
> > > @@ -483,19 +484,29 @@ static void
> > > aspeed_video_enable_mode_detect(struct aspeed_video *video)
> > >
> > > static void aspeed_video_off(struct aspeed_video *video)
> > > {
> > > + if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
> > > + return;
> > > +
> > > /* Disable interrupts */
> > > aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
> > >
> > > /* Turn off the relevant clocks */
> > > clk_disable_unprepare(video->vclk);
> > > clk_disable_unprepare(video->eclk);
> > > +
> > > + clear_bit(VIDEO_CLOCKS_ON, &video->flags);
> > > }
> > >
> > > static void aspeed_video_on(struct aspeed_video *video)
> > > {
> > > + if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
> > > + return;
> > > +
> > > /* Turn on the relevant clocks */
> > > clk_prepare_enable(video->eclk);
> > > clk_prepare_enable(video->vclk);
> > > +
> > > + set_bit(VIDEO_CLOCKS_ON, &video->flags);
> > > }
> > >
> > > static void aspeed_video_bufs_done(struct aspeed_video *video,
> > > @@ -513,12 +524,14 @@ static void aspeed_video_bufs_done(struct
> > > aspeed_video *video,
> > >
> > > static void aspeed_video_irq_res_change(struct aspeed_video
> > > *video)
> > > {
> > > + spin_lock(&video->lock);
> > > dev_dbg(video->dev, "Resolution changed; resetting\n");
> > >
> > > set_bit(VIDEO_RES_CHANGE, &video->flags);
> > > clear_bit(VIDEO_FRAME_INPRG, &video->flags);
> > >
> > > aspeed_video_off(video);
> > > + spin_unlock(&video->lock);
> > > aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
> > >
> > > schedule_delayed_work(&video->res_work,
> > > RESOLUTION_CHANGE_DELAY);
> > > @@ -938,9 +951,13 @@ static void aspeed_video_init_regs(struct
> > > aspeed_video *video)
> > >
> > > static void aspeed_video_start(struct aspeed_video *video)
> > > {
> > > + unsigned long flags;
> > > +
> > > + spin_lock_irqsave(&video->lock, flags);
> > > aspeed_video_on(video);
> > >
> > > aspeed_video_init_regs(video);
> > > + spin_unlock_irqrestore(&video->lock, flags);
> > >
> > > /* Resolution set to 640x480 if no signal found */
> > > aspeed_video_get_resolution(video);
> > > @@ -956,6 +973,9 @@ static void aspeed_video_start(struct
> > > aspeed_video *video)
> > >
> > > static void aspeed_video_stop(struct aspeed_video *video)
> > > {
> > > + unsigned long flags;
> > > +
> > > + spin_lock_irqsave(&video->lock, flags);
> > > set_bit(VIDEO_STOPPED, &video->flags);
> > > cancel_delayed_work_sync(&video->res_work);
> > >
> > > @@ -969,6 +989,7 @@ static void aspeed_video_stop(struct
> > > aspeed_video
> > > *video)
> > >
> > > video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
> > > video->flags = 0;
> > > + spin_unlock_irqrestore(&video->lock, flags);
> > > }
> > >
> > > static int aspeed_video_querycap(struct file *file, void *fh,
> > > @@ -1306,16 +1327,21 @@ static void
> > > aspeed_video_resolution_work(struct work_struct *work)
> > > struct delayed_work *dwork = to_delayed_work(work);
> > > struct aspeed_video *video = container_of(dwork, struct
> > > aspeed_video,
> > > res_work);
> > > - u32 input_status = video->v4l2_input_status;
> > > + unsigned long flags;
> > > + u32 input_status;
> > >
> > > + spin_lock_irqsave(&video->lock, flags);
> > > + input_status = video->v4l2_input_status;
> > > aspeed_video_on(video);
> > >
> > > /* Exit early in case no clients remain */
> > > - if (test_bit(VIDEO_STOPPED, &video->flags))
> > > + if (test_bit(VIDEO_STOPPED, &video->flags)) {
> > > + spin_unlock_irqrestore(&video->lock, flags);
> > > goto done;
> > > + }
> > >
> > > aspeed_video_init_regs(video);
> > > -
> > > + spin_unlock_irqrestore(&video->lock, flags);
> > > aspeed_video_get_resolution(video);
> > >
> > > if (video->detected_timings.width != video-
> > > > active_timings.width ||
^ permalink raw reply
* [PATCH 1/7] media: aspeed: fix a kernel warning on clk control
From: Jae Hyun Yoo @ 2019-05-08 22:19 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1ec7397cb164b40877839bbc90f79b5942675fdb.camel@kernel.crashing.org>
On 5/7/2019 11:31 PM, Benjamin Herrenschmidt wrote:
> On Thu, 2019-05-02 at 12:13 -0700, Jae Hyun Yoo wrote:
>> Video engine clock control functions in the Aspeed video engine
>> driver are being called from multiple context without any
>> protection so video clocks can be double disabled and eventually
>> it causes a kernel warning with stack dump printing out like below:
>
> I already objected to the use of set_bit, clear_bit etc...
>
> Either you are protected by a spinlock, in which case you don't need
> them, use either the __ versions (non atomic) or just a bloody bool
> flag which is a lot clearer and will generated better code. Or you
> aren't protected in which case the code seems racy.
Got it. I'll use __set_bit and __clear_bit instead. Thanks for
your pointing it out.
Regards,
Jae
>> [ 515.540498] ------------[ cut here ]------------
>> [ 515.545174] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:684
>> clk_core_unprepare+0x13c/0x170
>> [ 515.553806] vclk-gate already unprepared
>> [ 515.557841] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
>> G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4 #1
>> [ 515.568973] Hardware name: Generic DT based system
>> [ 515.573777] Backtrace:
>> [ 515.576272] [<80107cdc>] (dump_backtrace) from [<80107f10>]
>> (show_stack+0x20/0x24)
>> [ 515.583930] r7:803a5614 r6:00000009 r5:00000000 r4:9d88fe1c
>> [ 515.589712] [<80107ef0>] (show_stack) from [<80690184>]
>> (dump_stack+0x20/0x28)
>> [ 515.597053] [<80690164>] (dump_stack) from [<80116044>]
>> (__warn.part.3+0xb4/0xdc)
>> [ 515.604557] [<80115f90>] (__warn.part.3) from [<801160d8>]
>> (warn_slowpath_fmt+0x6c/0x90)
>> [ 515.612734] r6:000002ac r5:8080befc r4:80a07008
>> [ 515.617463] [<80116070>] (warn_slowpath_fmt) from [<803a5614>]
>> (clk_core_unprepare+0x13c/0x170)
>> [ 515.626167] r3:8080cdf4 r2:8080bfc0
>> [ 515.629834] r7:98d682a8 r6:9d8a9200 r5:9e5151a0 r4:97abd620
>> [ 515.635530] [<803a54d8>] (clk_core_unprepare) from [<803a76a4>]
>> (clk_unprepare+0x34/0x3c)
>> [ 515.643812] r5:9e5151a0 r4:97abd620
>> [ 515.647529] [<803a7670>] (clk_unprepare) from [<804f36ec>]
>> (aspeed_video_off+0x38/0x50)
>> [ 515.655539] r5:9e5151a0 r4:9e504000
>> [ 515.659242] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
>> (aspeed_video_release+0x90/0x114)
>> [ 515.668036] r5:9e5044b0 r4:9e504000
>> [ 515.671643] [<804f42c8>] (aspeed_video_release) from [<804d302c>]
>> (v4l2_release+0xd4/0xe8)
>> [ 515.679999] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
>> [ 515.685695] [<804d2f58>] (v4l2_release) from [<80236454>]
>> (__fput+0x98/0x1c4)
>> [ 515.692914] r5:9e51b608 r4:9d8a9200
>> [ 515.696597] [<802363bc>] (__fput) from [<802365e8>]
>> (____fput+0x18/0x1c)
>> [ 515.703315] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
>> r5:9d8e35a0 r4:9d8e38dc
>> [ 515.711167] [<802365d0>] (____fput) from [<80131ca4>]
>> (task_work_run+0x7c/0xa0)
>> [ 515.718596] [<80131c28>] (task_work_run) from [<80106884>]
>> (do_work_pending+0x4a8/0x578)
>> [ 515.726777] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
>> [ 515.732466] [<801063dc>] (do_work_pending) from [<8010106c>]
>> (slow_work_pending+0xc/0x20)
>> [ 515.740727] Exception stack(0x9d88ffb0 to 0x9d88fff8)
>> [ 515.745840] ffa0: 00000000
>> 76f18094 00000000 00000000
>> [ 515.754122] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
>> 00000000 48e20fa4 00000000
>> [ 515.762386] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
>> 00000007
>> [ 515.769097] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
>> r6:7eda4c20 r5:00176778
>> [ 515.777006] r4:00000007
>> [ 515.779558] ---[ end trace 12c04aadef8afbbb ]---
>> [ 515.784176] ------------[ cut here ]------------
>> [ 515.788817] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:825
>> clk_core_disable+0x18c/0x204
>> [ 515.797161] eclk-gate already disabled
>> [ 515.800916] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
>> G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4 #1
>> [ 515.811945] Hardware name: Generic DT based system
>> [ 515.816730] Backtrace:
>> [ 515.819210] [<80107cdc>] (dump_backtrace) from [<80107f10>]
>> (show_stack+0x20/0x24)
>> [ 515.826782] r7:803a5900 r6:00000009 r5:00000000 r4:9d88fe04
>> [ 515.832454] [<80107ef0>] (show_stack) from [<80690184>]
>> (dump_stack+0x20/0x28)
>> [ 515.839687] [<80690164>] (dump_stack) from [<80116044>]
>> (__warn.part.3+0xb4/0xdc)
>> [ 515.847170] [<80115f90>] (__warn.part.3) from [<801160d8>]
>> (warn_slowpath_fmt+0x6c/0x90)
>> [ 515.855247] r6:00000339 r5:8080befc r4:80a07008
>> [ 515.859868] [<80116070>] (warn_slowpath_fmt) from [<803a5900>]
>> (clk_core_disable+0x18c/0x204)
>> [ 515.868385] r3:8080cdd0 r2:8080c00c
>> [ 515.871957] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:97abd560
>> [ 515.877615] [<803a5774>] (clk_core_disable) from [<803a59a0>]
>> (clk_core_disable_lock+0x28/0x34)
>> [ 515.886301] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:a0000013
>> [ 515.891960] [<803a5978>] (clk_core_disable_lock) from [<803a7714>]
>> (clk_disable+0x2c/0x30)
>> [ 515.900216] r5:9e5151a0 r4:9e515f60
>> [ 515.903816] [<803a76e8>] (clk_disable) from [<804f36f8>]
>> (aspeed_video_off+0x44/0x50)
>> [ 515.911656] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
>> (aspeed_video_release+0x90/0x114)
>> [ 515.920341] r5:9e5044b0 r4:9e504000
>> [ 515.923921] [<804f42c8>] (aspeed_video_release) from [<804d302c>]
>> (v4l2_release+0xd4/0xe8)
>> [ 515.932184] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
>> [ 515.937851] [<804d2f58>] (v4l2_release) from [<80236454>]
>> (__fput+0x98/0x1c4)
>> [ 515.944980] r5:9e51b608 r4:9d8a9200
>> [ 515.948559] [<802363bc>] (__fput) from [<802365e8>]
>> (____fput+0x18/0x1c)
>> [ 515.955257] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
>> r5:9d8e35a0 r4:9d8e38dc
>> [ 515.963008] [<802365d0>] (____fput) from [<80131ca4>]
>> (task_work_run+0x7c/0xa0)
>> [ 515.970333] [<80131c28>] (task_work_run) from [<80106884>]
>> (do_work_pending+0x4a8/0x578)
>> [ 515.978421] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
>> [ 515.984086] [<801063dc>] (do_work_pending) from [<8010106c>]
>> (slow_work_pending+0xc/0x20)
>> [ 515.992247] Exception stack(0x9d88ffb0 to 0x9d88fff8)
>> [ 515.997296] ffa0: 00000000
>> 76f18094 00000000 00000000
>> [ 516.005473] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
>> 00000000 48e20fa4 00000000
>> [ 516.013642] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
>> 00000007
>> [ 516.020257] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
>> r6:7eda4c20 r5:00176778
>> [ 516.028072] r4:00000007
>> [ 516.030606] ---[ end trace 12c04aadef8afbbc ]---
>>
>> To prevent this issue, this commit adds spinlock protection and
>> clock status checking logic into the Aspeed video engine driver.
>>
>> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
>> Reviewed-by: Eddie James <eajames@linux.ibm.com>
>> ---
>> drivers/media/platform/aspeed-video.c | 32 ++++++++++++++++++++++++-
>> --
>> 1 file changed, 29 insertions(+), 3 deletions(-)
>>
>> diff --git a/drivers/media/platform/aspeed-video.c
>> b/drivers/media/platform/aspeed-video.c
>> index 55c55a68b016..2dac6d20b180 100644
>> --- a/drivers/media/platform/aspeed-video.c
>> +++ b/drivers/media/platform/aspeed-video.c
>> @@ -187,6 +187,7 @@ enum {
>> VIDEO_STREAMING,
>> VIDEO_FRAME_INPRG,
>> VIDEO_STOPPED,
>> + VIDEO_CLOCKS_ON,
>> };
>>
>> struct aspeed_video_addr {
>> @@ -483,19 +484,29 @@ static void
>> aspeed_video_enable_mode_detect(struct aspeed_video *video)
>>
>> static void aspeed_video_off(struct aspeed_video *video)
>> {
>> + if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
>> + return;
>> +
>> /* Disable interrupts */
>> aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
>>
>> /* Turn off the relevant clocks */
>> clk_disable_unprepare(video->vclk);
>> clk_disable_unprepare(video->eclk);
>> +
>> + clear_bit(VIDEO_CLOCKS_ON, &video->flags);
>> }
>>
>> static void aspeed_video_on(struct aspeed_video *video)
>> {
>> + if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
>> + return;
>> +
>> /* Turn on the relevant clocks */
>> clk_prepare_enable(video->eclk);
>> clk_prepare_enable(video->vclk);
>> +
>> + set_bit(VIDEO_CLOCKS_ON, &video->flags);
>> }
>>
>> static void aspeed_video_bufs_done(struct aspeed_video *video,
>> @@ -513,12 +524,14 @@ static void aspeed_video_bufs_done(struct
>> aspeed_video *video,
>>
>> static void aspeed_video_irq_res_change(struct aspeed_video *video)
>> {
>> + spin_lock(&video->lock);
>> dev_dbg(video->dev, "Resolution changed; resetting\n");
>>
>> set_bit(VIDEO_RES_CHANGE, &video->flags);
>> clear_bit(VIDEO_FRAME_INPRG, &video->flags);
>>
>> aspeed_video_off(video);
>> + spin_unlock(&video->lock);
>> aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
>>
>> schedule_delayed_work(&video->res_work,
>> RESOLUTION_CHANGE_DELAY);
>> @@ -938,9 +951,13 @@ static void aspeed_video_init_regs(struct
>> aspeed_video *video)
>>
>> static void aspeed_video_start(struct aspeed_video *video)
>> {
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&video->lock, flags);
>> aspeed_video_on(video);
>>
>> aspeed_video_init_regs(video);
>> + spin_unlock_irqrestore(&video->lock, flags);
>>
>> /* Resolution set to 640x480 if no signal found */
>> aspeed_video_get_resolution(video);
>> @@ -956,6 +973,9 @@ static void aspeed_video_start(struct
>> aspeed_video *video)
>>
>> static void aspeed_video_stop(struct aspeed_video *video)
>> {
>> + unsigned long flags;
>> +
>> + spin_lock_irqsave(&video->lock, flags);
>> set_bit(VIDEO_STOPPED, &video->flags);
>> cancel_delayed_work_sync(&video->res_work);
>>
>> @@ -969,6 +989,7 @@ static void aspeed_video_stop(struct aspeed_video
>> *video)
>>
>> video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
>> video->flags = 0;
>> + spin_unlock_irqrestore(&video->lock, flags);
>> }
>>
>> static int aspeed_video_querycap(struct file *file, void *fh,
>> @@ -1306,16 +1327,21 @@ static void
>> aspeed_video_resolution_work(struct work_struct *work)
>> struct delayed_work *dwork = to_delayed_work(work);
>> struct aspeed_video *video = container_of(dwork, struct
>> aspeed_video,
>> res_work);
>> - u32 input_status = video->v4l2_input_status;
>> + unsigned long flags;
>> + u32 input_status;
>>
>> + spin_lock_irqsave(&video->lock, flags);
>> + input_status = video->v4l2_input_status;
>> aspeed_video_on(video);
>>
>> /* Exit early in case no clients remain */
>> - if (test_bit(VIDEO_STOPPED, &video->flags))
>> + if (test_bit(VIDEO_STOPPED, &video->flags)) {
>> + spin_unlock_irqrestore(&video->lock, flags);
>> goto done;
>> + }
>>
>> aspeed_video_init_regs(video);
>> -
>> + spin_unlock_irqrestore(&video->lock, flags);
>> aspeed_video_get_resolution(video);
>>
>> if (video->detected_timings.width != video-
>>> active_timings.width ||
>
^ permalink raw reply
* [PATCH 2/2] drm/aspeed: Add DVO output option to GFX driver
From: Benjamin Herrenschmidt @ 2019-05-08 6:33 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <671575004.3553124.1556833901812.JavaMail.zimbra@raptorengineeringinc.com>
On Thu, 2019-05-02 at 16:51 -0500, Timothy Pearson wrote:
> The AST2500 offers an alternate GFX output mode over DVO.
> Enable DVO or VGA output mode conditionally based on two new
> device tree properties, output-vga and output-dvo.
It would be better to have output-type= which contains "dvo" or "vga"
Also you need to update the bindings.
Cheers,
Ben.
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx.h | 6 ++++++
> drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 29
> +++++++++++++++++++++++------
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 17 ++++++++++++++++-
> 3 files changed, 45 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> index b34c97613aaf..6f9bc01191c0 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> @@ -14,6 +14,8 @@ struct aspeed_gfx {
> struct drm_simple_display_pipe pipe;
> struct drm_connector connector;
> struct drm_fbdev_cma *fbdev;
> +
> + u8 output_mode;
> };
>
> int aspeed_gfx_create_pipe(struct drm_device *drm);
> @@ -105,3 +107,7 @@ int aspeed_gfx_create_output(struct drm_device
> *drm);
>
> /* Default Threshold Seting */
> #define G5_CRT_THROD_VAL (CRT_THROD_LOW(0x24) |
> CRT_THROD_HIGH(0x3C))
> +
> +/* Output mode */
> +#define OUTPUT_VGA 0x1
> +#define OUTPUT_DVO 0x2
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> index 15db9e426ec4..ee16f9011d70 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> // Copyright 2018 IBM Corporation
> +// Copyright 2019 Raptor Engineering, LLC
>
> #include <linux/clk.h>
> #include <linux/reset.h>
> @@ -59,11 +60,21 @@ static void aspeed_gfx_enable_controller(struct
> aspeed_gfx *priv)
> u32 ctrl1 = readl(priv->base + CRT_CTRL1);
> u32 ctrl2 = readl(priv->base + CRT_CTRL2);
>
> - /* SCU2C: set DAC source for display output to Graphics CRT
> (GFX) */
> - regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
> + if (priv->output_mode & OUTPUT_VGA) {
> + /* SCU2C: set DAC source for display output to Graphics
> CRT (GFX) */
> + regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
> + }
> + if (priv->output_mode & OUTPUT_DVO) {
> + /* SCU2C: set DVO source for display output to Graphics
> CRT (GFX) */
> + regmap_update_bits(priv->scu, 0x2c, BIT(18), BIT(18));
> + }
>
> writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1);
> - writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
> +
> + if (priv->output_mode & OUTPUT_VGA)
> + writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base +
> CRT_CTRL2);
> + if (priv->output_mode & OUTPUT_DVO)
> + writel(ctrl2 | CRT_CTRL_DVO_EN, priv->base +
> CRT_CTRL2);
> }
>
> static void aspeed_gfx_disable_controller(struct aspeed_gfx *priv)
> @@ -72,9 +83,15 @@ static void aspeed_gfx_disable_controller(struct
> aspeed_gfx *priv)
> u32 ctrl2 = readl(priv->base + CRT_CTRL2);
>
> writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1);
> - writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
> -
> - regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
> + if (priv->output_mode & OUTPUT_VGA)
> + writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base +
> CRT_CTRL2);
> + if (priv->output_mode & OUTPUT_DVO)
> + writel(ctrl2 & ~CRT_CTRL_DVO_EN, priv->base +
> CRT_CTRL2);
> +
> + if (priv->output_mode & OUTPUT_VGA)
> + regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
> + if (priv->output_mode & OUTPUT_DVO)
> + regmap_update_bits(priv->scu, 0x2c, BIT(18), 0);
> }
>
> static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv)
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> index 7e9072fd0ef0..17a22dd0922a 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> // Copyright 2018 IBM Corporation
> +// Copyright 2019 Raptor Engineering, LLC
>
> #include <linux/clk.h>
> #include <linux/dma-mapping.h>
> @@ -50,7 +51,8 @@
> * is the ARM's internal display controller.
> *
> * The driver only supports a simple configuration consisting of a
> 40MHz
> - * pixel clock, fixed by hardware limitations, and the VGA output
> path.
> + * pixel clock, fixed by hardware limitations. It supports DVO
> output
> + * mode as well based on device tree configuration.
> *
> * The driver was written with the 'AST2500 Software Programming
> Guide' v17,
> * which is available under NDA from ASPEED.
> @@ -95,6 +97,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq,
> void *data)
> static int aspeed_gfx_load(struct drm_device *drm)
> {
> struct platform_device *pdev = to_platform_device(drm->dev);
> + struct device_node *nc = drm->dev->of_node;
> struct aspeed_gfx *priv;
> struct resource *res;
> int ret;
> @@ -145,6 +148,18 @@ static int aspeed_gfx_load(struct drm_device
> *drm)
> }
> clk_prepare_enable(priv->clk);
>
> + if (of_property_read_bool(nc, "output-vga"))
> + priv->output_mode |= OUTPUT_VGA;
> + else if (of_property_read_bool(nc, "output-dvo"))
> + priv->output_mode |= OUTPUT_DVO;
> + else
> + priv->output_mode = OUTPUT_VGA;
> +
> + if (priv->output_mode & OUTPUT_VGA)
> + DRM_INFO("Enabling VGA output\n");
> + if (priv->output_mode & OUTPUT_DVO)
> + DRM_INFO("Enabling DVO output\n");
> +
> /* Sanitize control registers */
> writel(0, priv->base + CRT_CTRL1);
> /* Preserve CRT_CTRL2[7:6] (DVO configuration) */
^ permalink raw reply
* [PATCH 1/7] media: aspeed: fix a kernel warning on clk control
From: Benjamin Herrenschmidt @ 2019-05-08 6:31 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190502191317.29698-2-jae.hyun.yoo@linux.intel.com>
On Thu, 2019-05-02 at 12:13 -0700, Jae Hyun Yoo wrote:
> Video engine clock control functions in the Aspeed video engine
> driver are being called from multiple context without any
> protection so video clocks can be double disabled and eventually
> it causes a kernel warning with stack dump printing out like below:
I already objected to the use of set_bit, clear_bit etc...
Either you are protected by a spinlock, in which case you don't need
them, use either the __ versions (non atomic) or just a bloody bool
flag which is a lot clearer and will generated better code. Or you
aren't protected in which case the code seems racy.
> [ 515.540498] ------------[ cut here ]------------
> [ 515.545174] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:684
> clk_core_unprepare+0x13c/0x170
> [ 515.553806] vclk-gate already unprepared
> [ 515.557841] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
> G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4 #1
> [ 515.568973] Hardware name: Generic DT based system
> [ 515.573777] Backtrace:
> [ 515.576272] [<80107cdc>] (dump_backtrace) from [<80107f10>]
> (show_stack+0x20/0x24)
> [ 515.583930] r7:803a5614 r6:00000009 r5:00000000 r4:9d88fe1c
> [ 515.589712] [<80107ef0>] (show_stack) from [<80690184>]
> (dump_stack+0x20/0x28)
> [ 515.597053] [<80690164>] (dump_stack) from [<80116044>]
> (__warn.part.3+0xb4/0xdc)
> [ 515.604557] [<80115f90>] (__warn.part.3) from [<801160d8>]
> (warn_slowpath_fmt+0x6c/0x90)
> [ 515.612734] r6:000002ac r5:8080befc r4:80a07008
> [ 515.617463] [<80116070>] (warn_slowpath_fmt) from [<803a5614>]
> (clk_core_unprepare+0x13c/0x170)
> [ 515.626167] r3:8080cdf4 r2:8080bfc0
> [ 515.629834] r7:98d682a8 r6:9d8a9200 r5:9e5151a0 r4:97abd620
> [ 515.635530] [<803a54d8>] (clk_core_unprepare) from [<803a76a4>]
> (clk_unprepare+0x34/0x3c)
> [ 515.643812] r5:9e5151a0 r4:97abd620
> [ 515.647529] [<803a7670>] (clk_unprepare) from [<804f36ec>]
> (aspeed_video_off+0x38/0x50)
> [ 515.655539] r5:9e5151a0 r4:9e504000
> [ 515.659242] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
> (aspeed_video_release+0x90/0x114)
> [ 515.668036] r5:9e5044b0 r4:9e504000
> [ 515.671643] [<804f42c8>] (aspeed_video_release) from [<804d302c>]
> (v4l2_release+0xd4/0xe8)
> [ 515.679999] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
> [ 515.685695] [<804d2f58>] (v4l2_release) from [<80236454>]
> (__fput+0x98/0x1c4)
> [ 515.692914] r5:9e51b608 r4:9d8a9200
> [ 515.696597] [<802363bc>] (__fput) from [<802365e8>]
> (____fput+0x18/0x1c)
> [ 515.703315] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
> r5:9d8e35a0 r4:9d8e38dc
> [ 515.711167] [<802365d0>] (____fput) from [<80131ca4>]
> (task_work_run+0x7c/0xa0)
> [ 515.718596] [<80131c28>] (task_work_run) from [<80106884>]
> (do_work_pending+0x4a8/0x578)
> [ 515.726777] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
> [ 515.732466] [<801063dc>] (do_work_pending) from [<8010106c>]
> (slow_work_pending+0xc/0x20)
> [ 515.740727] Exception stack(0x9d88ffb0 to 0x9d88fff8)
> [ 515.745840] ffa0: 00000000
> 76f18094 00000000 00000000
> [ 515.754122] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
> 00000000 48e20fa4 00000000
> [ 515.762386] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
> 00000007
> [ 515.769097] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
> r6:7eda4c20 r5:00176778
> [ 515.777006] r4:00000007
> [ 515.779558] ---[ end trace 12c04aadef8afbbb ]---
> [ 515.784176] ------------[ cut here ]------------
> [ 515.788817] WARNING: CPU: 0 PID: 1310 at drivers/clk/clk.c:825
> clk_core_disable+0x18c/0x204
> [ 515.797161] eclk-gate already disabled
> [ 515.800916] CPU: 0 PID: 1310 Comm: obmc-ikvm Tainted:
> G W 5.0.6-df66fbc97853fbba90a0bfa44de32f3d5f7602b4 #1
> [ 515.811945] Hardware name: Generic DT based system
> [ 515.816730] Backtrace:
> [ 515.819210] [<80107cdc>] (dump_backtrace) from [<80107f10>]
> (show_stack+0x20/0x24)
> [ 515.826782] r7:803a5900 r6:00000009 r5:00000000 r4:9d88fe04
> [ 515.832454] [<80107ef0>] (show_stack) from [<80690184>]
> (dump_stack+0x20/0x28)
> [ 515.839687] [<80690164>] (dump_stack) from [<80116044>]
> (__warn.part.3+0xb4/0xdc)
> [ 515.847170] [<80115f90>] (__warn.part.3) from [<801160d8>]
> (warn_slowpath_fmt+0x6c/0x90)
> [ 515.855247] r6:00000339 r5:8080befc r4:80a07008
> [ 515.859868] [<80116070>] (warn_slowpath_fmt) from [<803a5900>]
> (clk_core_disable+0x18c/0x204)
> [ 515.868385] r3:8080cdd0 r2:8080c00c
> [ 515.871957] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:97abd560
> [ 515.877615] [<803a5774>] (clk_core_disable) from [<803a59a0>]
> (clk_core_disable_lock+0x28/0x34)
> [ 515.886301] r7:98d682a8 r6:9d8a9200 r5:97abd560 r4:a0000013
> [ 515.891960] [<803a5978>] (clk_core_disable_lock) from [<803a7714>]
> (clk_disable+0x2c/0x30)
> [ 515.900216] r5:9e5151a0 r4:9e515f60
> [ 515.903816] [<803a76e8>] (clk_disable) from [<804f36f8>]
> (aspeed_video_off+0x44/0x50)
> [ 515.911656] [<804f36b4>] (aspeed_video_off) from [<804f4358>]
> (aspeed_video_release+0x90/0x114)
> [ 515.920341] r5:9e5044b0 r4:9e504000
> [ 515.923921] [<804f42c8>] (aspeed_video_release) from [<804d302c>]
> (v4l2_release+0xd4/0xe8)
> [ 515.932184] r7:98d682a8 r6:9d087810 r5:9d8a9200 r4:9e504318
> [ 515.937851] [<804d2f58>] (v4l2_release) from [<80236454>]
> (__fput+0x98/0x1c4)
> [ 515.944980] r5:9e51b608 r4:9d8a9200
> [ 515.948559] [<802363bc>] (__fput) from [<802365e8>]
> (____fput+0x18/0x1c)
> [ 515.955257] r9:80a0700c r8:801011e4 r7:00000000 r6:80a64b9c
> r5:9d8e35a0 r4:9d8e38dc
> [ 515.963008] [<802365d0>] (____fput) from [<80131ca4>]
> (task_work_run+0x7c/0xa0)
> [ 515.970333] [<80131c28>] (task_work_run) from [<80106884>]
> (do_work_pending+0x4a8/0x578)
> [ 515.978421] r7:801011e4 r6:80a07008 r5:9d88ffb0 r4:ffffe000
> [ 515.984086] [<801063dc>] (do_work_pending) from [<8010106c>]
> (slow_work_pending+0xc/0x20)
> [ 515.992247] Exception stack(0x9d88ffb0 to 0x9d88fff8)
> [ 515.997296] ffa0: 00000000
> 76f18094 00000000 00000000
> [ 516.005473] ffc0: 00000007 00176778 7eda4c20 00000006 00000000
> 00000000 48e20fa4 00000000
> [ 516.013642] ffe0: 00000002 7eda4b08 00000000 48f91efc 80000010
> 00000007
> [ 516.020257] r10:00000000 r9:9d88e000 r8:801011e4 r7:00000006
> r6:7eda4c20 r5:00176778
> [ 516.028072] r4:00000007
> [ 516.030606] ---[ end trace 12c04aadef8afbbc ]---
>
> To prevent this issue, this commit adds spinlock protection and
> clock status checking logic into the Aspeed video engine driver.
>
> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@linux.intel.com>
> Reviewed-by: Eddie James <eajames@linux.ibm.com>
> ---
> drivers/media/platform/aspeed-video.c | 32 ++++++++++++++++++++++++-
> --
> 1 file changed, 29 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/media/platform/aspeed-video.c
> b/drivers/media/platform/aspeed-video.c
> index 55c55a68b016..2dac6d20b180 100644
> --- a/drivers/media/platform/aspeed-video.c
> +++ b/drivers/media/platform/aspeed-video.c
> @@ -187,6 +187,7 @@ enum {
> VIDEO_STREAMING,
> VIDEO_FRAME_INPRG,
> VIDEO_STOPPED,
> + VIDEO_CLOCKS_ON,
> };
>
> struct aspeed_video_addr {
> @@ -483,19 +484,29 @@ static void
> aspeed_video_enable_mode_detect(struct aspeed_video *video)
>
> static void aspeed_video_off(struct aspeed_video *video)
> {
> + if (!test_bit(VIDEO_CLOCKS_ON, &video->flags))
> + return;
> +
> /* Disable interrupts */
> aspeed_video_write(video, VE_INTERRUPT_CTRL, 0);
>
> /* Turn off the relevant clocks */
> clk_disable_unprepare(video->vclk);
> clk_disable_unprepare(video->eclk);
> +
> + clear_bit(VIDEO_CLOCKS_ON, &video->flags);
> }
>
> static void aspeed_video_on(struct aspeed_video *video)
> {
> + if (test_bit(VIDEO_CLOCKS_ON, &video->flags))
> + return;
> +
> /* Turn on the relevant clocks */
> clk_prepare_enable(video->eclk);
> clk_prepare_enable(video->vclk);
> +
> + set_bit(VIDEO_CLOCKS_ON, &video->flags);
> }
>
> static void aspeed_video_bufs_done(struct aspeed_video *video,
> @@ -513,12 +524,14 @@ static void aspeed_video_bufs_done(struct
> aspeed_video *video,
>
> static void aspeed_video_irq_res_change(struct aspeed_video *video)
> {
> + spin_lock(&video->lock);
> dev_dbg(video->dev, "Resolution changed; resetting\n");
>
> set_bit(VIDEO_RES_CHANGE, &video->flags);
> clear_bit(VIDEO_FRAME_INPRG, &video->flags);
>
> aspeed_video_off(video);
> + spin_unlock(&video->lock);
> aspeed_video_bufs_done(video, VB2_BUF_STATE_ERROR);
>
> schedule_delayed_work(&video->res_work,
> RESOLUTION_CHANGE_DELAY);
> @@ -938,9 +951,13 @@ static void aspeed_video_init_regs(struct
> aspeed_video *video)
>
> static void aspeed_video_start(struct aspeed_video *video)
> {
> + unsigned long flags;
> +
> + spin_lock_irqsave(&video->lock, flags);
> aspeed_video_on(video);
>
> aspeed_video_init_regs(video);
> + spin_unlock_irqrestore(&video->lock, flags);
>
> /* Resolution set to 640x480 if no signal found */
> aspeed_video_get_resolution(video);
> @@ -956,6 +973,9 @@ static void aspeed_video_start(struct
> aspeed_video *video)
>
> static void aspeed_video_stop(struct aspeed_video *video)
> {
> + unsigned long flags;
> +
> + spin_lock_irqsave(&video->lock, flags);
> set_bit(VIDEO_STOPPED, &video->flags);
> cancel_delayed_work_sync(&video->res_work);
>
> @@ -969,6 +989,7 @@ static void aspeed_video_stop(struct aspeed_video
> *video)
>
> video->v4l2_input_status = V4L2_IN_ST_NO_SIGNAL;
> video->flags = 0;
> + spin_unlock_irqrestore(&video->lock, flags);
> }
>
> static int aspeed_video_querycap(struct file *file, void *fh,
> @@ -1306,16 +1327,21 @@ static void
> aspeed_video_resolution_work(struct work_struct *work)
> struct delayed_work *dwork = to_delayed_work(work);
> struct aspeed_video *video = container_of(dwork, struct
> aspeed_video,
> res_work);
> - u32 input_status = video->v4l2_input_status;
> + unsigned long flags;
> + u32 input_status;
>
> + spin_lock_irqsave(&video->lock, flags);
> + input_status = video->v4l2_input_status;
> aspeed_video_on(video);
>
> /* Exit early in case no clients remain */
> - if (test_bit(VIDEO_STOPPED, &video->flags))
> + if (test_bit(VIDEO_STOPPED, &video->flags)) {
> + spin_unlock_irqrestore(&video->lock, flags);
> goto done;
> + }
>
> aspeed_video_init_regs(video);
> -
> + spin_unlock_irqrestore(&video->lock, flags);
> aspeed_video_get_resolution(video);
>
> if (video->detected_timings.width != video-
> >active_timings.width ||
^ permalink raw reply
* [PATCH dev-5.0 v4] ARM: dts: aspeed: Add Swift BMC machine
From: Brandon Wyman @ 2019-05-06 21:17 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1557175754-18515-1-git-send-email-anoo@linux.ibm.com>
On Mon, May 6, 2019 at 3:49 PM Adriana Kobylak <anoo@linux.ibm.com> wrote:
>
> From: Adriana Kobylak <anoo@us.ibm.com>
>
> The Swift BMC is an ASPEED ast2500 based BMC that is part of
> a Power9 server. This adds the device tree description for
> most upstream components.
>
> Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 824 +++++++++++++++++++++++++++++
> 2 files changed, 825 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index c01a7b1..93f0730 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1245,6 +1245,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-palmetto.dtb \
> aspeed-bmc-opp-romulus.dtb \
> + aspeed-bmc-opp-swift.dtb \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> new file mode 100644
> index 0000000..9610637
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> @@ -0,0 +1,824 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/dts-v1/;
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/leds/leds-pca955x.h>
> +
> +/ {
> + model = "Swift BMC";
> + compatible = "ibm,swift-bmc", "aspeed,ast2500";
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory at 80000000 {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region at 98000000 {
> + no-map;
> + reg = <0x98000000 0x04000000>; /* 64M */
> + };
> +
> + gfx_memory: framebuffer {
> + size = <0x01000000>;
> + alignment = <0x01000000>;
> + compatible = "shared-dma-pool";
> + reusable;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + air-water {
> + label = "air-water";
> + gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(B, 5)>;
> + };
> +
> + checkstop {
> + label = "checkstop";
> + gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(J, 2)>;
> + };
> +
> + ps0-presence {
> + label = "ps0-presence";
> + gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(R, 7)>;
> + };
> +
> + ps1-presence {
> + label = "ps1-presence";
> + gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(N, 0)>;
> + };
> +
> + oppanel-presence {
> + label = "oppanel-presence";
> + gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(A, 7)>;
> + };
> +
> + opencapi-riser-presence {
> + label = "opencapi-riser-presence";
> + gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(I, 0)>;
> + };
> + };
> +
> + iio-hwmon-battery {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 12>;
> + };
> +
> + gpio-keys-polled {
> + compatible = "gpio-keys-polled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + poll-interval = <1000>;
> +
> + scm0-presence {
> + label = "scm0-presence";
> + gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
> + linux,code = <6>;
> + };
> +
> + scm1-presence {
> + label = "scm1-presence";
> + gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
> + linux,code = <7>;
> + };
> +
> + cpu0vrm-presence {
> + label = "cpu0vrm-presence";
> + gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
> + linux,code = <12>;
> + };
> +
> + cpu1vrm-presence {
> + label = "cpu1vrm-presence";
> + gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
> + linux,code = <13>;
> + };
> +
> + fan0-presence {
> + label = "fan0-presence";
> + gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
> + linux,code = <5>;
> + };
> +
> + fan1-presence {
> + label = "fan1-presence";
> + gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
> + linux,code = <6>;
> + };
> +
> + fan2-presence {
> + label = "fan2-presence";
> + gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
> + linux,code = <7>;
> + };
> +
> + fan3-presence {
> + label = "fan3-presence";
> + gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
> + linux,code = <8>;
> + };
> +
> + fanboost-presence {
> + label = "fanboost-presence";
> + gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
> + linux,code = <9>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + fan0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + fanboost {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-fault {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-power {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-id {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-fault {
> + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-id {
> + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + fsi: gpio-fsi {
> + compatible = "fsi-master-gpio", "fsi-master";
> + #address-cells = <2>;
> + #size-cells = <0>;
> + no-gpio-delays;
> +
> + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
> + data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
> + mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
> + enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
> + trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
> + };
> +
> + iio-hwmon-dps310 {
> + compatible = "iio-hwmon";
> + io-channels = <&dps 0>;
> + };
> +
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + flash at 0 {
> + status = "okay";
> + label = "bmc";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + partitions {
> + #address-cells = < 1 >;
> + #size-cells = < 1 >;
> + compatible = "fixed-partitions";
> + u-boot at 0 {
> + reg = < 0 0x60000 >;
> + label = "u-boot";
> + };
> + u-boot-env at 60000 {
> + reg = < 0x60000 0x20000 >;
> + label = "u-boot-env";
> + };
> + obmc-ubi at 80000 {
> + reg = < 0x80000 0x7F80000>;
> + label = "obmc-ubi";
> + };
> + };
> + };
> +
> + flash at 1 {
> + status = "okay";
> + label = "alt-bmc";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + partitions {
> + #address-cells = < 1 >;
> + #size-cells = < 1 >;
> + compatible = "fixed-partitions";
> + u-boot at 0 {
> + reg = < 0 0x60000 >;
> + label = "alt-u-boot";
> + };
> + u-boot-env at 60000 {
> + reg = < 0x60000 0x20000 >;
> + label = "alt-u-boot-env";
> + };
> + obmc-ubi at 80000 {
> + reg = < 0x80000 0x7F80000>;
> + label = "alt-obmc-ubi";
> + };
> + };
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default>;
> +
> + flash at 0 {
> + status = "okay";
> + label = "pnor";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + };
> +};
> +
> +&uart1 {
> + /* Rear RS-232 connector */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd1_default
> + &pinctrl_rxd1_default
> + &pinctrl_nrts1_default
> + &pinctrl_ndtr1_default
> + &pinctrl_ndsr1_default
> + &pinctrl_ncts1_default
> + &pinctrl_ndcd1_default
> + &pinctrl_nri1_default>;
> +};
> +
> +&uart2 {
> + /* APSS */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&mbox {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&i2c2 {
> + status = "okay";
> +
> + /* MUX ->
> + * Samtec 1
> + * Samtec 2
> + */
> +};
> +
> +&i2c3 {
> + status = "okay";
> +
> + max31785 at 52 {
> + compatible = "maxim,max31785a";
> + reg = <0x52>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fan at 0 {
> + compatible = "pmbus-fan";
> + reg = <0>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 1 {
> + compatible = "pmbus-fan";
> + reg = <1>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 2 {
> + compatible = "pmbus-fan";
> + reg = <2>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 3 {
> + compatible = "pmbus-fan";
> + reg = <3>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 4 {
> + compatible = "pmbus-fan";
> + reg = <4>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> + };
> +
> + pca0: pca9552 at 60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + power-supply at 68 {
> + compatible = "ibm,cffps1";
> + reg = <0x68>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + power-supply at 69 {
> + compatible = "ibm,cffps1";
> + reg = <0x69>;
> + };
> +
> + eeprom at 51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + dps: dps310 at 76 {
> + compatible = "infineon,dps310";
> + reg = <0x76>;
> + #io-channel-cells = <0>;
> + };
> +
> + tmp275 at 48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + si7021a20 at 20 {
> + compatible = "si,si7021a20";
> + reg = <0x20>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + pca1: pca9551 at 60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + pca9552: pca9552 at 60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
> + "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
> + "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
> + "P9_SCM0_PRES", "P9_SCM1_PRES",
> + "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
> + "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
> + "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
> + "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + rtc at 32 {
> + compatible = "epson,rx8900";
> + reg = <0x32>;
> + };
> +
> + eeprom at 51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +
> + ucd90160 at 64 {
> + compatible = "ti,ucd90160";
> + reg = <0x64>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + tmp423a at 4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + ir35221 at 71 {
> + compatible = "infineon,ir35221";
> + reg = <0x71>;
> + };
> +
> + ir35221 at 72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +};
> +
> +&i2c10 {
> + status = "okay";
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + tmp423a at 4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + ir35221 at 71 {
> + compatible = "infineon,ir35221";
> + reg = <0x71>;
> + };
> +
> + ir35221 at 72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +};
> +
> +&i2c11 {
> + /* MUX
> + * -> PCIe Slot 0
> + * -> PCIe Slot 1
> + * -> PCIe Slot 2
> + * -> PCIe Slot 3
> + */
> + status = "okay";
> +};
> +
> +&i2c12 {
> + status = "okay";
> +
> + tmp275 at 48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275 at 4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c13 {
> + status = "okay";
> +};
> +
> +&vuart {
> + status = "okay";
> +};
> +
> +&gfx {
> + status = "okay";
> + memory-region = <&gfx_memory>;
> +};
> +
> +&pinctrl {
> + aspeed,external-nodes = <&gfx &lhc>;
> +};
> +
> +&wdt1 {
> + aspeed,reset-type = "none";
> + aspeed,external-signal;
> + aspeed,ext-push-pull;
> + aspeed,ext-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdtrst1_default>;
> +};
> +
> +&wdt2 {
> + aspeed,alt-boot;
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&adc {
> + status = "okay";
> +};
> +
> +#include "ibm-power9-dual.dtsi"
> --
> 1.8.3.1
>
Reviewed-by: Brandon Wyman <bjwyman@gmail.com>
^ permalink raw reply
* [PATCH dev-5.0 v4] ARM: dts: aspeed: Add Swift BMC machine
From: Adriana Kobylak @ 2019-05-06 20:49 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <CAK_vbW2X1DLqBi4EbPH9Cw0FM3o1P2SRguKVkkK47UYPCyxJdQ@mail.gmail.com>
From: Adriana Kobylak <anoo@us.ibm.com>
The Swift BMC is an ASPEED ast2500 based BMC that is part of
a Power9 server. This adds the device tree description for
most upstream components.
Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
---
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 824 +++++++++++++++++++++++++++++
2 files changed, 825 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index c01a7b1..93f0730 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1245,6 +1245,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
+ aspeed-bmc-opp-swift.dtb \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
new file mode 100644
index 0000000..9610637
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
@@ -0,0 +1,824 @@
+// SPDX-License-Identifier: GPL-2.0+
+/dts-v1/;
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+#include <dt-bindings/leds/leds-pca955x.h>
+
+/ {
+ model = "Swift BMC";
+ compatible = "ibm,swift-bmc", "aspeed,ast2500";
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=ttyS4,115200 earlyprintk";
+ };
+
+ memory at 80000000 {
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ flash_memory: region at 98000000 {
+ no-map;
+ reg = <0x98000000 0x04000000>; /* 64M */
+ };
+
+ gfx_memory: framebuffer {
+ size = <0x01000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+ gpio-keys {
+ compatible = "gpio-keys";
+
+ air-water {
+ label = "air-water";
+ gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(B, 5)>;
+ };
+
+ checkstop {
+ label = "checkstop";
+ gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(J, 2)>;
+ };
+
+ ps0-presence {
+ label = "ps0-presence";
+ gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(R, 7)>;
+ };
+
+ ps1-presence {
+ label = "ps1-presence";
+ gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(N, 0)>;
+ };
+
+ oppanel-presence {
+ label = "oppanel-presence";
+ gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(A, 7)>;
+ };
+
+ opencapi-riser-presence {
+ label = "opencapi-riser-presence";
+ gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
+ linux,code = <ASPEED_GPIO(I, 0)>;
+ };
+ };
+
+ iio-hwmon-battery {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 12>;
+ };
+
+ gpio-keys-polled {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <1000>;
+
+ scm0-presence {
+ label = "scm0-presence";
+ gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
+ linux,code = <6>;
+ };
+
+ scm1-presence {
+ label = "scm1-presence";
+ gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
+ linux,code = <7>;
+ };
+
+ cpu0vrm-presence {
+ label = "cpu0vrm-presence";
+ gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
+ linux,code = <12>;
+ };
+
+ cpu1vrm-presence {
+ label = "cpu1vrm-presence";
+ gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
+ linux,code = <13>;
+ };
+
+ fan0-presence {
+ label = "fan0-presence";
+ gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
+ linux,code = <5>;
+ };
+
+ fan1-presence {
+ label = "fan1-presence";
+ gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
+ linux,code = <6>;
+ };
+
+ fan2-presence {
+ label = "fan2-presence";
+ gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
+ linux,code = <7>;
+ };
+
+ fan3-presence {
+ label = "fan3-presence";
+ gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
+ linux,code = <8>;
+ };
+
+ fanboost-presence {
+ label = "fanboost-presence";
+ gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
+ linux,code = <9>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ fan0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ fan1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
+ };
+
+ fan2 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ fan3 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ fanboost {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
+ };
+
+ front-fault {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
+ };
+
+ front-power {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
+ };
+
+ front-id {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
+ };
+
+ rear-fault {
+ gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ rear-id {
+ gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ fsi: gpio-fsi {
+ compatible = "fsi-master-gpio", "fsi-master";
+ #address-cells = <2>;
+ #size-cells = <0>;
+ no-gpio-delays;
+
+ clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
+ data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
+ mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
+ enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
+ trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
+ };
+
+ iio-hwmon-dps310 {
+ compatible = "iio-hwmon";
+ io-channels = <&dps 0>;
+ };
+
+};
+
+&fmc {
+ status = "okay";
+
+ flash at 0 {
+ status = "okay";
+ label = "bmc";
+ m25p,fast-read;
+ spi-max-frequency = <100000000>;
+ partitions {
+ #address-cells = < 1 >;
+ #size-cells = < 1 >;
+ compatible = "fixed-partitions";
+ u-boot at 0 {
+ reg = < 0 0x60000 >;
+ label = "u-boot";
+ };
+ u-boot-env at 60000 {
+ reg = < 0x60000 0x20000 >;
+ label = "u-boot-env";
+ };
+ obmc-ubi at 80000 {
+ reg = < 0x80000 0x7F80000>;
+ label = "obmc-ubi";
+ };
+ };
+ };
+
+ flash at 1 {
+ status = "okay";
+ label = "alt-bmc";
+ m25p,fast-read;
+ spi-max-frequency = <100000000>;
+ partitions {
+ #address-cells = < 1 >;
+ #size-cells = < 1 >;
+ compatible = "fixed-partitions";
+ u-boot at 0 {
+ reg = < 0 0x60000 >;
+ label = "alt-u-boot";
+ };
+ u-boot-env at 60000 {
+ reg = < 0x60000 0x20000 >;
+ label = "alt-u-boot-env";
+ };
+ obmc-ubi at 80000 {
+ reg = < 0x80000 0x7F80000>;
+ label = "alt-obmc-ubi";
+ };
+ };
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_spi1_default>;
+
+ flash at 0 {
+ status = "okay";
+ label = "pnor";
+ m25p,fast-read;
+ spi-max-frequency = <100000000>;
+ };
+};
+
+&uart1 {
+ /* Rear RS-232 connector */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default
+ &pinctrl_nrts1_default
+ &pinctrl_ndtr1_default
+ &pinctrl_ndsr1_default
+ &pinctrl_ncts1_default
+ &pinctrl_ndcd1_default
+ &pinctrl_nri1_default>;
+};
+
+&uart2 {
+ /* APSS */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&lpc_ctrl {
+ status = "okay";
+ memory-region = <&flash_memory>;
+ flash = <&spi1>;
+};
+
+&mbox {
+ status = "okay";
+};
+
+&mac0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ use-ncsi;
+};
+
+&i2c2 {
+ status = "okay";
+
+ /* MUX ->
+ * Samtec 1
+ * Samtec 2
+ */
+};
+
+&i2c3 {
+ status = "okay";
+
+ max31785 at 52 {
+ compatible = "maxim,max31785a";
+ reg = <0x52>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ fan at 0 {
+ compatible = "pmbus-fan";
+ reg = <0>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan at 1 {
+ compatible = "pmbus-fan";
+ reg = <1>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan at 2 {
+ compatible = "pmbus-fan";
+ reg = <2>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan at 3 {
+ compatible = "pmbus-fan";
+ reg = <3>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+
+ fan at 4 {
+ compatible = "pmbus-fan";
+ reg = <4>;
+ tach-pulses = <2>;
+ maxim,fan-rotor-input = "tach";
+ maxim,fan-pwm-freq = <25000>;
+ maxim,fan-no-watchdog;
+ maxim,fan-no-fault-ramp;
+ maxim,fan-ramp = <2>;
+ maxim,fan-fault-pin-mon;
+ };
+ };
+
+ pca0: pca9552 at 60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio at 0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ power-supply at 68 {
+ compatible = "ibm,cffps1";
+ reg = <0x68>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ power-supply at 69 {
+ compatible = "ibm,cffps1";
+ reg = <0x69>;
+ };
+
+ eeprom at 51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ };
+};
+
+&i2c7 {
+ status = "okay";
+
+ dps: dps310 at 76 {
+ compatible = "infineon,dps310";
+ reg = <0x76>;
+ #io-channel-cells = <0>;
+ };
+
+ tmp275 at 48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ si7021a20 at 20 {
+ compatible = "si,si7021a20";
+ reg = <0x20>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ pca1: pca9551 at 60 {
+ compatible = "nxp,pca9551";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio at 0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+};
+
+&i2c8 {
+ status = "okay";
+
+ pca9552: pca9552 at 60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
+ "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
+ "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
+ "P9_SCM0_PRES", "P9_SCM1_PRES",
+ "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
+ "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
+ "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
+ "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
+
+ gpio at 0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio at 15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ rtc at 32 {
+ compatible = "epson,rx8900";
+ reg = <0x32>;
+ };
+
+ eeprom at 51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ };
+
+ ucd90160 at 64 {
+ compatible = "ti,ucd90160";
+ reg = <0x64>;
+ };
+};
+
+&i2c9 {
+ status = "okay";
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ tmp423a at 4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+
+ ir35221 at 71 {
+ compatible = "infineon,ir35221";
+ reg = <0x71>;
+ };
+
+ ir35221 at 72 {
+ compatible = "infineon,ir35221";
+ reg = <0x72>;
+ };
+};
+
+&i2c10 {
+ status = "okay";
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ tmp423a at 4c {
+ compatible = "ti,tmp423";
+ reg = <0x4c>;
+ };
+
+ ir35221 at 71 {
+ compatible = "infineon,ir35221";
+ reg = <0x71>;
+ };
+
+ ir35221 at 72 {
+ compatible = "infineon,ir35221";
+ reg = <0x72>;
+ };
+};
+
+&i2c11 {
+ /* MUX
+ * -> PCIe Slot 0
+ * -> PCIe Slot 1
+ * -> PCIe Slot 2
+ * -> PCIe Slot 3
+ */
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+
+ tmp275 at 48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275 at 4a {
+ compatible = "ti,tmp275";
+ reg = <0x4a>;
+ };
+};
+
+&i2c13 {
+ status = "okay";
+};
+
+&vuart {
+ status = "okay";
+};
+
+&gfx {
+ status = "okay";
+ memory-region = <&gfx_memory>;
+};
+
+&pinctrl {
+ aspeed,external-nodes = <&gfx &lhc>;
+};
+
+&wdt1 {
+ aspeed,reset-type = "none";
+ aspeed,external-signal;
+ aspeed,ext-push-pull;
+ aspeed,ext-active-high;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_wdtrst1_default>;
+};
+
+&wdt2 {
+ aspeed,alt-boot;
+};
+
+&ibt {
+ status = "okay";
+};
+
+&adc {
+ status = "okay";
+};
+
+#include "ibm-power9-dual.dtsi"
--
1.8.3.1
^ permalink raw reply related
* [PATCH dev-5.0 v3] ARM: dts: aspeed: Add Swift BMC machine
From: Adriana Kobylak @ 2019-05-06 20:40 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <CAK_vbW2X1DLqBi4EbPH9Cw0FM3o1P2SRguKVkkK47UYPCyxJdQ@mail.gmail.com>
>> +
>> + rear-power {
>> + gpios = <&gpio ASPEED_GPIO(N, 3)
>> GPIO_ACTIVE_LOW>;
>> + };
>
> Are you sure about this one? I see GPION3 as a no connect.
>
You're right, this has been removed in the latest version of the
schematics. Will remove it.
^ permalink raw reply
* [PATCH dev-5.0 v3] ARM: dts: aspeed: Add Swift BMC machine
From: Brandon Wyman @ 2019-05-06 19:38 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1556572128-20917-1-git-send-email-anoo@linux.ibm.com>
On Mon, Apr 29, 2019 at 4:09 PM Adriana Kobylak <anoo@linux.ibm.com> wrote:
>
> From: Adriana Kobylak <anoo@us.ibm.com>
>
> The Swift BMC is an ASPEED ast2500 based BMC that is part of
> a Power9 server. This adds the device tree description for
> most upstream components.
>
> Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 828 +++++++++++++++++++++++++++++
> 2 files changed, 829 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bd40148..b82a24d 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1244,6 +1244,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-palmetto.dtb \
> aspeed-bmc-opp-romulus.dtb \
> + aspeed-bmc-opp-swift.dtb \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> new file mode 100644
> index 0000000..8d44e3c
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> @@ -0,0 +1,828 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/dts-v1/;
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/leds/leds-pca955x.h>
> +
> +/ {
> + model = "Swift BMC";
> + compatible = "ibm,swift-bmc", "aspeed,ast2500";
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory at 80000000 {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region at 98000000 {
> + no-map;
> + reg = <0x98000000 0x04000000>; /* 64M */
> + };
> +
> + gfx_memory: framebuffer {
> + size = <0x01000000>;
> + alignment = <0x01000000>;
> + compatible = "shared-dma-pool";
> + reusable;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + air-water {
> + label = "air-water";
> + gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(B, 5)>;
> + };
> +
> + checkstop {
> + label = "checkstop";
> + gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(J, 2)>;
> + };
> +
> + ps0-presence {
> + label = "ps0-presence";
> + gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(R, 7)>;
> + };
> +
> + ps1-presence {
> + label = "ps1-presence";
> + gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(N, 0)>;
> + };
> +
> + oppanel-presence {
> + label = "oppanel-presence";
> + gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(A, 7)>;
> + };
> +
> + opencapi-riser-presence {
> + label = "opencapi-riser-presence";
> + gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(I, 0)>;
> + };
> + };
> +
> + iio-hwmon-battery {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 12>;
> + };
> +
> + gpio-keys-polled {
> + compatible = "gpio-keys-polled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + poll-interval = <1000>;
> +
> + scm0-presence {
> + label = "scm0-presence";
> + gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
> + linux,code = <6>;
> + };
> +
> + scm1-presence {
> + label = "scm1-presence";
> + gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
> + linux,code = <7>;
> + };
> +
> + cpu0vrm-presence {
> + label = "cpu0vrm-presence";
> + gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
> + linux,code = <12>;
> + };
> +
> + cpu1vrm-presence {
> + label = "cpu1vrm-presence";
> + gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
> + linux,code = <13>;
> + };
> +
> + fan0-presence {
> + label = "fan0-presence";
> + gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
> + linux,code = <5>;
> + };
> +
> + fan1-presence {
> + label = "fan1-presence";
> + gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
> + linux,code = <6>;
> + };
> +
> + fan2-presence {
> + label = "fan2-presence";
> + gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
> + linux,code = <7>;
> + };
> +
> + fan3-presence {
> + label = "fan3-presence";
> + gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
> + linux,code = <8>;
> + };
> +
> + fanboost-presence {
> + label = "fanboost-presence";
> + gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
> + linux,code = <9>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + fan0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + fanboost {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-fault {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-power {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-id {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-fault {
> + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-id {
> + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-power {
> + gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
> + };
Are you sure about this one? I see GPION3 as a no connect.
> + };
> +
> + fsi: gpio-fsi {
> + compatible = "fsi-master-gpio", "fsi-master";
> + #address-cells = <2>;
> + #size-cells = <0>;
> + no-gpio-delays;
> +
> + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
> + data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
> + mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
> + enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
> + trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
> + };
> +
> + iio-hwmon-dps310 {
> + compatible = "iio-hwmon";
> + io-channels = <&dps 0>;
> + };
> +
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + flash at 0 {
> + status = "okay";
> + label = "bmc";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + partitions {
> + #address-cells = < 1 >;
> + #size-cells = < 1 >;
> + compatible = "fixed-partitions";
> + u-boot at 0 {
> + reg = < 0 0x60000 >;
> + label = "u-boot";
> + };
> + u-boot-env at 60000 {
> + reg = < 0x60000 0x20000 >;
> + label = "u-boot-env";
> + };
> + obmc-ubi at 80000 {
> + reg = < 0x80000 0x7F80000>;
> + label = "obmc-ubi";
> + };
> + };
> + };
> +
> + flash at 1 {
> + status = "okay";
> + label = "alt-bmc";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + partitions {
> + #address-cells = < 1 >;
> + #size-cells = < 1 >;
> + compatible = "fixed-partitions";
> + u-boot at 0 {
> + reg = < 0 0x60000 >;
> + label = "alt-u-boot";
> + };
> + u-boot-env at 60000 {
> + reg = < 0x60000 0x20000 >;
> + label = "alt-u-boot-env";
> + };
> + obmc-ubi at 80000 {
> + reg = < 0x80000 0x7F80000>;
> + label = "alt-obmc-ubi";
> + };
> + };
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default>;
> +
> + flash at 0 {
> + status = "okay";
> + label = "pnor";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + };
> +};
> +
> +&uart1 {
> + /* Rear RS-232 connector */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd1_default
> + &pinctrl_rxd1_default
> + &pinctrl_nrts1_default
> + &pinctrl_ndtr1_default
> + &pinctrl_ndsr1_default
> + &pinctrl_ncts1_default
> + &pinctrl_ndcd1_default
> + &pinctrl_nri1_default>;
> +};
> +
> +&uart2 {
> + /* APSS */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&mbox {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&i2c2 {
> + status = "okay";
> +
> + /* MUX ->
> + * Samtec 1
> + * Samtec 2
> + */
> +};
> +
> +&i2c3 {
> + status = "okay";
> +
> + max31785 at 52 {
> + compatible = "maxim,max31785a";
> + reg = <0x52>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fan at 0 {
> + compatible = "pmbus-fan";
> + reg = <0>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 1 {
> + compatible = "pmbus-fan";
> + reg = <1>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 2 {
> + compatible = "pmbus-fan";
> + reg = <2>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 3 {
> + compatible = "pmbus-fan";
> + reg = <3>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 4 {
> + compatible = "pmbus-fan";
> + reg = <4>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> + };
> +
> + pca0: pca9552 at 60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + power-supply at 68 {
> + compatible = "ibm,cffps1";
> + reg = <0x68>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + power-supply at 69 {
> + compatible = "ibm,cffps1";
> + reg = <0x69>;
> + };
> +
> + eeprom at 51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + dps: dps310 at 76 {
> + compatible = "infineon,dps310";
> + reg = <0x76>;
> + #io-channel-cells = <0>;
> + };
> +
> + tmp275 at 48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + si7021a20 at 20 {
> + compatible = "si,si7021a20";
> + reg = <0x20>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + pca1: pca9551 at 60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + pca9552: pca9552 at 60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
> + "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
> + "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
> + "P9_SCM0_PRES", "P9_SCM1_PRES",
> + "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
> + "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
> + "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
> + "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + rtc at 32 {
> + compatible = "epson,rx8900";
> + reg = <0x32>;
> + };
> +
> + eeprom at 51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +
> + ucd90160 at 64 {
> + compatible = "ti,ucd90160";
> + reg = <0x64>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + tmp423a at 4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + ir35221 at 71 {
> + compatible = "infineon,ir35221";
> + reg = <0x71>;
> + };
> +
> + ir35221 at 72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +};
> +
> +&i2c10 {
> + status = "okay";
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + tmp423a at 4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + ir35221 at 71 {
> + compatible = "infineon,ir35221";
> + reg = <0x71>;
> + };
> +
> + ir35221 at 72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +};
> +
> +&i2c11 {
> + /* MUX
> + * -> PCIe Slot 0
> + * -> PCIe Slot 1
> + * -> PCIe Slot 2
> + * -> PCIe Slot 3
> + */
> + status = "okay";
> +};
> +
> +&i2c12 {
> + status = "okay";
> +
> + tmp275 at 48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275 at 4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c13 {
> + status = "okay";
> +};
> +
> +&vuart {
> + status = "okay";
> +};
> +
> +&gfx {
> + status = "okay";
> + memory-region = <&gfx_memory>;
> +};
> +
> +&pinctrl {
> + aspeed,external-nodes = <&gfx &lhc>;
> +};
> +
> +&wdt1 {
> + aspeed,reset-type = "none";
> + aspeed,external-signal;
> + aspeed,ext-push-pull;
> + aspeed,ext-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdtrst1_default>;
> +};
> +
> +&wdt2 {
> + aspeed,alt-boot;
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&adc {
> + status = "okay";
> +};
> +
> +#include "ibm-power9-dual.dtsi"
> --
> 1.8.3.1
>
^ permalink raw reply
* [PATCH v2] misc: aspeed-lpc-ctrl: Correct return values
From: Vijay Khemka @ 2019-05-06 18:04 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <76491a70-01ca-4308-a09e-4f223ac49ebd@www.fastmail.com>
?On 5/5/19, 9:24 PM, "Andrew Jeffery" <andrew@aj.id.au> wrote:
On Sat, 4 May 2019, at 03:43, Vijay Khemka wrote:
> Corrected some of return values with appropriate meanings and reported
> relevant messages as debug information.
>
> Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Thanks for the fixes, this looks okay now. However, was there a reason for
not squashing change into your previous patch that introduced the issues
this fixes? That hasn't been applied yet either as far as I'm aware. I'd prefer
we do that and submit a single, good patch if we can.
First patch has already been applied to LF openbmc kernel and being used by many
people so I wanted to keep this clean.
Andrew
> ---
> drivers/misc/aspeed-lpc-ctrl.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/misc/aspeed-lpc-ctrl.c
> b/drivers/misc/aspeed-lpc-ctrl.c
> index 332210e06e98..aca13779764a 100644
> --- a/drivers/misc/aspeed-lpc-ctrl.c
> +++ b/drivers/misc/aspeed-lpc-ctrl.c
> @@ -93,8 +93,8 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file,
> unsigned int cmd,
>
> /* If memory-region is not described in device tree */
> if (!lpc_ctrl->mem_size) {
> - dev_err(dev, "Didn't find reserved memory\n");
> - return -EINVAL;
> + dev_dbg(dev, "Didn't find reserved memory\n");
> + return -ENXIO;
> }
>
> map.size = lpc_ctrl->mem_size;
> @@ -134,16 +134,16 @@ static long aspeed_lpc_ctrl_ioctl(struct file
> *file, unsigned int cmd,
>
> if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
> if (!lpc_ctrl->pnor_size) {
> - dev_err(dev, "Didn't find host pnor flash\n");
> - return -EINVAL;
> + dev_dbg(dev, "Didn't find host pnor flash\n");
> + return -ENXIO;
> }
> addr = lpc_ctrl->pnor_base;
> size = lpc_ctrl->pnor_size;
> } else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
> /* If memory-region is not described in device tree */
> if (!lpc_ctrl->mem_size) {
> - dev_err(dev, "Didn't find reserved memory\n");
> - return -EINVAL;
> + dev_dbg(dev, "Didn't find reserved memory\n");
> + return -ENXIO;
> }
> addr = lpc_ctrl->mem_base;
> size = lpc_ctrl->mem_size;
> @@ -239,7 +239,7 @@ static int aspeed_lpc_ctrl_probe(struct
> platform_device *pdev)
> of_node_put(node);
> if (rc) {
> dev_err(dev, "Couldn't address to resource for reserved memory\n");
> - return -ENOMEM;
> + return -ENXIO;
> }
>
> lpc_ctrl->mem_size = resource_size(&resm);
> --
> 2.17.1
>
>
^ permalink raw reply
* [PATCH v6] ARM: dts: aspeed: Adding Lenovo Hr630 BMC
From: Patrick Venture @ 2019-05-06 14:38 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <00dfd048-d8f7-4f33-941d-ab5f2c507aae@www.fastmail.com>
On Sun, May 5, 2019 at 8:17 PM Andrew Jeffery <andrew@aj.id.au> wrote:
>
>
>
> On Sun, 5 May 2019, at 15:38, Andrew Peng wrote:
> > Initial introduction of Lenovo Hr630 family equipped with
> > Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> > with a ASPEED ast2500 BMC manufactured by Lenovo.
> > Specifically, This adds the Hr630 platform device tree file
> > used by the Hr630 BMC machines.
> >
> > This also adds an entry of Hr630 device tree file in Makefile
> >
> > Signed-off-by: Andrew Peng <pengms1@lenovo.com>
> > Signed-off-by: Yonghui Liu <liuyh21@lenovo.com>
> > Signed-off-by: Lisa Liu <liuyj19@lenovo.com>
>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Patrick Venture <venture@google.com>
>
> > ---
> > Changes in v6:
> > - add appropriate pinctrl property for uar1, uart2, uart3 and adc.
> > - remove vhub definition and comment.
> > - remove some GPIO definitions.
> > - revise Makefile according to sort alphabetically.
> > Changes in v5:
> > - revise pca9545 and pca9546 switch aliases name.
> > Changes in v4:
> > - add pca9546 switch aliases name.
> > Changes in v3:
> > - revise i2c switch aliases name.
> > Changes in v2:
> > - add i2c switch aliases name.
> > - remove the unused eeprom device from DT file.
> > - remove "Licensed under..." sentence.
> >
> > arch/arm/boot/dts/Makefile | 1 +
> > arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts | 566 ++++++++++++++++++++++++++
> > 2 files changed, 567 insertions(+)
> > create mode 100644 arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> >
> > diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> > index f4f5aea..1276167 100644
> > --- a/arch/arm/boot/dts/Makefile
> > +++ b/arch/arm/boot/dts/Makefile
> > @@ -1255,6 +1255,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> > aspeed-bmc-facebook-cmm.dtb \
> > aspeed-bmc-facebook-tiogapass.dtb \
> > aspeed-bmc-intel-s2600wf.dtb \
> > + aspeed-bmc-lenovo-hr630.dtb \
> > aspeed-bmc-opp-lanyang.dtb \
> > aspeed-bmc-opp-palmetto.dtb \
> > aspeed-bmc-opp-romulus.dtb \
> > diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> > b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> > new file mode 100644
> > index 0000000..d3695a3
> > --- /dev/null
> > +++ b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> > @@ -0,0 +1,566 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Device Tree file for Lenovo Hr630 platform
> > + *
> > + * Copyright (C) 2019-present Lenovo
> > + */
> > +
> > +/dts-v1/;
> > +
> > +#include "aspeed-g5.dtsi"
> > +#include <dt-bindings/gpio/aspeed-gpio.h>
> > +
> > +/ {
> > + model = "HR630 BMC";
> > + compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
> > +
> > + aliases {
> > + i2c14 = &i2c_rbp;
> > + i2c15 = &i2c_fbp1;
> > + i2c16 = &i2c_fbp2;
> > + i2c17 = &i2c_fbp3;
> > + i2c18 = &i2c_riser2;
> > + i2c19 = &i2c_pcie4;
> > + i2c20 = &i2c_riser1;
> > + i2c21 = &i2c_ocp;
> > + };
> > +
> > + chosen {
> > + stdout-path = &uart5;
> > + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
> > + };
> > +
> > + memory at 80000000 {
> > + device_type = "memory";
> > + reg = <0x80000000 0x20000000>;
> > + };
> > +
> > + reserved-memory {
> > + #address-cells = <1>;
> > + #size-cells = <1>;
> > + ranges;
> > +
> > + flash_memory: region at 98000000 {
> > + no-map;
> > + reg = <0x98000000 0x00100000>; /* 1M */
> > + };
> > +
> > + gfx_memory: framebuffer {
> > + size = <0x01000000>;
> > + alignment = <0x01000000>;
> > + compatible = "shared-dma-pool";
> > + reusable;
> > + };
> > + };
> > +
> > + leds {
> > + compatible = "gpio-leds";
> > +
> > + heartbeat {
> > + gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + fault {
> > + gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
> > + };
> > + };
> > +
> > + iio-hwmon {
> > + compatible = "iio-hwmon";
> > + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
> > + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
> > + <&adc 8>, <&adc 9>, <&adc 10>,
> > + <&adc 12>, <&adc 13>, <&adc 14>;
> > + };
> > +
> > +};
> > +
> > +&fmc {
> > + status = "okay";
> > + flash at 0 {
> > + status = "okay";
> > + m25p,fast-read;
> > + label = "bmc";
> > + spi-max-frequency = <50000000>;
> > +#include "openbmc-flash-layout.dtsi"
> > + };
> > +};
> > +
> > +&lpc_ctrl {
> > + status = "okay";
> > + memory-region = <&flash_memory>;
> > + flash = <&spi1>;
> > +};
> > +
> > +&uart1 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_txd1_default
> > + &pinctrl_rxd1_default>;
> > +};
> > +
> > +&uart2 {
> > + /* Rear RS-232 connector */
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_txd2_default
> > + &pinctrl_rxd2_default
> > + &pinctrl_nrts2_default
> > + &pinctrl_ndtr2_default
> > + &pinctrl_ndsr2_default
> > + &pinctrl_ncts2_default
> > + &pinctrl_ndcd2_default
> > + &pinctrl_nri2_default>;
> > +};
> > +
> > +&uart3 {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_txd3_default
> > + &pinctrl_rxd3_default>;
> > +};
> > +
> > +&uart5 {
> > + status = "okay";
> > +};
> > +
> > +&ibt {
> > + status = "okay";
> > +};
> > +
> > +&mac0 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_rmii1_default>;
> > + use-ncsi;
> > +};
> > +
> > +&mac1 {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
> > +};
> > +
> > +&adc {
> > + status = "okay";
> > +
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_adc0_default
> > + &pinctrl_adc1_default
> > + &pinctrl_adc2_default
> > + &pinctrl_adc3_default
> > + &pinctrl_adc4_default
> > + &pinctrl_adc5_default
> > + &pinctrl_adc6_default
> > + &pinctrl_adc7_default
> > + &pinctrl_adc8_default
> > + &pinctrl_adc9_default
> > + &pinctrl_adc10_default
> > + &pinctrl_adc12_default
> > + &pinctrl_adc13_default
> > + &pinctrl_adc14_default>;
> > +};
> > +
> > +&i2c0 {
> > + status = "okay";
> > + /* temp1 inlet */
> > + tmp75 at 4e {
> > + compatible = "national,lm75";
> > + reg = <0x4e>;
> > + };
> > +};
> > +
> > +&i2c1 {
> > + status = "okay";
> > + /* temp2 outlet */
> > + tmp75 at 4d {
> > + compatible = "national,lm75";
> > + reg = <0x4d>;
> > + };
> > +};
> > +
> > +&i2c2 {
> > + status = "okay";
> > +};
> > +
> > +&i2c3 {
> > + status = "okay";
> > +};
> > +
> > +&i2c4 {
> > + status = "okay";
> > +};
> > +
> > +&i2c5 {
> > + status = "okay";
> > +};
> > +
> > +&i2c6 {
> > + status = "okay";
> > + /* Slot 0,
> > + * Slot 1,
> > + * Slot 2,
> > + * Slot 3
> > + */
> > +
> > + i2c-switch at 70 {
> > + compatible = "nxp,pca9545";
> > + reg = <0x70>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + i2c-mux-idle-disconnect; /* may use mux at 70 next. */
Per an earlier email, this comment, and its sibling comment don't
really make sense, and there's no chance of a bus collision here since
the switches reside on different buses. If the switches were under
the same bus then accesses could collide the address ranges without
the "i2c-mux-idle-disconnect" property set.
I'm ok with this being here, but someone will want to send a follow-up
patchset at some point to remove the comment - at the least.
> > +
> > + i2c_rbp: i2c at 0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0>;
> > + };
> > +
> > + i2c_fbp1: i2c at 1 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <1>;
> > + };
> > +
> > + i2c_fbp2: i2c at 2 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <2>;
> > + };
> > +
> > + i2c_fbp3: i2c at 3 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <3>;
> > + };
> > + };
> > +};
> > +
> > +&i2c7 {
> > + status = "okay";
> > +
> > + /* Slot 0,
> > + * Slot 1,
> > + * Slot 2,
> > + * Slot 3
> > + */
> > + i2c-switch at 76 {
> > + compatible = "nxp,pca9546";
> > + reg = <0x76>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + i2c-mux-idle-disconnect; /* may use mux at 76 next. */
> > +
> > + i2c_riser2: i2c at 0 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <0>;
> > + };
> > +
> > + i2c_pcie4: i2c at 1 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <1>;
> > + };
> > +
> > + i2c_riser1: i2c at 2 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <2>;
> > + };
> > +
> > + i2c_ocp: i2c at 3 {
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > + reg = <3>;
> > + };
> > + };
> > +};
> > +
> > +&i2c8 {
> > + status = "okay";
> > +
> > + eeprom at 57 {
> > + compatible = "atmel,24c256";
> > + reg = <0x57>;
> > + pagesize = <16>;
> > + };
> > +};
> > +
> > +&i2c9 {
> > + status = "okay";
> > +};
> > +
> > +&i2c10 {
> > + status = "okay";
> > +};
> > +
> > +&i2c11 {
> > + status = "okay";
> > +};
> > +
> > +&i2c12 {
> > + status = "okay";
> > +};
> > +
> > +&ehci1 {
> > + status = "okay";
> > +};
> > +
> > +&uhci {
> > + status = "okay";
> > +};
> > +
> > +&gfx {
> > + status = "okay";
> > + memory-region = <&gfx_memory>;
> > +};
> > +
> > +&pwm_tacho {
> > + status = "okay";
> > + pinctrl-names = "default";
> > + pinctrl-0 = <&pinctrl_pwm0_default
> > + &pinctrl_pwm1_default
> > + &pinctrl_pwm2_default
> > + &pinctrl_pwm3_default
> > + &pinctrl_pwm4_default
> > + &pinctrl_pwm5_default
> > + &pinctrl_pwm6_default>;
> > +
> > + fan at 0 {
> > + reg = <0x00>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x00>;
> > + };
> > +
> > + fan at 1 {
> > + reg = <0x00>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x01>;
> > + };
> > +
> > + fan at 2 {
> > + reg = <0x01>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x02>;
> > + };
> > +
> > + fan at 3 {
> > + reg = <0x01>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x03>;
> > + };
> > +
> > + fan at 4 {
> > + reg = <0x02>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x04>;
> > + };
> > +
> > + fan at 5 {
> > + reg = <0x02>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x05>;
> > + };
> > +
> > + fan at 6 {
> > + reg = <0x03>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x06>;
> > + };
> > +
> > + fan at 7 {
> > + reg = <0x03>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x07>;
> > + };
> > +
> > + fan at 8 {
> > + reg = <0x04>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x08>;
> > + };
> > +
> > + fan at 9 {
> > + reg = <0x04>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x09>;
> > + };
> > +
> > + fan at 10 {
> > + reg = <0x05>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
> > + };
> > +
> > + fan at 11 {
> > + reg = <0x05>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
> > + };
> > +
> > + fan at 12 {
> > + reg = <0x06>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
> > + };
> > +
> > + fan at 13 {
> > + reg = <0x06>;
> > + aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
> > + };
> > +};
> > +
> > +&gpio {
> > +
> > + pin_gpio_b5 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "IRQ_BMC_PCH_SMI_LPC_N";
> > + };
> > +
> > + pin_gpio_f0 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "IRQ_BMC_PCH_NMI_R";
> > + };
> > +
> > + pin_gpio_f3 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "I2C_BUS0_RST_OUT_N";
> > + };
> > +
> > + pin_gpio_f4 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "FM_SKT0_FAULT_LED";
> > + };
> > +
> > + pin_gpio_f5 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "FM_SKT1_FAULT_LED";
> > + };
> > +
> > + pin_gpio_g4 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "FAN_PWR_CTL_N";
> > + };
> > +
> > + pin_gpio_g7 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "RST_BMC_PCIE_I2CMUX_N";
> > + };
> > +
> > + pin_gpio_h2 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "PSU1_FFS_N_R";
> > + };
> > +
> > + pin_gpio_h3 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "PSU2_FFS_N_R";
> > + };
> > +
> > + pin_gpio_i3 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "BMC_INTRUDED_COVER";
> > + };
> > +
> > + pin_gpio_j2 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "BMC_BIOS_UPDATE_N";
> > + };
> > +
> > + pin_gpio_j3 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "RST_BMC_HDD_I2CMUX_N";
> > + };
> > +
> > + pin_gpio_s2 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "BMC_VGA_SW";
> > + };
> > +
> > + pin_gpio_s4 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
> > + output;
> > + line-name = "VBAT_EN_N";
> > + };
> > +
> > + pin_gpio_s6 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "PU_BMC_GPIOS6";
> > + };
> > +
> > + pin_gpio_y0 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "BMC_NCSI_MUX_CTL_S0";
> > + };
> > +
> > + pin_gpio_y1 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "BMC_NCSI_MUX_CTL_S1";
> > + };
> > +
> > + pin_gpio_z0 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "I2C_RISER2_INT_N";
> > + };
> > +
> > + pin_gpio_z2 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "I2C_RISER2_RESET_N";
> > + };
> > +
> > + pin_gpio_z3 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "FM_BMC_PCH_SCI_LPC_N";
> > + };
> > +
> > + pin_gpio_z7 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "BMC_POST_CMPLT_N";
> > + };
> > +
> > + pin_gpio_aa0 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
> > + output-low;
> > + line-name = "HOST_BMC_USB_SEL";
> > + };
> > +
> > + pin_gpio_aa5 {
> > + gpio-hog;
> > + gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
> > + output-high;
> > + line-name = "I2C_BUS1_RST_OUT_N";
> > + };
> > +
> > +};
> > --
> > 2.7.4
> >
> >
^ permalink raw reply
* [PATCH dev-5.0 v3] ARM: dts: aspeed: Add Swift BMC machine
From: Matt Spinler @ 2019-05-06 14:09 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1556572128-20917-1-git-send-email-anoo@linux.ibm.com>
On 4/29/2019 4:08 PM, Adriana Kobylak wrote:
> From: Adriana Kobylak <anoo@us.ibm.com>
>
> The Swift BMC is an ASPEED ast2500 based BMC that is part of
> a Power9 server. This adds the device tree description for
> most upstream components.
>
> Signed-off-by: Adriana Kobylak <anoo@us.ibm.com>
Reviewed-by: Matt Spinler <spinler@us.ibm.com>
> ---
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 828 +++++++++++++++++++++++++++++
> 2 files changed, 829 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index bd40148..b82a24d 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1244,6 +1244,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-palmetto.dtb \
> aspeed-bmc-opp-romulus.dtb \
> + aspeed-bmc-opp-swift.dtb \
> aspeed-bmc-opp-witherspoon.dtb \
> aspeed-bmc-opp-zaius.dtb \
> aspeed-bmc-portwell-neptune.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> new file mode 100644
> index 0000000..8d44e3c
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> @@ -0,0 +1,828 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/dts-v1/;
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +#include <dt-bindings/leds/leds-pca955x.h>
> +
> +/ {
> + model = "Swift BMC";
> + compatible = "ibm,swift-bmc", "aspeed,ast2500";
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory at 80000000 {
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region at 98000000 {
> + no-map;
> + reg = <0x98000000 0x04000000>; /* 64M */
> + };
> +
> + gfx_memory: framebuffer {
> + size = <0x01000000>;
> + alignment = <0x01000000>;
> + compatible = "shared-dma-pool";
> + reusable;
> + };
> + };
> +
> + gpio-keys {
> + compatible = "gpio-keys";
> +
> + air-water {
> + label = "air-water";
> + gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(B, 5)>;
> + };
> +
> + checkstop {
> + label = "checkstop";
> + gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(J, 2)>;
> + };
> +
> + ps0-presence {
> + label = "ps0-presence";
> + gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(R, 7)>;
> + };
> +
> + ps1-presence {
> + label = "ps1-presence";
> + gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(N, 0)>;
> + };
> +
> + oppanel-presence {
> + label = "oppanel-presence";
> + gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(A, 7)>;
> + };
> +
> + opencapi-riser-presence {
> + label = "opencapi-riser-presence";
> + gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
> + linux,code = <ASPEED_GPIO(I, 0)>;
> + };
> + };
> +
> + iio-hwmon-battery {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 12>;
> + };
> +
> + gpio-keys-polled {
> + compatible = "gpio-keys-polled";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + poll-interval = <1000>;
> +
> + scm0-presence {
> + label = "scm0-presence";
> + gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
> + linux,code = <6>;
> + };
> +
> + scm1-presence {
> + label = "scm1-presence";
> + gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
> + linux,code = <7>;
> + };
> +
> + cpu0vrm-presence {
> + label = "cpu0vrm-presence";
> + gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
> + linux,code = <12>;
> + };
> +
> + cpu1vrm-presence {
> + label = "cpu1vrm-presence";
> + gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
> + linux,code = <13>;
> + };
> +
> + fan0-presence {
> + label = "fan0-presence";
> + gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
> + linux,code = <5>;
> + };
> +
> + fan1-presence {
> + label = "fan1-presence";
> + gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
> + linux,code = <6>;
> + };
> +
> + fan2-presence {
> + label = "fan2-presence";
> + gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
> + linux,code = <7>;
> + };
> +
> + fan3-presence {
> + label = "fan3-presence";
> + gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
> + linux,code = <8>;
> + };
> +
> + fanboost-presence {
> + label = "fanboost-presence";
> + gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
> + linux,code = <9>;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + fan0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + fanboost {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-fault {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-power {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + front-id {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-fault {
> + gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-id {
> + gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
> + };
> +
> + rear-power {
> + gpios = <&gpio ASPEED_GPIO(N, 3) GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + fsi: gpio-fsi {
> + compatible = "fsi-master-gpio", "fsi-master";
> + #address-cells = <2>;
> + #size-cells = <0>;
> + no-gpio-delays;
> +
> + clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
> + data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
> + mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
> + enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
> + trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
> + };
> +
> + iio-hwmon-dps310 {
> + compatible = "iio-hwmon";
> + io-channels = <&dps 0>;
> + };
> +
> +};
> +
> +&fmc {
> + status = "okay";
> +
> + flash at 0 {
> + status = "okay";
> + label = "bmc";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + partitions {
> + #address-cells = < 1 >;
> + #size-cells = < 1 >;
> + compatible = "fixed-partitions";
> + u-boot at 0 {
> + reg = < 0 0x60000 >;
> + label = "u-boot";
> + };
> + u-boot-env at 60000 {
> + reg = < 0x60000 0x20000 >;
> + label = "u-boot-env";
> + };
> + obmc-ubi at 80000 {
> + reg = < 0x80000 0x7F80000>;
> + label = "obmc-ubi";
> + };
> + };
> + };
> +
> + flash at 1 {
> + status = "okay";
> + label = "alt-bmc";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + partitions {
> + #address-cells = < 1 >;
> + #size-cells = < 1 >;
> + compatible = "fixed-partitions";
> + u-boot at 0 {
> + reg = < 0 0x60000 >;
> + label = "alt-u-boot";
> + };
> + u-boot-env at 60000 {
> + reg = < 0x60000 0x20000 >;
> + label = "alt-u-boot-env";
> + };
> + obmc-ubi at 80000 {
> + reg = < 0x80000 0x7F80000>;
> + label = "alt-obmc-ubi";
> + };
> + };
> + };
> +};
> +
> +&spi1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_spi1_default>;
> +
> + flash at 0 {
> + status = "okay";
> + label = "pnor";
> + m25p,fast-read;
> + spi-max-frequency = <100000000>;
> + };
> +};
> +
> +&uart1 {
> + /* Rear RS-232 connector */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd1_default
> + &pinctrl_rxd1_default
> + &pinctrl_nrts1_default
> + &pinctrl_ndtr1_default
> + &pinctrl_ndsr1_default
> + &pinctrl_ncts1_default
> + &pinctrl_ndcd1_default
> + &pinctrl_nri1_default>;
> +};
> +
> +&uart2 {
> + /* APSS */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&mbox {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&i2c2 {
> + status = "okay";
> +
> + /* MUX ->
> + * Samtec 1
> + * Samtec 2
> + */
> +};
> +
> +&i2c3 {
> + status = "okay";
> +
> + max31785 at 52 {
> + compatible = "maxim,max31785a";
> + reg = <0x52>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + fan at 0 {
> + compatible = "pmbus-fan";
> + reg = <0>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 1 {
> + compatible = "pmbus-fan";
> + reg = <1>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 2 {
> + compatible = "pmbus-fan";
> + reg = <2>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 3 {
> + compatible = "pmbus-fan";
> + reg = <3>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> +
> + fan at 4 {
> + compatible = "pmbus-fan";
> + reg = <4>;
> + tach-pulses = <2>;
> + maxim,fan-rotor-input = "tach";
> + maxim,fan-pwm-freq = <25000>;
> + maxim,fan-no-watchdog;
> + maxim,fan-no-fault-ramp;
> + maxim,fan-ramp = <2>;
> + maxim,fan-fault-pin-mon;
> + };
> + };
> +
> + pca0: pca9552 at 60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + power-supply at 68 {
> + compatible = "ibm,cffps1";
> + reg = <0x68>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + power-supply at 69 {
> + compatible = "ibm,cffps1";
> + reg = <0x69>;
> + };
> +
> + eeprom at 51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + dps: dps310 at 76 {
> + compatible = "infineon,dps310";
> + reg = <0x76>;
> + #io-channel-cells = <0>;
> + };
> +
> + tmp275 at 48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + si7021a20 at 20 {
> + compatible = "si,si7021a20";
> + reg = <0x20>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + pca1: pca9551 at 60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + pca9552: pca9552 at 60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
> + "GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
> + "GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
> + "P9_SCM0_PRES", "P9_SCM1_PRES",
> + "GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
> + "GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
> + "PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
> + "12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
> +
> + gpio at 0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio at 15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + rtc at 32 {
> + compatible = "epson,rx8900";
> + reg = <0x32>;
> + };
> +
> + eeprom at 51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +
> + ucd90160 at 64 {
> + compatible = "ti,ucd90160";
> + reg = <0x64>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + tmp423a at 4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + ir35221 at 71 {
> + compatible = "infineon,ir35221";
> + reg = <0x71>;
> + };
> +
> + ir35221 at 72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +};
> +
> +&i2c10 {
> + status = "okay";
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + tmp423a at 4c {
> + compatible = "ti,tmp423";
> + reg = <0x4c>;
> + };
> +
> + ir35221 at 71 {
> + compatible = "infineon,ir35221";
> + reg = <0x71>;
> + };
> +
> + ir35221 at 72 {
> + compatible = "infineon,ir35221";
> + reg = <0x72>;
> + };
> +};
> +
> +&i2c11 {
> + /* MUX
> + * -> PCIe Slot 0
> + * -> PCIe Slot 1
> + * -> PCIe Slot 2
> + * -> PCIe Slot 3
> + */
> + status = "okay";
> +};
> +
> +&i2c12 {
> + status = "okay";
> +
> + tmp275 at 48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275 at 4a {
> + compatible = "ti,tmp275";
> + reg = <0x4a>;
> + };
> +};
> +
> +&i2c13 {
> + status = "okay";
> +};
> +
> +&vuart {
> + status = "okay";
> +};
> +
> +&gfx {
> + status = "okay";
> + memory-region = <&gfx_memory>;
> +};
> +
> +&pinctrl {
> + aspeed,external-nodes = <&gfx &lhc>;
> +};
> +
> +&wdt1 {
> + aspeed,reset-type = "none";
> + aspeed,external-signal;
> + aspeed,ext-push-pull;
> + aspeed,ext-active-high;
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_wdtrst1_default>;
> +};
> +
> +&wdt2 {
> + aspeed,alt-boot;
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&adc {
> + status = "okay";
> +};
> +
> +#include "ibm-power9-dual.dtsi"
^ permalink raw reply
* [PATCH v2] misc: aspeed-lpc-ctrl: Correct return values
From: Andrew Jeffery @ 2019-05-06 4:24 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190503181336.579877-1-vijaykhemka@fb.com>
On Sat, 4 May 2019, at 03:43, Vijay Khemka wrote:
> Corrected some of return values with appropriate meanings and reported
> relevant messages as debug information.
>
> Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Thanks for the fixes, this looks okay now. However, was there a reason for
not squashing change into your previous patch that introduced the issues
this fixes? That hasn't been applied yet either as far as I'm aware. I'd prefer
we do that and submit a single, good patch if we can.
Andrew
> ---
> drivers/misc/aspeed-lpc-ctrl.c | 14 +++++++-------
> 1 file changed, 7 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/misc/aspeed-lpc-ctrl.c
> b/drivers/misc/aspeed-lpc-ctrl.c
> index 332210e06e98..aca13779764a 100644
> --- a/drivers/misc/aspeed-lpc-ctrl.c
> +++ b/drivers/misc/aspeed-lpc-ctrl.c
> @@ -93,8 +93,8 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file,
> unsigned int cmd,
>
> /* If memory-region is not described in device tree */
> if (!lpc_ctrl->mem_size) {
> - dev_err(dev, "Didn't find reserved memory\n");
> - return -EINVAL;
> + dev_dbg(dev, "Didn't find reserved memory\n");
> + return -ENXIO;
> }
>
> map.size = lpc_ctrl->mem_size;
> @@ -134,16 +134,16 @@ static long aspeed_lpc_ctrl_ioctl(struct file
> *file, unsigned int cmd,
>
> if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
> if (!lpc_ctrl->pnor_size) {
> - dev_err(dev, "Didn't find host pnor flash\n");
> - return -EINVAL;
> + dev_dbg(dev, "Didn't find host pnor flash\n");
> + return -ENXIO;
> }
> addr = lpc_ctrl->pnor_base;
> size = lpc_ctrl->pnor_size;
> } else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
> /* If memory-region is not described in device tree */
> if (!lpc_ctrl->mem_size) {
> - dev_err(dev, "Didn't find reserved memory\n");
> - return -EINVAL;
> + dev_dbg(dev, "Didn't find reserved memory\n");
> + return -ENXIO;
> }
> addr = lpc_ctrl->mem_base;
> size = lpc_ctrl->mem_size;
> @@ -239,7 +239,7 @@ static int aspeed_lpc_ctrl_probe(struct
> platform_device *pdev)
> of_node_put(node);
> if (rc) {
> dev_err(dev, "Couldn't address to resource for reserved memory\n");
> - return -ENOMEM;
> + return -ENXIO;
> }
>
> lpc_ctrl->mem_size = resource_size(&resm);
> --
> 2.17.1
>
>
^ permalink raw reply
* [PATCH v6] ARM: dts: aspeed: Adding Lenovo Hr630 BMC
From: Andrew Jeffery @ 2019-05-06 3:17 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1557036518-286348-1-git-send-email-pengms1@lenovo.com>
On Sun, 5 May 2019, at 15:38, Andrew Peng wrote:
> Initial introduction of Lenovo Hr630 family equipped with
> Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
> with a ASPEED ast2500 BMC manufactured by Lenovo.
> Specifically, This adds the Hr630 platform device tree file
> used by the Hr630 BMC machines.
>
> This also adds an entry of Hr630 device tree file in Makefile
>
> Signed-off-by: Andrew Peng <pengms1@lenovo.com>
> Signed-off-by: Yonghui Liu <liuyh21@lenovo.com>
> Signed-off-by: Lisa Liu <liuyj19@lenovo.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Changes in v6:
> - add appropriate pinctrl property for uar1, uart2, uart3 and adc.
> - remove vhub definition and comment.
> - remove some GPIO definitions.
> - revise Makefile according to sort alphabetically.
> Changes in v5:
> - revise pca9545 and pca9546 switch aliases name.
> Changes in v4:
> - add pca9546 switch aliases name.
> Changes in v3:
> - revise i2c switch aliases name.
> Changes in v2:
> - add i2c switch aliases name.
> - remove the unused eeprom device from DT file.
> - remove "Licensed under..." sentence.
>
> arch/arm/boot/dts/Makefile | 1 +
> arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts | 566 ++++++++++++++++++++++++++
> 2 files changed, 567 insertions(+)
> create mode 100644 arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
>
> diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
> index f4f5aea..1276167 100644
> --- a/arch/arm/boot/dts/Makefile
> +++ b/arch/arm/boot/dts/Makefile
> @@ -1255,6 +1255,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
> aspeed-bmc-facebook-cmm.dtb \
> aspeed-bmc-facebook-tiogapass.dtb \
> aspeed-bmc-intel-s2600wf.dtb \
> + aspeed-bmc-lenovo-hr630.dtb \
> aspeed-bmc-opp-lanyang.dtb \
> aspeed-bmc-opp-palmetto.dtb \
> aspeed-bmc-opp-romulus.dtb \
> diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> new file mode 100644
> index 0000000..d3695a3
> --- /dev/null
> +++ b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
> @@ -0,0 +1,566 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Device Tree file for Lenovo Hr630 platform
> + *
> + * Copyright (C) 2019-present Lenovo
> + */
> +
> +/dts-v1/;
> +
> +#include "aspeed-g5.dtsi"
> +#include <dt-bindings/gpio/aspeed-gpio.h>
> +
> +/ {
> + model = "HR630 BMC";
> + compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
> +
> + aliases {
> + i2c14 = &i2c_rbp;
> + i2c15 = &i2c_fbp1;
> + i2c16 = &i2c_fbp2;
> + i2c17 = &i2c_fbp3;
> + i2c18 = &i2c_riser2;
> + i2c19 = &i2c_pcie4;
> + i2c20 = &i2c_riser1;
> + i2c21 = &i2c_ocp;
> + };
> +
> + chosen {
> + stdout-path = &uart5;
> + bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
> + };
> +
> + memory at 80000000 {
> + device_type = "memory";
> + reg = <0x80000000 0x20000000>;
> + };
> +
> + reserved-memory {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges;
> +
> + flash_memory: region at 98000000 {
> + no-map;
> + reg = <0x98000000 0x00100000>; /* 1M */
> + };
> +
> + gfx_memory: framebuffer {
> + size = <0x01000000>;
> + alignment = <0x01000000>;
> + compatible = "shared-dma-pool";
> + reusable;
> + };
> + };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + heartbeat {
> + gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
> + };
> +
> + fault {
> + gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + iio-hwmon {
> + compatible = "iio-hwmon";
> + io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
> + <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
> + <&adc 8>, <&adc 9>, <&adc 10>,
> + <&adc 12>, <&adc 13>, <&adc 14>;
> + };
> +
> +};
> +
> +&fmc {
> + status = "okay";
> + flash at 0 {
> + status = "okay";
> + m25p,fast-read;
> + label = "bmc";
> + spi-max-frequency = <50000000>;
> +#include "openbmc-flash-layout.dtsi"
> + };
> +};
> +
> +&lpc_ctrl {
> + status = "okay";
> + memory-region = <&flash_memory>;
> + flash = <&spi1>;
> +};
> +
> +&uart1 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd1_default
> + &pinctrl_rxd1_default>;
> +};
> +
> +&uart2 {
> + /* Rear RS-232 connector */
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd2_default
> + &pinctrl_rxd2_default
> + &pinctrl_nrts2_default
> + &pinctrl_ndtr2_default
> + &pinctrl_ndsr2_default
> + &pinctrl_ncts2_default
> + &pinctrl_ndcd2_default
> + &pinctrl_nri2_default>;
> +};
> +
> +&uart3 {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_txd3_default
> + &pinctrl_rxd3_default>;
> +};
> +
> +&uart5 {
> + status = "okay";
> +};
> +
> +&ibt {
> + status = "okay";
> +};
> +
> +&mac0 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rmii1_default>;
> + use-ncsi;
> +};
> +
> +&mac1 {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
> +};
> +
> +&adc {
> + status = "okay";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_adc0_default
> + &pinctrl_adc1_default
> + &pinctrl_adc2_default
> + &pinctrl_adc3_default
> + &pinctrl_adc4_default
> + &pinctrl_adc5_default
> + &pinctrl_adc6_default
> + &pinctrl_adc7_default
> + &pinctrl_adc8_default
> + &pinctrl_adc9_default
> + &pinctrl_adc10_default
> + &pinctrl_adc12_default
> + &pinctrl_adc13_default
> + &pinctrl_adc14_default>;
> +};
> +
> +&i2c0 {
> + status = "okay";
> + /* temp1 inlet */
> + tmp75 at 4e {
> + compatible = "national,lm75";
> + reg = <0x4e>;
> + };
> +};
> +
> +&i2c1 {
> + status = "okay";
> + /* temp2 outlet */
> + tmp75 at 4d {
> + compatible = "national,lm75";
> + reg = <0x4d>;
> + };
> +};
> +
> +&i2c2 {
> + status = "okay";
> +};
> +
> +&i2c3 {
> + status = "okay";
> +};
> +
> +&i2c4 {
> + status = "okay";
> +};
> +
> +&i2c5 {
> + status = "okay";
> +};
> +
> +&i2c6 {
> + status = "okay";
> + /* Slot 0,
> + * Slot 1,
> + * Slot 2,
> + * Slot 3
> + */
> +
> + i2c-switch at 70 {
> + compatible = "nxp,pca9545";
> + reg = <0x70>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-mux-idle-disconnect; /* may use mux at 70 next. */
> +
> + i2c_rbp: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + i2c_fbp1: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + i2c_fbp2: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + i2c_fbp3: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> + };
> +};
> +
> +&i2c7 {
> + status = "okay";
> +
> + /* Slot 0,
> + * Slot 1,
> + * Slot 2,
> + * Slot 3
> + */
> + i2c-switch at 76 {
> + compatible = "nxp,pca9546";
> + reg = <0x76>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> + i2c-mux-idle-disconnect; /* may use mux at 76 next. */
> +
> + i2c_riser2: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + i2c_pcie4: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + i2c_riser1: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + i2c_ocp: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> + };
> +};
> +
> +&i2c8 {
> + status = "okay";
> +
> + eeprom at 57 {
> + compatible = "atmel,24c256";
> + reg = <0x57>;
> + pagesize = <16>;
> + };
> +};
> +
> +&i2c9 {
> + status = "okay";
> +};
> +
> +&i2c10 {
> + status = "okay";
> +};
> +
> +&i2c11 {
> + status = "okay";
> +};
> +
> +&i2c12 {
> + status = "okay";
> +};
> +
> +&ehci1 {
> + status = "okay";
> +};
> +
> +&uhci {
> + status = "okay";
> +};
> +
> +&gfx {
> + status = "okay";
> + memory-region = <&gfx_memory>;
> +};
> +
> +&pwm_tacho {
> + status = "okay";
> + pinctrl-names = "default";
> + pinctrl-0 = <&pinctrl_pwm0_default
> + &pinctrl_pwm1_default
> + &pinctrl_pwm2_default
> + &pinctrl_pwm3_default
> + &pinctrl_pwm4_default
> + &pinctrl_pwm5_default
> + &pinctrl_pwm6_default>;
> +
> + fan at 0 {
> + reg = <0x00>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x00>;
> + };
> +
> + fan at 1 {
> + reg = <0x00>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x01>;
> + };
> +
> + fan at 2 {
> + reg = <0x01>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x02>;
> + };
> +
> + fan at 3 {
> + reg = <0x01>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x03>;
> + };
> +
> + fan at 4 {
> + reg = <0x02>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x04>;
> + };
> +
> + fan at 5 {
> + reg = <0x02>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x05>;
> + };
> +
> + fan at 6 {
> + reg = <0x03>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x06>;
> + };
> +
> + fan at 7 {
> + reg = <0x03>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x07>;
> + };
> +
> + fan at 8 {
> + reg = <0x04>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x08>;
> + };
> +
> + fan at 9 {
> + reg = <0x04>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x09>;
> + };
> +
> + fan at 10 {
> + reg = <0x05>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
> + };
> +
> + fan at 11 {
> + reg = <0x05>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
> + };
> +
> + fan at 12 {
> + reg = <0x06>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
> + };
> +
> + fan at 13 {
> + reg = <0x06>;
> + aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
> + };
> +};
> +
> +&gpio {
> +
> + pin_gpio_b5 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "IRQ_BMC_PCH_SMI_LPC_N";
> + };
> +
> + pin_gpio_f0 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "IRQ_BMC_PCH_NMI_R";
> + };
> +
> + pin_gpio_f3 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "I2C_BUS0_RST_OUT_N";
> + };
> +
> + pin_gpio_f4 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "FM_SKT0_FAULT_LED";
> + };
> +
> + pin_gpio_f5 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "FM_SKT1_FAULT_LED";
> + };
> +
> + pin_gpio_g4 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "FAN_PWR_CTL_N";
> + };
> +
> + pin_gpio_g7 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "RST_BMC_PCIE_I2CMUX_N";
> + };
> +
> + pin_gpio_h2 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "PSU1_FFS_N_R";
> + };
> +
> + pin_gpio_h3 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "PSU2_FFS_N_R";
> + };
> +
> + pin_gpio_i3 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "BMC_INTRUDED_COVER";
> + };
> +
> + pin_gpio_j2 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "BMC_BIOS_UPDATE_N";
> + };
> +
> + pin_gpio_j3 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "RST_BMC_HDD_I2CMUX_N";
> + };
> +
> + pin_gpio_s2 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "BMC_VGA_SW";
> + };
> +
> + pin_gpio_s4 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
> + output;
> + line-name = "VBAT_EN_N";
> + };
> +
> + pin_gpio_s6 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "PU_BMC_GPIOS6";
> + };
> +
> + pin_gpio_y0 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "BMC_NCSI_MUX_CTL_S0";
> + };
> +
> + pin_gpio_y1 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "BMC_NCSI_MUX_CTL_S1";
> + };
> +
> + pin_gpio_z0 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "I2C_RISER2_INT_N";
> + };
> +
> + pin_gpio_z2 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "I2C_RISER2_RESET_N";
> + };
> +
> + pin_gpio_z3 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "FM_BMC_PCH_SCI_LPC_N";
> + };
> +
> + pin_gpio_z7 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "BMC_POST_CMPLT_N";
> + };
> +
> + pin_gpio_aa0 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
> + output-low;
> + line-name = "HOST_BMC_USB_SEL";
> + };
> +
> + pin_gpio_aa5 {
> + gpio-hog;
> + gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
> + output-high;
> + line-name = "I2C_BUS1_RST_OUT_N";
> + };
> +
> +};
> --
> 2.7.4
>
>
^ permalink raw reply
* [PATCH v6] ARM: dts: aspeed: Adding Lenovo Hr630 BMC
From: Andrew Peng @ 2019-05-05 6:08 UTC (permalink / raw)
To: linux-aspeed
Initial introduction of Lenovo Hr630 family equipped with
Aspeed 2500 BMC SoC. Hr630 is a x86 server development kit
with a ASPEED ast2500 BMC manufactured by Lenovo.
Specifically, This adds the Hr630 platform device tree file
used by the Hr630 BMC machines.
This also adds an entry of Hr630 device tree file in Makefile
Signed-off-by: Andrew Peng <pengms1@lenovo.com>
Signed-off-by: Yonghui Liu <liuyh21@lenovo.com>
Signed-off-by: Lisa Liu <liuyj19@lenovo.com>
---
Changes in v6:
- add appropriate pinctrl property for uar1, uart2, uart3 and adc.
- remove vhub definition and comment.
- remove some GPIO definitions.
- revise Makefile according to sort alphabetically.
Changes in v5:
- revise pca9545 and pca9546 switch aliases name.
Changes in v4:
- add pca9546 switch aliases name.
Changes in v3:
- revise i2c switch aliases name.
Changes in v2:
- add i2c switch aliases name.
- remove the unused eeprom device from DT file.
- remove "Licensed under..." sentence.
arch/arm/boot/dts/Makefile | 1 +
arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts | 566 ++++++++++++++++++++++++++
2 files changed, 567 insertions(+)
create mode 100644 arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index f4f5aea..1276167 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1255,6 +1255,7 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-intel-s2600wf.dtb \
+ aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
diff --git a/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
new file mode 100644
index 0000000..d3695a3
--- /dev/null
+++ b/arch/arm/boot/dts/aspeed-bmc-lenovo-hr630.dts
@@ -0,0 +1,566 @@
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Device Tree file for Lenovo Hr630 platform
+ *
+ * Copyright (C) 2019-present Lenovo
+ */
+
+/dts-v1/;
+
+#include "aspeed-g5.dtsi"
+#include <dt-bindings/gpio/aspeed-gpio.h>
+
+/ {
+ model = "HR630 BMC";
+ compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
+
+ aliases {
+ i2c14 = &i2c_rbp;
+ i2c15 = &i2c_fbp1;
+ i2c16 = &i2c_fbp2;
+ i2c17 = &i2c_fbp3;
+ i2c18 = &i2c_riser2;
+ i2c19 = &i2c_pcie4;
+ i2c20 = &i2c_riser1;
+ i2c21 = &i2c_ocp;
+ };
+
+ chosen {
+ stdout-path = &uart5;
+ bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
+ };
+
+ memory at 80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x20000000>;
+ };
+
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ flash_memory: region at 98000000 {
+ no-map;
+ reg = <0x98000000 0x00100000>; /* 1M */
+ };
+
+ gfx_memory: framebuffer {
+ size = <0x01000000>;
+ alignment = <0x01000000>;
+ compatible = "shared-dma-pool";
+ reusable;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ heartbeat {
+ gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
+ };
+
+ fault {
+ gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ iio-hwmon {
+ compatible = "iio-hwmon";
+ io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
+ <&adc 8>, <&adc 9>, <&adc 10>,
+ <&adc 12>, <&adc 13>, <&adc 14>;
+ };
+
+};
+
+&fmc {
+ status = "okay";
+ flash at 0 {
+ status = "okay";
+ m25p,fast-read;
+ label = "bmc";
+ spi-max-frequency = <50000000>;
+#include "openbmc-flash-layout.dtsi"
+ };
+};
+
+&lpc_ctrl {
+ status = "okay";
+ memory-region = <&flash_memory>;
+ flash = <&spi1>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd1_default
+ &pinctrl_rxd1_default>;
+};
+
+&uart2 {
+ /* Rear RS-232 connector */
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd2_default
+ &pinctrl_rxd2_default
+ &pinctrl_nrts2_default
+ &pinctrl_ndtr2_default
+ &pinctrl_ndsr2_default
+ &pinctrl_ncts2_default
+ &pinctrl_ndcd2_default
+ &pinctrl_nri2_default>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_txd3_default
+ &pinctrl_rxd3_default>;
+};
+
+&uart5 {
+ status = "okay";
+};
+
+&ibt {
+ status = "okay";
+};
+
+&mac0 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rmii1_default>;
+ use-ncsi;
+};
+
+&mac1 {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
+};
+
+&adc {
+ status = "okay";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_adc0_default
+ &pinctrl_adc1_default
+ &pinctrl_adc2_default
+ &pinctrl_adc3_default
+ &pinctrl_adc4_default
+ &pinctrl_adc5_default
+ &pinctrl_adc6_default
+ &pinctrl_adc7_default
+ &pinctrl_adc8_default
+ &pinctrl_adc9_default
+ &pinctrl_adc10_default
+ &pinctrl_adc12_default
+ &pinctrl_adc13_default
+ &pinctrl_adc14_default>;
+};
+
+&i2c0 {
+ status = "okay";
+ /* temp1 inlet */
+ tmp75 at 4e {
+ compatible = "national,lm75";
+ reg = <0x4e>;
+ };
+};
+
+&i2c1 {
+ status = "okay";
+ /* temp2 outlet */
+ tmp75 at 4d {
+ compatible = "national,lm75";
+ reg = <0x4d>;
+ };
+};
+
+&i2c2 {
+ status = "okay";
+};
+
+&i2c3 {
+ status = "okay";
+};
+
+&i2c4 {
+ status = "okay";
+};
+
+&i2c5 {
+ status = "okay";
+};
+
+&i2c6 {
+ status = "okay";
+ /* Slot 0,
+ * Slot 1,
+ * Slot 2,
+ * Slot 3
+ */
+
+ i2c-switch at 70 {
+ compatible = "nxp,pca9545";
+ reg = <0x70>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect; /* may use mux at 70 next. */
+
+ i2c_rbp: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_fbp1: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_fbp2: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_fbp3: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c7 {
+ status = "okay";
+
+ /* Slot 0,
+ * Slot 1,
+ * Slot 2,
+ * Slot 3
+ */
+ i2c-switch at 76 {
+ compatible = "nxp,pca9546";
+ reg = <0x76>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ i2c-mux-idle-disconnect; /* may use mux at 76 next. */
+
+ i2c_riser2: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ i2c_pcie4: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ i2c_riser1: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ i2c_ocp: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+ };
+};
+
+&i2c8 {
+ status = "okay";
+
+ eeprom at 57 {
+ compatible = "atmel,24c256";
+ reg = <0x57>;
+ pagesize = <16>;
+ };
+};
+
+&i2c9 {
+ status = "okay";
+};
+
+&i2c10 {
+ status = "okay";
+};
+
+&i2c11 {
+ status = "okay";
+};
+
+&i2c12 {
+ status = "okay";
+};
+
+&ehci1 {
+ status = "okay";
+};
+
+&uhci {
+ status = "okay";
+};
+
+&gfx {
+ status = "okay";
+ memory-region = <&gfx_memory>;
+};
+
+&pwm_tacho {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm0_default
+ &pinctrl_pwm1_default
+ &pinctrl_pwm2_default
+ &pinctrl_pwm3_default
+ &pinctrl_pwm4_default
+ &pinctrl_pwm5_default
+ &pinctrl_pwm6_default>;
+
+ fan at 0 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x00>;
+ };
+
+ fan at 1 {
+ reg = <0x00>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x01>;
+ };
+
+ fan at 2 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x02>;
+ };
+
+ fan at 3 {
+ reg = <0x01>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x03>;
+ };
+
+ fan at 4 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x04>;
+ };
+
+ fan at 5 {
+ reg = <0x02>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x05>;
+ };
+
+ fan at 6 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x06>;
+ };
+
+ fan at 7 {
+ reg = <0x03>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x07>;
+ };
+
+ fan at 8 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x08>;
+ };
+
+ fan at 9 {
+ reg = <0x04>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x09>;
+ };
+
+ fan at 10 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
+ };
+
+ fan at 11 {
+ reg = <0x05>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
+ };
+
+ fan at 12 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
+ };
+
+ fan at 13 {
+ reg = <0x06>;
+ aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
+ };
+};
+
+&gpio {
+
+ pin_gpio_b5 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "IRQ_BMC_PCH_SMI_LPC_N";
+ };
+
+ pin_gpio_f0 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "IRQ_BMC_PCH_NMI_R";
+ };
+
+ pin_gpio_f3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "I2C_BUS0_RST_OUT_N";
+ };
+
+ pin_gpio_f4 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "FM_SKT0_FAULT_LED";
+ };
+
+ pin_gpio_f5 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "FM_SKT1_FAULT_LED";
+ };
+
+ pin_gpio_g4 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "FAN_PWR_CTL_N";
+ };
+
+ pin_gpio_g7 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "RST_BMC_PCIE_I2CMUX_N";
+ };
+
+ pin_gpio_h2 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PSU1_FFS_N_R";
+ };
+
+ pin_gpio_h3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PSU2_FFS_N_R";
+ };
+
+ pin_gpio_i3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "BMC_INTRUDED_COVER";
+ };
+
+ pin_gpio_j2 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "BMC_BIOS_UPDATE_N";
+ };
+
+ pin_gpio_j3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "RST_BMC_HDD_I2CMUX_N";
+ };
+
+ pin_gpio_s2 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "BMC_VGA_SW";
+ };
+
+ pin_gpio_s4 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
+ output;
+ line-name = "VBAT_EN_N";
+ };
+
+ pin_gpio_s6 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "PU_BMC_GPIOS6";
+ };
+
+ pin_gpio_y0 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "BMC_NCSI_MUX_CTL_S0";
+ };
+
+ pin_gpio_y1 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "BMC_NCSI_MUX_CTL_S1";
+ };
+
+ pin_gpio_z0 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "I2C_RISER2_INT_N";
+ };
+
+ pin_gpio_z2 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "I2C_RISER2_RESET_N";
+ };
+
+ pin_gpio_z3 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "FM_BMC_PCH_SCI_LPC_N";
+ };
+
+ pin_gpio_z7 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "BMC_POST_CMPLT_N";
+ };
+
+ pin_gpio_aa0 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "HOST_BMC_USB_SEL";
+ };
+
+ pin_gpio_aa5 {
+ gpio-hog;
+ gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "I2C_BUS1_RST_OUT_N";
+ };
+
+};
--
2.7.4
^ permalink raw reply related
* [PATCH v2] misc: aspeed-lpc-ctrl: Correct return values
From: Vijay Khemka @ 2019-05-03 18:13 UTC (permalink / raw)
To: linux-aspeed
Corrected some of return values with appropriate meanings and reported
relevant messages as debug information.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
---
drivers/misc/aspeed-lpc-ctrl.c | 14 +++++++-------
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/misc/aspeed-lpc-ctrl.c b/drivers/misc/aspeed-lpc-ctrl.c
index 332210e06e98..aca13779764a 100644
--- a/drivers/misc/aspeed-lpc-ctrl.c
+++ b/drivers/misc/aspeed-lpc-ctrl.c
@@ -93,8 +93,8 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
/* If memory-region is not described in device tree */
if (!lpc_ctrl->mem_size) {
- dev_err(dev, "Didn't find reserved memory\n");
- return -EINVAL;
+ dev_dbg(dev, "Didn't find reserved memory\n");
+ return -ENXIO;
}
map.size = lpc_ctrl->mem_size;
@@ -134,16 +134,16 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
if (map.window_type == ASPEED_LPC_CTRL_WINDOW_FLASH) {
if (!lpc_ctrl->pnor_size) {
- dev_err(dev, "Didn't find host pnor flash\n");
- return -EINVAL;
+ dev_dbg(dev, "Didn't find host pnor flash\n");
+ return -ENXIO;
}
addr = lpc_ctrl->pnor_base;
size = lpc_ctrl->pnor_size;
} else if (map.window_type == ASPEED_LPC_CTRL_WINDOW_MEMORY) {
/* If memory-region is not described in device tree */
if (!lpc_ctrl->mem_size) {
- dev_err(dev, "Didn't find reserved memory\n");
- return -EINVAL;
+ dev_dbg(dev, "Didn't find reserved memory\n");
+ return -ENXIO;
}
addr = lpc_ctrl->mem_base;
size = lpc_ctrl->mem_size;
@@ -239,7 +239,7 @@ static int aspeed_lpc_ctrl_probe(struct platform_device *pdev)
of_node_put(node);
if (rc) {
dev_err(dev, "Couldn't address to resource for reserved memory\n");
- return -ENOMEM;
+ return -ENXIO;
}
lpc_ctrl->mem_size = resource_size(&resm);
--
2.17.1
^ permalink raw reply related
* [PATCH] misc: aspeed-lpc-ctrl: Correct return values
From: Vijay Khemka @ 2019-05-03 17:55 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <6defa7bc-ec29-4418-b05c-fb96c03621f6@www.fastmail.com>
?On 5/1/19, 11:49 PM, "Andrew Jeffery" <andrew@aj.id.au> wrote:
On Thu, 2 May 2019, at 16:10, Greg Kroah-Hartman wrote:
> On Wed, May 01, 2019 at 03:38:36PM -0700, Vijay Khemka wrote:
> > Corrected some of return values with appropriate meanings.
> >
> > Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
> > ---
> > drivers/misc/aspeed-lpc-ctrl.c | 15 +++++++--------
> > 1 file changed, 7 insertions(+), 8 deletions(-)
> >
> > diff --git a/drivers/misc/aspeed-lpc-ctrl.c b/drivers/misc/aspeed-lpc-ctrl.c
> > index 332210e06e98..97ae341109d5 100644
> > --- a/drivers/misc/aspeed-lpc-ctrl.c
> > +++ b/drivers/misc/aspeed-lpc-ctrl.c
> > @@ -68,7 +68,6 @@ static long aspeed_lpc_ctrl_ioctl(struct file *file, unsigned int cmd,
> > unsigned long param)
> > {
> > struct aspeed_lpc_ctrl *lpc_ctrl = file_aspeed_lpc_ctrl(file);
> > - struct device *dev = file->private_data;
> > void __user *p = (void __user *)param;
> > struct aspeed_lpc_ctrl_mapping map;
> > u32 addr;
>
> This change is not reflected in your changelog text :(
>
> Please fix up, or break this up into multiple patches.
The return value fixes should also be squashed into the patch that introduced those lines
given it hasn't yet been applied.
Further, IIRC I previously suggested removing the dev_err()s entirely, not just switching
them to pr_err(). Returning an error code is enough IMO, there's no need to pollute the
kernel logs with application-level errors. Or make them dev_dbg().
Alright, I will replace with dev_dbg(), information can still be extracted by user with debug.
Andrew
>
> greg k-h
>
^ permalink raw reply
* [PATCH 1/6] thermal: Introduce devm_thermal_of_cooling_device_register
From: Daniel Lezcano @ 2019-05-03 8:04 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190501164843.GA16333@roeck-us.net>
On 01/05/2019 18:48, Guenter Roeck wrote:
> On Thu, Apr 18, 2019 at 12:58:15PM -0700, Guenter Roeck wrote:
>> thermal_of_cooling_device_register() and thermal_cooling_device_register()
>> are typically called from driver probe functions, and
>> thermal_cooling_device_unregister() is called from remove functions. This
>> makes both a perfect candidate for device managed functions.
>>
>> Introduce devm_thermal_of_cooling_device_register(). This function can
>> also be used to replace thermal_cooling_device_register() by passing a NULL
>> pointer as device node. The new function requires both struct device *
>> and struct device_node * as parameters since the struct device_node *
>> parameter is not always identical to dev->of_node.
>>
>> Don't introduce a device managed remove function since it is not needed
>> at this point.
>>
>
> Any feedback / thoughts / comments ?
Hi Guenter,
I have comments about your patch but I need some time to double check in
the current code how the 'of' and 'devm' are implemented.
--
<http://www.linaro.org/> Linaro.org ? Open source software for ARM SoCs
Follow Linaro: <http://www.facebook.com/pages/Linaro> Facebook |
<http://twitter.com/#!/linaroorg> Twitter |
<http://www.linaro.org/linaro-blog/> Blog
^ permalink raw reply
* Re: [PATCH 3/3] aspeed/pinctrl: Fix simultaneous DVO and serial outputs on AST2500 devices
From: Andrew Jeffery @ 2019-05-03 0:36 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1968156380.3538229.1556825858913.JavaMail.zimbra@raptorengineeringinc.com>
On Fri, 3 May 2019, at 05:07, Timothy Pearson wrote:
>
>
> ----- Original Message -----
> > From: "Andrew Jeffery" <andrew@aj.id.au>
> > To: "Timothy Pearson" <tpearson@raptorengineering.com>
> > Cc: "linux-aspeed" <linux-aspeed@lists.ozlabs.org>, "Ryan Chen" <ryan_chen@aspeedtech.com>
> > Sent: Thursday, May 2, 2019 1:40:39 AM
> > Subject: Re: [PATCH 3/3] aspeed/pinctrl: Fix simultaneous DVO and serial outputs on AST2500 devices
>
> > On Thu, 2 May 2019, at 16:03, Timothy Pearson wrote:
> >>
> >>
> >> ----- Original Message -----
> >> > From: "Andrew Jeffery" <andrew@aj.id.au>
> >> > To: "Timothy Pearson" <tpearson@raptorengineering.com>, "linux-aspeed"
> >> > <linux-aspeed@lists.ozlabs.org>, "Ryan Chen"
> >> > <ryan_chen@aspeedtech.com>
> >> > Sent: Thursday, May 2, 2019 12:51:00 AM
> >> > Subject: Re: [PATCH 3/3] aspeed/pinctrl: Fix simultaneous DVO and serial outputs
> >> > on AST2500 devices
> >>
> >> > On Thu, 2 May 2019, at 08:20, Timothy Pearson wrote:
> >> >> There appears to be a significant error in the pinmux table starting on
> >> >> page 127 of the AST2500 datasheet v1.6. Specifically, the COND2 (DVO)
> >> >> requirement is incorrectly applied to multiple digital video input (DVI)
> >> >> muxed pins, and no DVI-specific condition is provided. This results in
> >> >> the serial devices incorrectly overriding the DVO pinmuxes and disabling
> >> >> the DVO pins.
> >> >>
> >> >> Create a new condition code (COND6) for DVI enable, and update the most
> >> >> seriously affected pins to use the new condition code.
> >> >>
> >> >> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> >> >> ---
> >> >> drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 17 +++++++++--------
> >> >> 1 file changed, 9 insertions(+), 8 deletions(-)
> >> >>
> >> >> diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> >> >> b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> >> >> index 6f357a11e89a..676f90d3c5f3 100644
> >> >> --- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> >> >> +++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
> >> >> @@ -29,6 +29,7 @@
> >> >>
> >> >> #define COND1 { ASPEED_IP_SCU, SCU90, BIT(6), 0, 0 }
> >> >> #define COND2 { ASPEED_IP_SCU, SCU94, GENMASK(1, 0), 0, 0 }
> >> >> +#define COND6 { ASPEED_IP_SCU, SCU90, GENMASK(5, 4), 0, 0 }
> >> >>
> >> >> /* LHCR0 is offset from the end of the H8S/2168-compatible registers */
> >> >> #define LHCR0 0x20
> >> >> @@ -660,8 +661,8 @@ SSSF_PIN_DECL(T2, GPIOL0, NCTS1, SIG_DESC_SET(SCU84, 16));
> >> >>
> >> >> #define T1 89
> >> >> #define T1_DESC SIG_DESC_SET(SCU84, 17)
> >> >> -SIG_EXPR_LIST_DECL_SINGLE(VPIDE, VPI24, VPI_24_RSVD_DESC, T1_DESC, COND2);
> >> >> -SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T1_DESC, COND2);
> >> >> +SIG_EXPR_LIST_DECL_SINGLE(VPIDE, VPI24, VPI_24_RSVD_DESC, T1_DESC, COND6);
> >> >> +SIG_EXPR_LIST_DECL_SINGLE(NDCD1, NDCD1, T1_DESC, COND6);
> >> >
> >> > I feel like you didn't test this patch, because VPI_24_RSVD_DESC (the DVI
> >> > condition)
> >> > requires SCU90[5]=0b1, but your introduction of COND6 requires SCU90[5:4]=0b00
> >> > for
> >> > the mux configuration to succeed. This can't work - bit 5 of SCU90 can not
> >> > simultaneously take the values 1 and 0.
> >>
> >> That's correct -- I don't have hardware that supports DVI available to
> >> test with.
> >
> > Okay. In that case I'm not prepared to ACK changes here, much less changes with
> > that fail in this way. The current implementation at least follows what is
> > dictated by
> > the programming guide and is at least correct in theory.
> >
> > As Ryan is not confident there are no negative side-effects to not following the
> > configuration dictated by the programming guide, changes like this have a real
> > up-hill battle on their hands.
> >
> > Cheers,
> >
> > Andrew
>
> There is a negative effect right now in that enabling either UART will
> force disable the DVO pinmuxes. While I agree the patch needs
> additional work, as it stands right now DVO will not function
> simultaneously with the UART without a patched kernel.
>
> From where I stand I am fairly confident in a documentation error,
> however I do not have access to the hardware required to prove this.
> Can someone at ASpeed look at the HDL and verify or correct the
> documentation? We have already caught one documentation error relating
> to COND2 and DVO, and verified that one in hardware.
Right - it's odd that there's a dependency on COND2 when COND2 relates to
VPO, but the pins in question are VPI pins, and you're not interested in VPI.
Ryan and I have spoken about it but he's deferred to the designer's opinion
which is that we should follow what's specified in the datasheet.
Given the complexity of the pinmux I'm going to set the bar for accepting these
patches at "you need to convince Aspeed to correct the programming guide".
I understand that might be annoying, but I need to be conservative to cater to
the stability of everyone's use-cases, and not just accept patches contrary to the
datasheet to enable your "conflicting" design. I appreciate that your experiments
indicate the datasheet is misleading in some circumstances, but let's get Aspeed
on board with that.
Andrew
^ permalink raw reply
* [PATCH 2/2] drm/aspeed: Add DVO output option to GFX driver
From: Andrew Jeffery @ 2019-05-02 22:34 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <671575004.3553124.1556833901812.JavaMail.zimbra@raptorengineeringinc.com>
On Fri, 3 May 2019, at 07:21, Timothy Pearson wrote:
> The AST2500 offers an alternate GFX output mode over DVO.
> Enable DVO or VGA output mode conditionally based on two new
> device tree properties, output-vga and output-dvo.
You can't add properties without updating the bindings documentation.
Please fix this, and make sure to Cc the devicetree maintainers
(./scripts/get_maintainer.pl).
>
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx.h | 6 ++++++
> drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 29 +++++++++++++++++++++++------
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 17 ++++++++++++++++-
> 3 files changed, 45 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> index b34c97613aaf..6f9bc01191c0 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> @@ -14,6 +14,8 @@ struct aspeed_gfx {
> struct drm_simple_display_pipe pipe;
> struct drm_connector connector;
> struct drm_fbdev_cma *fbdev;
> +
> + u8 output_mode;
> };
>
> int aspeed_gfx_create_pipe(struct drm_device *drm);
> @@ -105,3 +107,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
>
> /* Default Threshold Seting */
> #define G5_CRT_THROD_VAL (CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3C))
> +
> +/* Output mode */
> +#define OUTPUT_VGA 0x1
> +#define OUTPUT_DVO 0x2
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> index 15db9e426ec4..ee16f9011d70 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> // Copyright 2018 IBM Corporation
> +// Copyright 2019 Raptor Engineering, LLC
>
> #include <linux/clk.h>
> #include <linux/reset.h>
> @@ -59,11 +60,21 @@ static void aspeed_gfx_enable_controller(struct
> aspeed_gfx *priv)
> u32 ctrl1 = readl(priv->base + CRT_CTRL1);
> u32 ctrl2 = readl(priv->base + CRT_CTRL2);
>
> - /* SCU2C: set DAC source for display output to Graphics CRT (GFX) */
> - regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
> + if (priv->output_mode & OUTPUT_VGA) {
> + /* SCU2C: set DAC source for display output to Graphics CRT (GFX) */
> + regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
> + }
> + if (priv->output_mode & OUTPUT_DVO) {
> + /* SCU2C: set DVO source for display output to Graphics CRT (GFX) */
> + regmap_update_bits(priv->scu, 0x2c, BIT(18), BIT(18));
> + }
>
> writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1);
> - writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
> +
> + if (priv->output_mode & OUTPUT_VGA)
> + writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
> + if (priv->output_mode & OUTPUT_DVO)
> + writel(ctrl2 | CRT_CTRL_DVO_EN, priv->base + CRT_CTRL2);
I'm mildly concerned about the use of writel() given that the GFX MMIO region
is covered by a regmap to assist pinmux.
Joel, can you expand on this? I know you're not a fan of regmap, but IMO we
should be consistent.
$ git grep CRT_CTRL2 -- drivers/gpu/drm/aspeed/
drivers/gpu/drm/aspeed/aspeed_gfx.h:#define CRT_CTRL2 0x64 /* CRT Control II */
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c: u32 ctrl2 = readl(priv->base + CRT_CTRL2);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c: writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c: u32 ctrl2 = readl(priv->base + CRT_CTRL2);
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c: writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c: writel(0, priv->base + CRT_CTRL2);
Andrew
> }
>
> static void aspeed_gfx_disable_controller(struct aspeed_gfx *priv)
> @@ -72,9 +83,15 @@ static void aspeed_gfx_disable_controller(struct
> aspeed_gfx *priv)
> u32 ctrl2 = readl(priv->base + CRT_CTRL2);
>
> writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1);
> - writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
> -
> - regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
> + if (priv->output_mode & OUTPUT_VGA)
> + writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
> + if (priv->output_mode & OUTPUT_DVO)
> + writel(ctrl2 & ~CRT_CTRL_DVO_EN, priv->base + CRT_CTRL2);
> +
> + if (priv->output_mode & OUTPUT_VGA)
> + regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
> + if (priv->output_mode & OUTPUT_DVO)
> + regmap_update_bits(priv->scu, 0x2c, BIT(18), 0);
> }
>
> static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv)
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> index 7e9072fd0ef0..17a22dd0922a 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> // Copyright 2018 IBM Corporation
> +// Copyright 2019 Raptor Engineering, LLC
>
> #include <linux/clk.h>
> #include <linux/dma-mapping.h>
> @@ -50,7 +51,8 @@
> * is the ARM's internal display controller.
> *
> * The driver only supports a simple configuration consisting of a 40MHz
> - * pixel clock, fixed by hardware limitations, and the VGA output path.
> + * pixel clock, fixed by hardware limitations. It supports DVO output
> + * mode as well based on device tree configuration.
> *
> * The driver was written with the 'AST2500 Software Programming Guide' v17,
> * which is available under NDA from ASPEED.
> @@ -95,6 +97,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
> static int aspeed_gfx_load(struct drm_device *drm)
> {
> struct platform_device *pdev = to_platform_device(drm->dev);
> + struct device_node *nc = drm->dev->of_node;
> struct aspeed_gfx *priv;
> struct resource *res;
> int ret;
> @@ -145,6 +148,18 @@ static int aspeed_gfx_load(struct drm_device *drm)
> }
> clk_prepare_enable(priv->clk);
>
> + if (of_property_read_bool(nc, "output-vga"))
> + priv->output_mode |= OUTPUT_VGA;
> + else if (of_property_read_bool(nc, "output-dvo"))
> + priv->output_mode |= OUTPUT_DVO;
> + else
> + priv->output_mode = OUTPUT_VGA;
> +
> + if (priv->output_mode & OUTPUT_VGA)
> + DRM_INFO("Enabling VGA output\n");
> + if (priv->output_mode & OUTPUT_DVO)
> + DRM_INFO("Enabling DVO output\n");
> +
> /* Sanitize control registers */
> writel(0, priv->base + CRT_CTRL1);
> /* Preserve CRT_CTRL2[7:6] (DVO configuration) */
> --
> 2.11.0
>
^ permalink raw reply
* [PATCH 1/2] [v2] drm/aspeed: Preserve DVO configuration bits during initialization
From: Timothy Pearson @ 2019-05-02 22:27 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <e7bf0b26-ca0a-4694-b150-21be7f5bf661@www.fastmail.com>
----- Original Message -----
> From: "Andrew Jeffery" <andrew@aj.id.au>
> To: "Timothy Pearson" <tpearson@raptorengineering.com>, "linux-aspeed" <linux-aspeed@lists.ozlabs.org>
> Sent: Thursday, May 2, 2019 5:24:02 PM
> Subject: Re: [PATCH 1/2] [v2] drm/aspeed: Preserve DVO configuration bits during initialization
> Hi Timothy,
>
> A few of things:
>
> 1. Please run ./scripts/checkpatch.pl over your patches before sending
> 2. Version your series coherently - having [v2] of one patch in the series threw
> me out. Please use `git format-patch -vX`, it will handle this for you
> automatically.
> 3. For multi-patch series I suggest using a cover letter - this helps thread
> them
> in a sane manner. It's also a great place to describe what you're trying to
> achieve with the series
> 4. Please use ./scripts/get_maintainer.pl to find the right people and lists to
> which to send patches.
>
> In this case Joel will pick the patch up, but it's better if you have him either
> in To: or Cc: as you're more likely to get his attention this way.
>
> Generally, a lot of this is covered in the kernel's documentation - dig around
> under Documentation/process.
No problem, will do. Was taking some shortcuts here to meet a couple of deadlines, and was mostly looking for feedback on approach :) If the patch is good as-is or with minor changes, of course I'm also OK with a merge.
> Aside from that, some minor style points below:
>
> On Fri, 3 May 2019, at 07:21, Timothy Pearson wrote:
>> GFX064 contains DVO enable and mode bits. These are hardware specific,
>> configured
>
> This should be wrapped at 75 chars
>
>> via the pinmux from the DT, and should not be cleared during startup.
>>
>> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
>> ---
>> drivers/gpu/drm/aspeed/aspeed_gfx.h | 3 +++
>> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 5 ++++-
>> 2 files changed, 7 insertions(+), 1 deletion(-)
>>
>> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h
>> b/drivers/gpu/drm/aspeed/aspeed_gfx.h
>> index b7a986e49177..b34c97613aaf 100644
>> --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
>> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
>> @@ -1,5 +1,6 @@
>> // SPDX-License-Identifier: GPL-2.0+
>> // Copyright 2018 IBM Corporation
>> +// Copyright 2019 Raptor Engineering, LLC
>>
>> #include <drm/drm_device.h>
>> #include <drm/drm_simple_kms_helper.h>
>> @@ -73,6 +74,8 @@ int aspeed_gfx_create_output(struct drm_device *drm);
>>
>> /* CTRL2 */
>> #define CRT_CTRL_DAC_EN BIT(0)
>> +#define CRT_CTRL_DVO_MODE BIT(6)
>> +#define CRT_CTRL_DVO_EN BIT(7)
>> #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
>> #define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
>>
>> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
>> b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
>> index 713a3975852b..7e9072fd0ef0 100644
>> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
>> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
>> @@ -98,6 +98,7 @@ static int aspeed_gfx_load(struct drm_device *drm)
>> struct aspeed_gfx *priv;
>> struct resource *res;
>> int ret;
>> + u32 reg;
>
> This breaks the reverse-christmas-tree ordering, but that's getting quite
> pedantic.
>
>>
>> priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
>> if (!priv)
>> @@ -146,7 +147,9 @@ static int aspeed_gfx_load(struct drm_device *drm)
>>
>> /* Sanitize control registers */
>> writel(0, priv->base + CRT_CTRL1);
>> - writel(0, priv->base + CRT_CTRL2);
>> + /* Preserve CRT_CTRL2[7:6] (DVO configuration) */
>> + reg = readl(priv->base + CRT_CTRL2) & (CRT_CTRL_DVO_MODE | CRT_CTRL_DVO_EN);
>
> Should be wrapped at 80 chars.
>
> Other than that,
>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
>
>> + writel(reg, priv->base + CRT_CTRL2);
>>
>> aspeed_gfx_setup_mode_config(drm);
>>
>> --
>> 2.11.0
^ permalink raw reply
* Re: [PATCH 1/2] [v2] drm/aspeed: Preserve DVO configuration bits during initialization
From: Andrew Jeffery @ 2019-05-02 22:24 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <1731023470.3553122.1556833875705.JavaMail.zimbra@raptorengineeringinc.com>
Hi Timothy,
A few of things:
1. Please run ./scripts/checkpatch.pl over your patches before sending
2. Version your series coherently - having [v2] of one patch in the series threw
me out. Please use `git format-patch -vX`, it will handle this for you
automatically.
3. For multi-patch series I suggest using a cover letter - this helps thread them
in a sane manner. It's also a great place to describe what you're trying to
achieve with the series
4. Please use ./scripts/get_maintainer.pl to find the right people and lists to
which to send patches.
In this case Joel will pick the patch up, but it's better if you have him either
in To: or Cc: as you're more likely to get his attention this way.
Generally, a lot of this is covered in the kernel's documentation - dig around
under Documentation/process.
Aside from that, some minor style points below:
On Fri, 3 May 2019, at 07:21, Timothy Pearson wrote:
> GFX064 contains DVO enable and mode bits. These are hardware specific,
> configured
This should be wrapped at 75 chars
> via the pinmux from the DT, and should not be cleared during startup.
>
> Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx.h | 3 +++
> drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 5 ++++-
> 2 files changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> index b7a986e49177..b34c97613aaf 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> @@ -1,5 +1,6 @@
> // SPDX-License-Identifier: GPL-2.0+
> // Copyright 2018 IBM Corporation
> +// Copyright 2019 Raptor Engineering, LLC
>
> #include <drm/drm_device.h>
> #include <drm/drm_simple_kms_helper.h>
> @@ -73,6 +74,8 @@ int aspeed_gfx_create_output(struct drm_device *drm);
>
> /* CTRL2 */
> #define CRT_CTRL_DAC_EN BIT(0)
> +#define CRT_CTRL_DVO_MODE BIT(6)
> +#define CRT_CTRL_DVO_EN BIT(7)
> #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
> #define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> index 713a3975852b..7e9072fd0ef0 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
> @@ -98,6 +98,7 @@ static int aspeed_gfx_load(struct drm_device *drm)
> struct aspeed_gfx *priv;
> struct resource *res;
> int ret;
> + u32 reg;
This breaks the reverse-christmas-tree ordering, but that's getting quite pedantic.
>
> priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
> if (!priv)
> @@ -146,7 +147,9 @@ static int aspeed_gfx_load(struct drm_device *drm)
>
> /* Sanitize control registers */
> writel(0, priv->base + CRT_CTRL1);
> - writel(0, priv->base + CRT_CTRL2);
> + /* Preserve CRT_CTRL2[7:6] (DVO configuration) */
> + reg = readl(priv->base + CRT_CTRL2) & (CRT_CTRL_DVO_MODE | CRT_CTRL_DVO_EN);
Should be wrapped at 80 chars.
Other than that,
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> + writel(reg, priv->base + CRT_CTRL2);
>
> aspeed_gfx_setup_mode_config(drm);
>
> --
> 2.11.0
>
^ permalink raw reply
* [PATCH 2/2] drm/aspeed: Add DVO output option to GFX driver
From: Timothy Pearson @ 2019-05-02 21:51 UTC (permalink / raw)
To: linux-aspeed
The AST2500 offers an alternate GFX output mode over DVO.
Enable DVO or VGA output mode conditionally based on two new
device tree properties, output-vga and output-dvo.
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
---
drivers/gpu/drm/aspeed/aspeed_gfx.h | 6 ++++++
drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c | 29 +++++++++++++++++++++++------
drivers/gpu/drm/aspeed/aspeed_gfx_drv.c | 17 ++++++++++++++++-
3 files changed, 45 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
index b34c97613aaf..6f9bc01191c0 100644
--- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
+++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
@@ -14,6 +14,8 @@ struct aspeed_gfx {
struct drm_simple_display_pipe pipe;
struct drm_connector connector;
struct drm_fbdev_cma *fbdev;
+
+ u8 output_mode;
};
int aspeed_gfx_create_pipe(struct drm_device *drm);
@@ -105,3 +107,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
/* Default Threshold Seting */
#define G5_CRT_THROD_VAL (CRT_THROD_LOW(0x24) | CRT_THROD_HIGH(0x3C))
+
+/* Output mode */
+#define OUTPUT_VGA 0x1
+#define OUTPUT_DVO 0x2
diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
index 15db9e426ec4..ee16f9011d70 100644
--- a/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
+++ b/drivers/gpu/drm/aspeed/aspeed_gfx_crtc.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright 2018 IBM Corporation
+// Copyright 2019 Raptor Engineering, LLC
#include <linux/clk.h>
#include <linux/reset.h>
@@ -59,11 +60,21 @@ static void aspeed_gfx_enable_controller(struct aspeed_gfx *priv)
u32 ctrl1 = readl(priv->base + CRT_CTRL1);
u32 ctrl2 = readl(priv->base + CRT_CTRL2);
- /* SCU2C: set DAC source for display output to Graphics CRT (GFX) */
- regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
+ if (priv->output_mode & OUTPUT_VGA) {
+ /* SCU2C: set DAC source for display output to Graphics CRT (GFX) */
+ regmap_update_bits(priv->scu, 0x2c, BIT(16), BIT(16));
+ }
+ if (priv->output_mode & OUTPUT_DVO) {
+ /* SCU2C: set DVO source for display output to Graphics CRT (GFX) */
+ regmap_update_bits(priv->scu, 0x2c, BIT(18), BIT(18));
+ }
writel(ctrl1 | CRT_CTRL_EN, priv->base + CRT_CTRL1);
- writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
+
+ if (priv->output_mode & OUTPUT_VGA)
+ writel(ctrl2 | CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
+ if (priv->output_mode & OUTPUT_DVO)
+ writel(ctrl2 | CRT_CTRL_DVO_EN, priv->base + CRT_CTRL2);
}
static void aspeed_gfx_disable_controller(struct aspeed_gfx *priv)
@@ -72,9 +83,15 @@ static void aspeed_gfx_disable_controller(struct aspeed_gfx *priv)
u32 ctrl2 = readl(priv->base + CRT_CTRL2);
writel(ctrl1 & ~CRT_CTRL_EN, priv->base + CRT_CTRL1);
- writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
-
- regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
+ if (priv->output_mode & OUTPUT_VGA)
+ writel(ctrl2 & ~CRT_CTRL_DAC_EN, priv->base + CRT_CTRL2);
+ if (priv->output_mode & OUTPUT_DVO)
+ writel(ctrl2 & ~CRT_CTRL_DVO_EN, priv->base + CRT_CTRL2);
+
+ if (priv->output_mode & OUTPUT_VGA)
+ regmap_update_bits(priv->scu, 0x2c, BIT(16), 0);
+ if (priv->output_mode & OUTPUT_DVO)
+ regmap_update_bits(priv->scu, 0x2c, BIT(18), 0);
}
static void aspeed_gfx_crtc_mode_set_nofb(struct aspeed_gfx *priv)
diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
index 7e9072fd0ef0..17a22dd0922a 100644
--- a/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
+++ b/drivers/gpu/drm/aspeed/aspeed_gfx_drv.c
@@ -1,5 +1,6 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright 2018 IBM Corporation
+// Copyright 2019 Raptor Engineering, LLC
#include <linux/clk.h>
#include <linux/dma-mapping.h>
@@ -50,7 +51,8 @@
* is the ARM's internal display controller.
*
* The driver only supports a simple configuration consisting of a 40MHz
- * pixel clock, fixed by hardware limitations, and the VGA output path.
+ * pixel clock, fixed by hardware limitations. It supports DVO output
+ * mode as well based on device tree configuration.
*
* The driver was written with the 'AST2500 Software Programming Guide' v17,
* which is available under NDA from ASPEED.
@@ -95,6 +97,7 @@ static irqreturn_t aspeed_gfx_irq_handler(int irq, void *data)
static int aspeed_gfx_load(struct drm_device *drm)
{
struct platform_device *pdev = to_platform_device(drm->dev);
+ struct device_node *nc = drm->dev->of_node;
struct aspeed_gfx *priv;
struct resource *res;
int ret;
@@ -145,6 +148,18 @@ static int aspeed_gfx_load(struct drm_device *drm)
}
clk_prepare_enable(priv->clk);
+ if (of_property_read_bool(nc, "output-vga"))
+ priv->output_mode |= OUTPUT_VGA;
+ else if (of_property_read_bool(nc, "output-dvo"))
+ priv->output_mode |= OUTPUT_DVO;
+ else
+ priv->output_mode = OUTPUT_VGA;
+
+ if (priv->output_mode & OUTPUT_VGA)
+ DRM_INFO("Enabling VGA output\n");
+ if (priv->output_mode & OUTPUT_DVO)
+ DRM_INFO("Enabling DVO output\n");
+
/* Sanitize control registers */
writel(0, priv->base + CRT_CTRL1);
/* Preserve CRT_CTRL2[7:6] (DVO configuration) */
--
2.11.0
^ permalink raw reply related
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