* [PATCH] ARM: dts: aspeed: tiogapass: Move battery sensor
From: Vijay Khemka @ 2019-07-25 17:45 UTC (permalink / raw)
To: linux-aspeed
Moved adc7 hwmon battery sensor to correct label to be read
by single applications for all adc sensors.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
---
arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts | 6 +-----
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
index d0c823e8fce5..682f729ea25e 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
@@ -46,13 +46,9 @@
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
- <&adc 4>, <&adc 5>, <&adc 6>;
+ <&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
};
- iio-hwmon-battery {
- compatible = "iio-hwmon";
- io-channels = <&adc 7>;
- };
};
&fmc {
--
2.17.1
^ permalink raw reply related
* [PATCH 03/12] drm: aspeed_gfx: Fix misuse of GENMASK macro
From: Joe Perches @ 2019-07-25 14:37 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <CACPK8Xd3+iwkuw-Ofwf+Hy1Ez5-1pBvnk_G4xT72ZQdOVd7Sag@mail.gmail.com>
On Thu, 2019-07-25 at 02:52 +0000, Joel Stanley wrote:
> On Thu, 25 Jul 2019 at 01:18, Joe Perches <joe@perches.com> wrote:
> > On Thu, 2019-07-25 at 10:40 +0930, Andrew Jeffery wrote:
> > > On Thu, 25 Jul 2019, at 02:46, Joe Perches wrote:
> > > > On Tue, 2019-07-09 at 22:04 -0700, Joe Perches wrote:
> > > > > Arguments are supposed to be ordered high then low.
> > > > >
> > > > > Signed-off-by: Joe Perches <joe@perches.com>
> > > > > ---
> > > > > drivers/gpu/drm/aspeed/aspeed_gfx.h | 2 +-
> > > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > > >
> > > > > diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > > > index a10358bb61ec..095ea03e5833 100644
> > > > > --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > > > +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > > > @@ -74,7 +74,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
> > > > > /* CTRL2 */
> > > > > #define CRT_CTRL_DAC_EN BIT(0)
> > > > > #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
> > > > > -#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
> > > > > +#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(31, 20)
> > >
> > > Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
> >
> > This hardly needs a review, it needs to be applied.
> > There's a nominal git tree for aspeed here:
> >
> > T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git
> >
> > But who's going to do apply this?
>
> This is a DRM patch, so it goes through the DRM tree. I am a
> co-maintainer there and can apply it once I remember how to drive the
> tools.
>
> (FYI, this macro is not used by the current driver).
Then perhaps CRT_CTRL_VBLANK and _MASK defines
should be removed instead.
cheers, Joe
^ permalink raw reply
* [PATCH linux dev-5.2] ARM: dts: aspeed: swift: Fix FSI GPIOs
From: Adriana Kobylak @ 2019-07-25 13:41 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <7f2c08f5-a04d-499c-b59b-3d62d7f025af@www.fastmail.com>
On 2019-07-23 19:32, Andrew Jeffery wrote:
> On Sat, 20 Jul 2019, at 06:01, Matt Spinler wrote:
>> From: Matt Spinler <spinler@us.ibm.com>
>>
>> Change the FSI clock and data GPIOs to match what the hardware turned
>> out to use.
>>
>> Signed-off-by: Matt Spinler <spinler@us.ibm.com>
>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Adriana Kobylak <anoo@us.ibm.com>
Schematics have been updated.
>
> And yeah, please make sure to include relevant lists in the future as
> Olof
> mentioned.
>
> Andrew
>
>> ---
>> arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 4 ++--
>> 1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>> b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>> index caac895c60b4..f14f745b34ca 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
>> @@ -207,8 +207,8 @@
>> #size-cells = <0>;
>> no-gpio-delays;
>>
>> - clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
>> - data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
>> + clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
>> + data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
>> mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
>> enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
>> trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
>> --
>> 2.22.0
>>
>>
^ permalink raw reply
* [PATCH v2 2/2] mmc: Add support for the ASPEED SD controller
From: Adrian Hunter @ 2019-07-25 13:18 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190712033214.24713-3-andrew@aj.id.au>
On 12/07/19 6:32 AM, Andrew Jeffery wrote:
> Add a minimal driver for ASPEED's SD controller, which exposes two
> SDHCIs.
>
> The ASPEED design implements a common register set for the SDHCIs, and
> moves some of the standard configuration elements out to this common
> area (e.g. 8-bit mode, and card detect configuration which is not
> currently supported).
>
> The SD controller has a dedicated hardware interrupt that is shared
> between the slots. The common register set exposes information on which
> slot triggered the interrupt; early revisions of the patch introduced an
> irqchip for the register, but reality is it doesn't behave as an
> irqchip, and the result fits awkwardly into the irqchip APIs. Instead
> I've taken the simple approach of using the IRQ as a shared IRQ with
> some minor performance impact for the second slot.
>
> Ryan was the original author of the patch - I've taken his work and
> massaged it to drop the irqchip support and rework the devicetree
> integration. The driver has been smoke tested under qemu against a
> minimal SD controller model and lightly tested on an ast2500-evb.
>
> Signed-off-by: Ryan Chen <ryanchen.aspeed@gmail.com>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Looks fine. Few minor comments below.
> ---
> In v2:
>
> * Drop unnecesasry MODULE_DEVICE_TABLE()
> * Rename sd-controller compatible
> * Add IBM copyright
> * Drop unnecesary data assignment in of match table entries
> * Derive the slot from the SDHCI offset
>
> drivers/mmc/host/Kconfig | 12 ++
> drivers/mmc/host/Makefile | 1 +
> drivers/mmc/host/sdhci-of-aspeed.c | 326 +++++++++++++++++++++++++++++
> 3 files changed, 339 insertions(+)
> create mode 100644 drivers/mmc/host/sdhci-of-aspeed.c
>
> diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
> index 931770f17087..2bb5e1264b3d 100644
> --- a/drivers/mmc/host/Kconfig
> +++ b/drivers/mmc/host/Kconfig
> @@ -154,6 +154,18 @@ config MMC_SDHCI_OF_ARASAN
>
> If unsure, say N.
>
> +config MMC_SDHCI_OF_ASPEED
> + tristate "SDHCI OF support for the ASPEED SDHCI controller"
> + depends on MMC_SDHCI_PLTFM
> + depends on OF
> + help
> + This selects the ASPEED Secure Digital Host Controller Interface.
> +
> + If you have a controller with this interface, say Y or M here. You
> + also need to enable an appropriate bus interface.
> +
> + If unsure, say N.
> +
> config MMC_SDHCI_OF_AT91
> tristate "SDHCI OF support for the Atmel SDMMC controller"
> depends on MMC_SDHCI_PLTFM
> diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
> index 73578718f119..390ee162fe71 100644
> --- a/drivers/mmc/host/Makefile
> +++ b/drivers/mmc/host/Makefile
> @@ -84,6 +84,7 @@ obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
> obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o
> obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
> obj-$(CONFIG_MMC_SDHCI_OF_ARASAN) += sdhci-of-arasan.o
> +obj-$(CONFIG_MMC_SDHCI_OF_ASPEED) += sdhci-of-aspeed.o
> obj-$(CONFIG_MMC_SDHCI_OF_AT91) += sdhci-of-at91.o
> obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
> obj-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o
> diff --git a/drivers/mmc/host/sdhci-of-aspeed.c b/drivers/mmc/host/sdhci-of-aspeed.c
> new file mode 100644
> index 000000000000..9528e43c257d
> --- /dev/null
> +++ b/drivers/mmc/host/sdhci-of-aspeed.c
> @@ -0,0 +1,326 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +/* Copyright (C) 2019 ASPEED Technology Inc. */
> +/* Copyright (C) 2019 IBM Corp. */
> +
> +#include <linux/clk.h>
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/io.h>
> +#include <linux/mmc/host.h>
> +#include <linux/module.h>
> +#include <linux/of_address.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/platform_device.h>
> +#include <linux/spinlock.h>
> +
> +#include "sdhci-pltfm.h"
> +
> +#define ASPEED_SDC_INFO 0x00
> +#define ASPEED_SDC_S1MMC8 BIT(25)
> +#define ASPEED_SDC_S0MMC8 BIT(24)
> +
> +struct aspeed_sdc {
> + struct clk *clk;
> + struct resource *res;
> +
> + spinlock_t lock;
> + void __iomem *regs;
> +};
> +
> +struct aspeed_sdhci {
> + struct aspeed_sdc *parent;
> + u32 width_mask;
> +};
> +
> +static void aspeed_sdc_bus_width(struct aspeed_sdc *sdc,
> + struct aspeed_sdhci *sdhci, bool bus8)
The function name threw me at first. I suggest:
static void aspeed_sdhci_set_clr_8_bit_mode(struct aspeed_sdhci *aspeed_sdhci,
bool bus8)
{
struct aspeed_sdc *aspeed_sdc = aspeed_sdhci->parent;
> +{
> + u32 info;
> +
> + /* Set/clear 8 bit mode */
> + spin_lock(&sdc->lock);
> + info = readl(sdc->regs + ASPEED_SDC_INFO);
> + if (bus8)
> + info |= sdhci->width_mask;
> + else
> + info &= ~sdhci->width_mask;
> + writel(info, sdc->regs + ASPEED_SDC_INFO);
> + spin_unlock(&sdc->lock);
> +}
> +
> +static void aspeed_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
> +{
> + unsigned long timeout;
> + int div;
> + u16 clk;
> +
> + if (clock == host->clock)
> + return;
> +
> + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL);
> +
> + if (clock == 0)
> + goto out;
> +
> + for (div = 1; div < 256; div *= 2) {
> + if ((host->max_clk / div) <= clock)
> + break;
> + }
> + div >>= 1;
> +
> + clk = div << SDHCI_DIVIDER_SHIFT;
Could call sdhci_enable_clk() here.
> + clk |= SDHCI_CLOCK_INT_EN;
> + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> +
> + /* Wait max 20 ms */
> + timeout = 20;
> + while (!((clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL))
> + & SDHCI_CLOCK_INT_STABLE)) {
> + if (timeout == 0) {
> + pr_err("%s: Internal clock never stabilised.\n",
> + mmc_hostname(host->mmc));
> + return;
> + }
> + timeout--;
> + mdelay(1);
> + }
> +
> + clk |= SDHCI_CLOCK_CARD_EN;
> + sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL);
> +
> +out:
> + host->clock = clock;
> +}
> +
> +static void aspeed_sdhci_set_bus_width(struct sdhci_host *host, int width)
> +{
> + struct sdhci_pltfm_host *pltfm_priv;
> + struct aspeed_sdhci *aspeed_sdhci;
> + struct aspeed_sdc *aspeed_sdc;
> + u8 ctrl;
> +
> + pltfm_priv = sdhci_priv(host);
> + aspeed_sdhci = sdhci_pltfm_priv(pltfm_priv);
> + aspeed_sdc = aspeed_sdhci->parent;
> +
> + /* Set/clear 8-bit mode */
> + aspeed_sdc_bus_width(aspeed_sdc, aspeed_sdhci,
> + width == MMC_BUS_WIDTH_8);
> +
> + /* Set/clear 1 or 4 bit mode */
> + ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
> + if (width == MMC_BUS_WIDTH_4)
> + ctrl |= SDHCI_CTRL_4BITBUS;
> + else
> + ctrl &= ~SDHCI_CTRL_4BITBUS;
> + sdhci_writeb(host, ctrl, SDHCI_HOST_CONTROL);
> +}
> +
> +static const struct sdhci_ops aspeed_sdhci_ops = {
> + .set_clock = aspeed_sdhci_set_clock,
> + .get_max_clock = sdhci_pltfm_clk_get_max_clock,
> + .set_bus_width = aspeed_sdhci_set_bus_width,
> + .get_timeout_clock = sdhci_pltfm_clk_get_max_clock,
> + .reset = sdhci_reset,
> + .set_uhs_signaling = sdhci_set_uhs_signaling,
> +};
> +
> +static const struct sdhci_pltfm_data aspeed_sdc_pdata = {
Up to you, but this is for the aspeed_sdhci driver, so I would
have expected it to be called aspeed_sdhci_pdata
> + .ops = &aspeed_sdhci_ops,
> + .quirks = SDHCI_QUIRK_CAP_CLOCK_BASE_BROKEN,
> + .quirks2 = SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN,
You don't use sdhci_set_clock() or sdhci_calc_clk(), so it doesn't
look like SDHCI_QUIRK2_CLOCK_DIV_ZERO_BROKEN is needed.
> +};
> +
> +static inline int aspeed_sdhci_calculate_slot(struct aspeed_sdhci *dev,
> + struct resource *res)
> +{
> + resource_size_t delta;
> +
> + if (!res || resource_type(res) != IORESOURCE_MEM)
> + return -EINVAL;
> +
> + if (res->start < dev->parent->res->start)
> + return -EINVAL;
> +
> + delta = res->start - dev->parent->res->start;
> + if (delta & (0x100 - 1))
> + return -EINVAL;
> +
> + return (delta / 0x100) - 1;
> +}
> +
> +static int aspeed_sdhci_probe(struct platform_device *pdev)
> +{
> + struct sdhci_pltfm_host *pltfm_host;
> + struct aspeed_sdhci *dev;
> + struct sdhci_host *host;
> + struct resource *res;
> + int slot;
> + int ret;
> +
> + host = sdhci_pltfm_init(pdev, &aspeed_sdc_pdata, sizeof(*dev));
> + if (IS_ERR(host))
> + return PTR_ERR(host);
> +
> + pltfm_host = sdhci_priv(host);
> + dev = sdhci_pltfm_priv(pltfm_host);
> + dev->parent = dev_get_drvdata(pdev->dev.parent);
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + slot = aspeed_sdhci_calculate_slot(dev, res);
> + if (slot < 0)
> + return slot;
> + dev_info(&pdev->dev, "Configuring for slot %d\n", slot);
> + dev->width_mask = !slot ? ASPEED_SDC_S0MMC8 : ASPEED_SDC_S1MMC8;
That implies that you only support 2 slots which begs the question why
you don't validate slot.
> +
> + sdhci_get_of_property(pdev);
> +
> + pltfm_host->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(pltfm_host->clk))
> + return PTR_ERR(pltfm_host->clk);
> +
> + ret = clk_prepare_enable(pltfm_host->clk);
> + if (ret) {
> + dev_err(&pdev->dev, "Unable to enable SDIO clock\n");
> + goto err_pltfm_free;
> + }
> +
> + ret = mmc_of_parse(host->mmc);
> + if (ret)
> + goto err_sdhci_add;
> +
> + ret = sdhci_add_host(host);
> + if (ret)
> + goto err_sdhci_add;
> +
> + return 0;
> +
> +err_sdhci_add:
> + clk_disable_unprepare(pltfm_host->clk);
> +err_pltfm_free:
> + sdhci_pltfm_free(pdev);
> + return ret;
> +}
> +
> +static int aspeed_sdhci_remove(struct platform_device *pdev)
> +{
> + struct sdhci_pltfm_host *pltfm_host;
> + struct sdhci_host *host;
> + int dead;
> +
> + host = platform_get_drvdata(pdev);
> + pltfm_host = sdhci_priv(host);
> +
> + dead = readl(host->ioaddr + SDHCI_INT_STATUS) == 0xffffffff;
'dead' only makes sense for PCI. Just set it to zero.
> +
> + sdhci_remove_host(host, dead);
> +
> + clk_disable_unprepare(pltfm_host->clk);
> +
> + sdhci_pltfm_free(pdev);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id aspeed_sdhci_of_match[] = {
> + { .compatible = "aspeed,ast2400-sdhci", },
> + { .compatible = "aspeed,ast2500-sdhci", },
> + { }
> +};
> +
> +static struct platform_driver aspeed_sdhci_driver = {
> + .driver = {
> + .name = "sdhci-aspeed",
> + .of_match_table = aspeed_sdhci_of_match,
> + },
> + .probe = aspeed_sdhci_probe,
> + .remove = aspeed_sdhci_remove,
> +};
> +
> +module_platform_driver(aspeed_sdhci_driver);
> +
> +static int aspeed_sdc_probe(struct platform_device *pdev)
> +
> +{
> + struct device_node *parent, *child;
> + struct aspeed_sdc *sdc;
> + int ret;
> +
> + sdc = devm_kzalloc(&pdev->dev, sizeof(*sdc), GFP_KERNEL);
> + if (!sdc)
> + return -ENOMEM;
> +
> + spin_lock_init(&sdc->lock);
> +
> + sdc->clk = devm_clk_get(&pdev->dev, NULL);
> + if (IS_ERR(sdc->clk))
> + return PTR_ERR(sdc->clk);
> +
> + ret = clk_prepare_enable(sdc->clk);
> + if (ret) {
> + dev_err(&pdev->dev, "Unable to enable SDCLK\n");
> + return ret;
> + }
> +
> + sdc->res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + sdc->regs = devm_ioremap_resource(&pdev->dev, sdc->res);
> + if (IS_ERR(sdc->regs)) {
> + ret = PTR_ERR(sdc->regs);
> + goto err_clk;
> + }
> +
> + dev_set_drvdata(&pdev->dev, sdc);
> +
> + parent = pdev->dev.of_node;
> + for_each_available_child_of_node(parent, child) {
> + struct platform_device *cpdev;
> +
> + cpdev = of_platform_device_create(child, NULL, &pdev->dev);
> + if (IS_ERR(cpdev)) {
> + of_node_put(child);
> + ret = PTR_ERR(pdev);
> + goto err_clk;
> + }
> + }
> +
> + return 0;
> +
> +err_clk:
> + clk_disable_unprepare(sdc->clk);
> + return ret;
> +}
> +
> +static int aspeed_sdc_remove(struct platform_device *pdev)
> +{
> + struct aspeed_sdc *sdc = dev_get_drvdata(&pdev->dev);
> +
> + clk_disable_unprepare(sdc->clk);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id aspeed_sdc_of_match[] = {
> + { .compatible = "aspeed,ast2400-sd-controller", },
> + { .compatible = "aspeed,ast2500-sd-controller", },
> + { }
> +};
> +
> +MODULE_DEVICE_TABLE(of, aspeed_sdc_of_match);
> +
> +static struct platform_driver aspeed_sdc_driver = {
> + .driver = {
> + .name = "sd-controller-aspeed",
> + .pm = &sdhci_pltfm_pmops,
> + .of_match_table = aspeed_sdc_of_match,
> + },
> + .probe = aspeed_sdc_probe,
> + .remove = aspeed_sdc_remove,
> +};
> +
> +module_platform_driver(aspeed_sdc_driver);
> +
> +MODULE_DESCRIPTION("Driver for the ASPEED SD/SDIO/SDHCI Controllers");
> +MODULE_AUTHOR("Ryan Chen <ryan_chen@aspeedtech.com>");
> +MODULE_AUTHOR("Andrew Jeffery <andrew@aj.id.au>");
> +MODULE_LICENSE("GPL v2");
>
^ permalink raw reply
* [PATCH 03/12] drm: aspeed_gfx: Fix misuse of GENMASK macro
From: Joel Stanley @ 2019-07-25 2:52 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <4e5bc8d61436024a30a8fb6a1516e29e23a75ede.camel@perches.com>
On Thu, 25 Jul 2019 at 01:18, Joe Perches <joe@perches.com> wrote:
>
> On Thu, 2019-07-25 at 10:40 +0930, Andrew Jeffery wrote:
> >
> > On Thu, 25 Jul 2019, at 02:46, Joe Perches wrote:
> > > On Tue, 2019-07-09 at 22:04 -0700, Joe Perches wrote:
> > > > Arguments are supposed to be ordered high then low.
> > > >
> > > > Signed-off-by: Joe Perches <joe@perches.com>
> > > > ---
> > > > drivers/gpu/drm/aspeed/aspeed_gfx.h | 2 +-
> > > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > > >
> > > > diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > > index a10358bb61ec..095ea03e5833 100644
> > > > --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > > +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > > @@ -74,7 +74,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
> > > > /* CTRL2 */
> > > > #define CRT_CTRL_DAC_EN BIT(0)
> > > > #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
> > > > -#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
> > > > +#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(31, 20)
> >
> > Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
>
> This hardly needs a review, it needs to be applied.
> There's a nominal git tree for aspeed here:
>
> T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git
>
> But who's going to do apply this?
This is a DRM patch, so it goes through the DRM tree. I am a
co-maintainer there and can apply it once I remember how to drive the
tools.
(FYI, this macro is not used by the current driver).
Cheers,
Joel
^ permalink raw reply
* [PATCH 03/12] drm: aspeed_gfx: Fix misuse of GENMASK macro
From: Joe Perches @ 2019-07-25 1:18 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <4f6709f8-381f-415c-8569-798b074b66c5@www.fastmail.com>
On Thu, 2019-07-25 at 10:40 +0930, Andrew Jeffery wrote:
>
> On Thu, 25 Jul 2019, at 02:46, Joe Perches wrote:
> > On Tue, 2019-07-09 at 22:04 -0700, Joe Perches wrote:
> > > Arguments are supposed to be ordered high then low.
> > >
> > > Signed-off-by: Joe Perches <joe@perches.com>
> > > ---
> > > drivers/gpu/drm/aspeed/aspeed_gfx.h | 2 +-
> > > 1 file changed, 1 insertion(+), 1 deletion(-)
> > >
> > > diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > index a10358bb61ec..095ea03e5833 100644
> > > --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > > @@ -74,7 +74,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
> > > /* CTRL2 */
> > > #define CRT_CTRL_DAC_EN BIT(0)
> > > #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
> > > -#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
> > > +#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(31, 20)
>
> Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
This hardly needs a review, it needs to be applied.
There's a nominal git tree for aspeed here:
T: git git://git.kernel.org/pub/scm/linux/kernel/git/joel/aspeed.git
But who's going to do apply this?
^ permalink raw reply
* [PATCH 03/12] drm: aspeed_gfx: Fix misuse of GENMASK macro
From: Andrew Jeffery @ 2019-07-25 1:10 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <2a0c5ef5c7e20b190156908991e4c964a501d80a.camel@perches.com>
On Thu, 25 Jul 2019, at 02:46, Joe Perches wrote:
> On Tue, 2019-07-09 at 22:04 -0700, Joe Perches wrote:
> > Arguments are supposed to be ordered high then low.
> >
> > Signed-off-by: Joe Perches <joe@perches.com>
> > ---
> > drivers/gpu/drm/aspeed/aspeed_gfx.h | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > index a10358bb61ec..095ea03e5833 100644
> > --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> > @@ -74,7 +74,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
> > /* CTRL2 */
> > #define CRT_CTRL_DAC_EN BIT(0)
> > #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
> > -#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
> > +#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(31, 20)
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
>
> ping?
>
>
>
^ permalink raw reply
* [PATCH 2/2] ARM: dts: aspeed: tiogapass: Add Riser card
From: Vijay Khemka @ 2019-07-24 20:42 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <CACPK8Xc+1ZLoCQoERBjr7OQh3V0rV1g+mq+bPiJzCCzJix_13A@mail.gmail.com>
?On 7/23/19, 3:34 PM, "Joel Stanley" <joel@jms.id.au> wrote:
On Tue, 23 Jul 2019 at 17:22, Vijay Khemka <vijaykhemka@fb.com> wrote:
>
> Team,
> This patch also needs review. I separated first patch with v2 and that was acked. Please review this as well.
Do you have a coworker who has access to the schematics and can review
the device tree? They would make a great reviewer.
Thanks Joel, Please see there is v2 for this and I will ask coworker to review.
If no reviewer steps forward I will merge it next time I'm merging patches.
Cheers,
Joel
>
> Regards
> -Vijay
>
> On 7/22/19, 12:41 PM, "Vijay Khemka" <vijaykhemka@fb.com> wrote:
>
> Added i2c mux for riser card and multiple ava card and its sensor
> components for Facebook Tiogapass platform
>
> Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
> ---
> .../dts/aspeed-bmc-facebook-tiogapass.dts | 230 ++++++++++++++++++
> 1 file changed, 230 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> index b7783833a58c..8d0bcb3cd419 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> @@ -12,6 +12,27 @@
> aliases {
> serial0 = &uart1;
> serial4 = &uart5;
> +
> + /*
> + * Hardcode the bus number of i2c switches' channels to
> + * avoid breaking the legacy applications.
> + */
> + i2c16 = &imux16;
> + i2c17 = &imux17;
> + i2c18 = &imux18;
> + i2c19 = &imux19;
> + i2c20 = &imux20;
> + i2c21 = &imux21;
> + i2c22 = &imux22;
> + i2c23 = &imux23;
> + i2c24 = &imux24;
> + i2c25 = &imux25;
> + i2c26 = &imux26;
> + i2c27 = &imux27;
> + i2c28 = &imux28;
> + i2c29 = &imux29;
> + i2c30 = &imux30;
> + i2c31 = &imux31;
> };
> chosen {
> stdout-path = &uart5;
> @@ -124,6 +145,215 @@
> &i2c1 {
> status = "okay";
> //X24 Riser
> + i2c-switch at 71 {
> + compatible = "nxp,pca9544";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> +
> + imux16: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + ina219 at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + tmp75 at 48 {
> + compatible = "ti,tmp75";
> + reg = <0x48>;
> + };
> +
> + tmp421 at 49 {
> + compatible = "ti,tmp75";
> + reg = <0x49>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-switch at 73 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x73>;
> +
> + imux20: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + imux21: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + imux22: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + imux23: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + };
> +
> + };
> +
> + imux17: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + ina219 at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + tmp421 at 48 {
> + compatible = "ti,tmp75";
> + reg = <0x48>;
> + };
> +
> + tmp421 at 49 {
> + compatible = "ti,tmp75";
> + reg = <0x49>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-switch at 73 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x73>;
> +
> + imux24: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + imux25: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + imux26: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + imux27: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + };
> +
> + };
> +
> + imux18: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> +
> + ina219 at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + tmp421 at 48 {
> + compatible = "ti,tmp75";
> + reg = <0x48>;
> + };
> +
> + tmp421 at 49 {
> + compatible = "ti,tmp75";
> + reg = <0x49>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-switch at 73 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x73>;
> +
> + imux28: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + imux29: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + imux30: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + imux31: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + };
> +
> + };
> +
> + imux19: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> +
> + i2c-switch at 40 {
> + compatible = "ti,ina219";
> + reg = <0x40>;
> + };
> +
> + i2c-switch at 41 {
> + compatible = "ti,ina219";
> + reg = <0x41>;
> + };
> +
> + i2c-switch at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + };
> +
> + };
> };
>
> &i2c2 {
> --
> 2.17.1
>
>
>
^ permalink raw reply
* [PATCH 03/12] drm: aspeed_gfx: Fix misuse of GENMASK macro
From: Joe Perches @ 2019-07-24 17:16 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <cddd7ad7e9f81dec1e86c106f04229d21fc21920.1562734889.git.joe@perches.com>
On Tue, 2019-07-09 at 22:04 -0700, Joe Perches wrote:
> Arguments are supposed to be ordered high then low.
>
> Signed-off-by: Joe Perches <joe@perches.com>
> ---
> drivers/gpu/drm/aspeed/aspeed_gfx.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/aspeed/aspeed_gfx.h b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> index a10358bb61ec..095ea03e5833 100644
> --- a/drivers/gpu/drm/aspeed/aspeed_gfx.h
> +++ b/drivers/gpu/drm/aspeed/aspeed_gfx.h
> @@ -74,7 +74,7 @@ int aspeed_gfx_create_output(struct drm_device *drm);
> /* CTRL2 */
> #define CRT_CTRL_DAC_EN BIT(0)
> #define CRT_CTRL_VBLANK_LINE(x) (((x) << 20) & CRT_CTRL_VBLANK_LINE_MASK)
> -#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(20, 31)
> +#define CRT_CTRL_VBLANK_LINE_MASK GENMASK(31, 20)
ping?
^ permalink raw reply
* [PATCH 3/3] dt-bindings: aspeed: Remove mention of deprecated compatibles
From: Rob Herring @ 2019-07-24 13:40 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190724081313.12934-4-andrew@aj.id.au>
On Wed, Jul 24, 2019 at 2:13 AM Andrew Jeffery <andrew@aj.id.au> wrote:
>
> Guide readers away from using the aspeed,g[45].* compatible patterns.
>
> Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
> ---
> Documentation/devicetree/bindings/mfd/aspeed-scu.txt | 2 --
> Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt | 2 --
> .../devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 5 +----
> .../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 4 +---
> 4 files changed, 2 insertions(+), 11 deletions(-)
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply
* [PATCH 3/3] dt-bindings: aspeed: Remove mention of deprecated compatibles
From: Andrew Jeffery @ 2019-07-24 8:13 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190724081313.12934-1-andrew@aj.id.au>
Guide readers away from using the aspeed,g[45].* compatible patterns.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
Documentation/devicetree/bindings/mfd/aspeed-scu.txt | 2 --
Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt | 2 --
.../devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 5 +----
.../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 4 +---
4 files changed, 2 insertions(+), 11 deletions(-)
diff --git a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt
index ce8cf0ec6279..4d92c0bb6687 100644
--- a/Documentation/devicetree/bindings/mfd/aspeed-scu.txt
+++ b/Documentation/devicetree/bindings/mfd/aspeed-scu.txt
@@ -4,9 +4,7 @@ configuring elements such as clocks, pinmux, and reset.
Required properties:
- compatible: One of:
"aspeed,ast2400-scu", "syscon", "simple-mfd"
- "aspeed,g4-scu", "syscon", "simple-mfd"
"aspeed,ast2500-scu", "syscon", "simple-mfd"
- "aspeed,g5-scu", "syscon", "simple-mfd"
- reg: contains the offset and length of the SCU memory region
- #clock-cells: should be set to <1> - the system controller is also a
diff --git a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
index 854bd67ffec6..0e1fa5bc6a30 100644
--- a/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
+++ b/Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt
@@ -26,9 +26,7 @@ property:
- compatible : Should be one of the following:
"aspeed,ast2400-scu", "syscon", "simple-mfd"
- "aspeed,g4-scu", "syscon", "simple-mfd"
"aspeed,ast2500-scu", "syscon", "simple-mfd"
- "aspeed,g5-scu", "syscon", "simple-mfd"
Example
===================
diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
index 125599a2dc5e..9368e4b6d4d0 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml
@@ -15,16 +15,13 @@ description: |+
- compatible: Should be one of the following:
"aspeed,ast2400-scu", "syscon", "simple-mfd"
- "aspeed,g4-scu", "syscon", "simple-mfd"
Refer to the the bindings described in
Documentation/devicetree/bindings/mfd/syscon.txt
properties:
compatible:
- enum:
- - aspeed,ast2400-pinctrl
- - aspeed,g4-pinctrl
+ const: aspeed,ast2400-pinctrl
patternProperties:
'^.*$':
diff --git a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
index 3e6d85318577..939fb755a6db 100644
--- a/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
+++ b/Documentation/devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml
@@ -22,9 +22,7 @@ description: |+
properties:
compatible:
- enum:
- - aspeed,ast2500-pinctrl
- - aspeed,g5-pinctrl
+ const: aspeed,ast2500-pinctrl
aspeed,external-nodes:
minItems: 2
maxItems: 2
--
2.20.1
^ permalink raw reply related
* [PATCH 2/3] pinctrl: aspeed: Document existence of deprecated compatibles
From: Andrew Jeffery @ 2019-07-24 8:13 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190724081313.12934-1-andrew@aj.id.au>
Otherwise they look odd in the face of not being listed in the bindings
documents.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 4 ++++
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 4 ++++
2 files changed, 8 insertions(+)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
index 384396cbb22d..0e087fe759d2 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
@@ -2531,6 +2531,10 @@ static int aspeed_g4_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id aspeed_g4_pinctrl_of_match[] = {
{ .compatible = "aspeed,ast2400-pinctrl", },
+ /*
+ * The aspeed,g4-pinctrl compatible has been removed the from the
+ * bindings, but keep the match in case of old devicetrees.
+ */
{ .compatible = "aspeed,g4-pinctrl", },
{ },
};
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 053101f795a2..49255802735b 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -2676,6 +2676,10 @@ static int aspeed_g5_pinctrl_probe(struct platform_device *pdev)
static const struct of_device_id aspeed_g5_pinctrl_of_match[] = {
{ .compatible = "aspeed,ast2500-pinctrl", },
+ /*
+ * The aspeed,g5-pinctrl compatible has been removed the from the
+ * bindings, but keep the match in case of old devicetrees.
+ */
{ .compatible = "aspeed,g5-pinctrl", },
{ },
};
--
2.20.1
^ permalink raw reply related
* [PATCH 1/3] dts: ARM: aspeed: Migrate away from aspeed, g[45].* compatibles
From: Andrew Jeffery @ 2019-07-24 8:13 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190724081313.12934-1-andrew@aj.id.au>
Use the SoC-specific compatible strings instead.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
arch/arm/boot/dts/aspeed-g4.dtsi | 2 +-
arch/arm/boot/dts/aspeed-g5.dtsi | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-g4.dtsi b/arch/arm/boot/dts/aspeed-g4.dtsi
index dd4b0b15afcf..7f06dc21dc19 100644
--- a/arch/arm/boot/dts/aspeed-g4.dtsi
+++ b/arch/arm/boot/dts/aspeed-g4.dtsi
@@ -162,7 +162,7 @@
#reset-cells = <1>;
pinctrl: pinctrl {
- compatible = "aspeed,g4-pinctrl";
+ compatible = "aspeed,ast2400-pinctrl";
};
p2a: p2a-control {
diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
index 5b1ca265c2ce..04c97138e18b 100644
--- a/arch/arm/boot/dts/aspeed-g5.dtsi
+++ b/arch/arm/boot/dts/aspeed-g5.dtsi
@@ -215,7 +215,7 @@
#reset-cells = <1>;
pinctrl: pinctrl {
- compatible = "aspeed,g5-pinctrl";
+ compatible = "aspeed,ast2500-pinctrl";
aspeed,external-nodes = <&gfx &lhc>;
};
--
2.20.1
^ permalink raw reply related
* [PATCH 0/3] ARM: dts: aspeed: Deprecate g[45]-style compatibles
From: Andrew Jeffery @ 2019-07-24 8:13 UTC (permalink / raw)
To: linux-aspeed
Hello,
Joel and I decided that going forward we're not going to name compatibles along
the lines of SoC generations, so discourage any further attempts by removing
the remaining instances.
It's probably best if we push the three patches all through one tree rather
than fragmenting. Is everyone happy if Joel applies them to the aspeed tree?
Cheers,
Andrew
Andrew Jeffery (3):
dts: ARM: aspeed: Migrate away from aspeed,g[45].* compatibles
pinctrl: aspeed: Document existence of deprecated compatibles
dt-bindings: aspeed: Remove mention of deprecated compatibles
Documentation/devicetree/bindings/mfd/aspeed-scu.txt | 2 --
Documentation/devicetree/bindings/misc/aspeed-p2a-ctrl.txt | 2 --
.../devicetree/bindings/pinctrl/aspeed,ast2400-pinctrl.yaml | 5 +----
.../devicetree/bindings/pinctrl/aspeed,ast2500-pinctrl.yaml | 4 +---
arch/arm/boot/dts/aspeed-g4.dtsi | 2 +-
arch/arm/boot/dts/aspeed-g5.dtsi | 2 +-
drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 4 ++++
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 4 ++++
8 files changed, 12 insertions(+), 13 deletions(-)
--
2.20.1
^ permalink raw reply
* [PATCH] pinctrl: aspeed-g5: Delay acquisition of regmaps
From: Andrew Jeffery @ 2019-07-24 8:01 UTC (permalink / raw)
To: linux-aspeed
While sorting out some devicetree issues I found that the pinctrl driver
was failing to acquire its GFX regmap even though the phandle was
present in the devicetree:
[ 0.124190] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: No GFX phandle found, some mux configurations may fail
Without access to the GFX regmap we fail to configure the mux for the
VPO function:
[ 1.548866] pinctrl core: add 1 pinctrl maps
[ 1.549826] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: found group selector 164 for VPO
[ 1.550638] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 144 (V20) for 1e6e6000.display
[ 1.551346] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 145 (U19) for 1e6e6000.display
...
[ 1.562057] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 218 (T22) for 1e6e6000.display
[ 1.562541] aspeed-g5-pinctrl 1e6e2000.syscon:pinctrl: request pin 219 (R20) for 1e6e6000.display
[ 1.563113] Muxing pin 144 for VPO
[ 1.563456] Want SCU8C[0x00000001]=0x1, got 0x0 from 0x00000000
[ 1.564624] aspeed_gfx 1e6e6000.display: Error applying setting, reverse things back
This turned out to be a simple problem of timing: The ASPEED pinctrl
driver is probed during arch_initcall(), while GFX is processed much
later. As such the GFX syscon is not yet registered during the pinctrl
probe() and we get an -EPROBE_DEFER when we try to look it up, however
we must not defer probing the pinctrl driver for the inability to mux
some GFX-related functions.
Switch to lazily grabbing the regmaps when they're first required by the
mux configuration. This generates a bit of noise in the patch as we have
to drop the `const` qualifier on arguments for several function
prototypes, but has the benefit of working.
I've smoke tested this for the ast2500-evb under qemu with a dummy
graphics device. We now succeed in our attempts to configure the SoC's
VPO pinmux function.
Fixes: 7d29ed88acbb ("pinctrl: aspeed: Read and write bits in LPC and GFX controllers")
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
---
drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c | 2 +-
drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c | 92 +++++++++++++++-------
drivers/pinctrl/aspeed/pinctrl-aspeed.c | 12 ++-
drivers/pinctrl/aspeed/pinmux-aspeed.h | 5 +-
4 files changed, 74 insertions(+), 37 deletions(-)
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
index 384396cbb22d..22256576b69a 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g4.c
@@ -2412,7 +2412,7 @@ static const struct aspeed_pin_config aspeed_g4_configs[] = {
{ PIN_CONFIG_INPUT_DEBOUNCE, { C14, B14 }, SCUA8, 27 },
};
-static int aspeed_g4_sig_expr_set(const struct aspeed_pinmux_data *ctx,
+static int aspeed_g4_sig_expr_set(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr,
bool enable)
{
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
index 053101f795a2..ba6438ac4d72 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed-g5.c
@@ -2507,6 +2507,61 @@ static struct aspeed_pin_config aspeed_g5_configs[] = {
{ PIN_CONFIG_INPUT_DEBOUNCE, { A20, B19 }, SCUA8, 27 },
};
+static struct regmap *aspeed_g5_acquire_regmap(struct aspeed_pinmux_data *ctx,
+ int ip)
+{
+ if (ip == ASPEED_IP_SCU) {
+ WARN(!ctx->maps[ip], "Missing SCU syscon!");
+ return ctx->maps[ip];
+ }
+
+ if (ip >= ASPEED_NR_PINMUX_IPS)
+ return ERR_PTR(-EINVAL);
+
+ if (likely(ctx->maps[ip]))
+ return ctx->maps[ip];
+
+ if (ip == ASPEED_IP_GFX) {
+ struct device_node *node;
+ struct regmap *map;
+
+ node = of_parse_phandle(ctx->dev->of_node,
+ "aspeed,external-nodes", 0);
+ if (node) {
+ map = syscon_node_to_regmap(node);
+ of_node_put(node);
+ if (IS_ERR(map))
+ return map;
+ } else
+ return ERR_PTR(-ENODEV);
+
+ ctx->maps[ASPEED_IP_GFX] = map;
+ dev_dbg(ctx->dev, "Acquired GFX regmap");
+ return map;
+ }
+
+ if (ip == ASPEED_IP_LPC) {
+ struct device_node *node;
+ struct regmap *map;
+
+ node = of_parse_phandle(ctx->dev->of_node,
+ "aspeed,external-nodes", 1);
+ if (node) {
+ map = syscon_node_to_regmap(node->parent);
+ of_node_put(node);
+ if (IS_ERR(map))
+ return map;
+ } else
+ map = ERR_PTR(-ENODEV);
+
+ ctx->maps[ASPEED_IP_LPC] = map;
+ dev_dbg(ctx->dev, "Acquired LPC regmap");
+ return map;
+ }
+
+ return ERR_PTR(-EINVAL);
+}
+
/**
* Configure a pin's signal by applying an expression's descriptor state for
* all descriptors in the expression.
@@ -2520,7 +2575,7 @@ static struct aspeed_pin_config aspeed_g5_configs[] = {
* Return: 0 if the expression is configured as requested and a negative error
* code otherwise
*/
-static int aspeed_g5_sig_expr_set(const struct aspeed_pinmux_data *ctx,
+static int aspeed_g5_sig_expr_set(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr,
bool enable)
{
@@ -2531,9 +2586,15 @@ static int aspeed_g5_sig_expr_set(const struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_desc *desc = &expr->descs[i];
u32 pattern = enable ? desc->enable : desc->disable;
u32 val = (pattern << __ffs(desc->mask));
+ struct regmap *map;
- if (!ctx->maps[desc->ip])
- return -ENODEV;
+ map = aspeed_g5_acquire_regmap(ctx, desc->ip);
+ if (IS_ERR(map)) {
+ dev_err(ctx->dev,
+ "Failed to acquire regmap for IP block %d\n",
+ desc->ip);
+ return PTR_ERR(map);
+ }
/*
* Strap registers are configured in hardware or by early-boot
@@ -2641,34 +2702,11 @@ static struct pinctrl_desc aspeed_g5_pinctrl_desc = {
static int aspeed_g5_pinctrl_probe(struct platform_device *pdev)
{
int i;
- struct regmap *map;
- struct device_node *node;
for (i = 0; i < ARRAY_SIZE(aspeed_g5_pins); i++)
aspeed_g5_pins[i].number = i;
- node = of_parse_phandle(pdev->dev.of_node, "aspeed,external-nodes", 0);
- map = syscon_node_to_regmap(node);
- of_node_put(node);
- if (IS_ERR(map)) {
- dev_warn(&pdev->dev, "No GFX phandle found, some mux configurations may fail\n");
- map = NULL;
- }
- aspeed_g5_pinctrl_data.pinmux.maps[ASPEED_IP_GFX] = map;
-
- node = of_parse_phandle(pdev->dev.of_node, "aspeed,external-nodes", 1);
- if (node) {
- map = syscon_node_to_regmap(node->parent);
- if (IS_ERR(map)) {
- dev_warn(&pdev->dev, "LHC parent is not a syscon, some mux configurations may fail\n");
- map = NULL;
- }
- } else {
- dev_warn(&pdev->dev, "No LHC phandle found, some mux configurations may fail\n");
- map = NULL;
- }
- of_node_put(node);
- aspeed_g5_pinctrl_data.pinmux.maps[ASPEED_IP_LPC] = map;
+ aspeed_g5_pinctrl_data.pinmux.dev = &pdev->dev;
return aspeed_pinctrl_probe(pdev, &aspeed_g5_pinctrl_desc,
&aspeed_g5_pinctrl_data);
diff --git a/drivers/pinctrl/aspeed/pinctrl-aspeed.c b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
index 535db3de490b..54933665b5f8 100644
--- a/drivers/pinctrl/aspeed/pinctrl-aspeed.c
+++ b/drivers/pinctrl/aspeed/pinctrl-aspeed.c
@@ -71,7 +71,7 @@ int aspeed_pinmux_get_fn_groups(struct pinctrl_dev *pctldev,
return 0;
}
-static int aspeed_sig_expr_enable(const struct aspeed_pinmux_data *ctx,
+static int aspeed_sig_expr_enable(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr)
{
int ret;
@@ -86,7 +86,7 @@ static int aspeed_sig_expr_enable(const struct aspeed_pinmux_data *ctx,
return 0;
}
-static int aspeed_sig_expr_disable(const struct aspeed_pinmux_data *ctx,
+static int aspeed_sig_expr_disable(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr)
{
int ret;
@@ -109,7 +109,7 @@ static int aspeed_sig_expr_disable(const struct aspeed_pinmux_data *ctx,
*
* Return: 0 if all expressions are disabled, otherwise a negative error code
*/
-static int aspeed_disable_sig(const struct aspeed_pinmux_data *ctx,
+static int aspeed_disable_sig(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr **exprs)
{
int ret = 0;
@@ -217,8 +217,7 @@ int aspeed_pinmux_set_mux(struct pinctrl_dev *pctldev, unsigned int function,
{
int i;
int ret;
- const struct aspeed_pinctrl_data *pdata =
- pinctrl_dev_get_drvdata(pctldev);
+ struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
const struct aspeed_pin_group *pgroup = &pdata->pinmux.groups[group];
const struct aspeed_pin_function *pfunc =
&pdata->pinmux.functions[function];
@@ -306,8 +305,7 @@ int aspeed_gpio_request_enable(struct pinctrl_dev *pctldev,
unsigned int offset)
{
int ret;
- const struct aspeed_pinctrl_data *pdata =
- pinctrl_dev_get_drvdata(pctldev);
+ struct aspeed_pinctrl_data *pdata = pinctrl_dev_get_drvdata(pctldev);
const struct aspeed_pin_desc *pdesc = pdata->pins[offset].drv_data;
const struct aspeed_sig_expr ***prios, **funcs, *expr;
diff --git a/drivers/pinctrl/aspeed/pinmux-aspeed.h b/drivers/pinctrl/aspeed/pinmux-aspeed.h
index 329d54d48667..52d299b59ce2 100644
--- a/drivers/pinctrl/aspeed/pinmux-aspeed.h
+++ b/drivers/pinctrl/aspeed/pinmux-aspeed.h
@@ -702,11 +702,12 @@ struct aspeed_pin_function {
struct aspeed_pinmux_data;
struct aspeed_pinmux_ops {
- int (*set)(const struct aspeed_pinmux_data *ctx,
+ int (*set)(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr, bool enabled);
};
struct aspeed_pinmux_data {
+ struct device *dev;
struct regmap *maps[ASPEED_NR_PINMUX_IPS];
const struct aspeed_pinmux_ops *ops;
@@ -725,7 +726,7 @@ int aspeed_sig_expr_eval(const struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr,
bool enabled);
-static inline int aspeed_sig_expr_set(const struct aspeed_pinmux_data *ctx,
+static inline int aspeed_sig_expr_set(struct aspeed_pinmux_data *ctx,
const struct aspeed_sig_expr *expr,
bool enabled)
{
--
2.20.1
^ permalink raw reply related
* [PATCH linux dev-5.2] ARM: dts: aspeed: swift: Fix FSI GPIOs
From: Andrew Jeffery @ 2019-07-24 0:32 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190719203037.11795-1-mspinler@linux.ibm.com>
On Sat, 20 Jul 2019, at 06:01, Matt Spinler wrote:
> From: Matt Spinler <spinler@us.ibm.com>
>
> Change the FSI clock and data GPIOs to match what the hardware turned
> out to use.
>
> Signed-off-by: Matt Spinler <spinler@us.ibm.com>
Reviewed-by: Andrew Jeffery <andrew@aj.id.au>
And yeah, please make sure to include relevant lists in the future as Olof
mentioned.
Andrew
> ---
> arch/arm/boot/dts/aspeed-bmc-opp-swift.dts | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> index caac895c60b4..f14f745b34ca 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-swift.dts
> @@ -207,8 +207,8 @@
> #size-cells = <0>;
> no-gpio-delays;
>
> - clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
> - data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
> + clock-gpios = <&gpio ASPEED_GPIO(P, 1) GPIO_ACTIVE_HIGH>;
> + data-gpios = <&gpio ASPEED_GPIO(P, 2) GPIO_ACTIVE_HIGH>;
> mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
> enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
> trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
> --
> 2.22.0
>
>
^ permalink raw reply
* [PATCH 2/2] ARM: dts: aspeed: tiogapass: Add Riser card
From: Joel Stanley @ 2019-07-23 22:33 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <C9C6AC86-B353-4CDA-8B63-50587F48DF44@fb.com>
On Tue, 23 Jul 2019 at 17:22, Vijay Khemka <vijaykhemka@fb.com> wrote:
>
> Team,
> This patch also needs review. I separated first patch with v2 and that was acked. Please review this as well.
Do you have a coworker who has access to the schematics and can review
the device tree? They would make a great reviewer.
If no reviewer steps forward I will merge it next time I'm merging patches.
Cheers,
Joel
>
> Regards
> -Vijay
>
> ?On 7/22/19, 12:41 PM, "Vijay Khemka" <vijaykhemka@fb.com> wrote:
>
> Added i2c mux for riser card and multiple ava card and its sensor
> components for Facebook Tiogapass platform
>
> Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
> ---
> .../dts/aspeed-bmc-facebook-tiogapass.dts | 230 ++++++++++++++++++
> 1 file changed, 230 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> index b7783833a58c..8d0bcb3cd419 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
> @@ -12,6 +12,27 @@
> aliases {
> serial0 = &uart1;
> serial4 = &uart5;
> +
> + /*
> + * Hardcode the bus number of i2c switches' channels to
> + * avoid breaking the legacy applications.
> + */
> + i2c16 = &imux16;
> + i2c17 = &imux17;
> + i2c18 = &imux18;
> + i2c19 = &imux19;
> + i2c20 = &imux20;
> + i2c21 = &imux21;
> + i2c22 = &imux22;
> + i2c23 = &imux23;
> + i2c24 = &imux24;
> + i2c25 = &imux25;
> + i2c26 = &imux26;
> + i2c27 = &imux27;
> + i2c28 = &imux28;
> + i2c29 = &imux29;
> + i2c30 = &imux30;
> + i2c31 = &imux31;
> };
> chosen {
> stdout-path = &uart5;
> @@ -124,6 +145,215 @@
> &i2c1 {
> status = "okay";
> //X24 Riser
> + i2c-switch at 71 {
> + compatible = "nxp,pca9544";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x71>;
> +
> + imux16: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> +
> + ina219 at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + tmp75 at 48 {
> + compatible = "ti,tmp75";
> + reg = <0x48>;
> + };
> +
> + tmp421 at 49 {
> + compatible = "ti,tmp75";
> + reg = <0x49>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-switch at 73 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x73>;
> +
> + imux20: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + imux21: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + imux22: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + imux23: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + };
> +
> + };
> +
> + imux17: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> +
> + ina219 at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + tmp421 at 48 {
> + compatible = "ti,tmp75";
> + reg = <0x48>;
> + };
> +
> + tmp421 at 49 {
> + compatible = "ti,tmp75";
> + reg = <0x49>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-switch at 73 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x73>;
> +
> + imux24: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + imux25: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + imux26: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + imux27: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + };
> +
> + };
> +
> + imux18: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> +
> + ina219 at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + tmp421 at 48 {
> + compatible = "ti,tmp75";
> + reg = <0x48>;
> + };
> +
> + tmp421 at 49 {
> + compatible = "ti,tmp75";
> + reg = <0x49>;
> + };
> +
> + eeprom at 50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + pagesize = <32>;
> + };
> +
> + i2c-switch at 73 {
> + compatible = "nxp,pca9546";
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0x73>;
> +
> + imux28: i2c at 0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <0>;
> + };
> +
> + imux29: i2c at 1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <1>;
> + };
> +
> + imux30: i2c at 2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <2>;
> + };
> +
> + imux31: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> + };
> +
> + };
> +
> + };
> +
> + imux19: i2c at 3 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + reg = <3>;
> +
> + i2c-switch at 40 {
> + compatible = "ti,ina219";
> + reg = <0x40>;
> + };
> +
> + i2c-switch at 41 {
> + compatible = "ti,ina219";
> + reg = <0x41>;
> + };
> +
> + i2c-switch at 45 {
> + compatible = "ti,ina219";
> + reg = <0x45>;
> + };
> +
> + };
> +
> + };
> };
>
> &i2c2 {
> --
> 2.17.1
>
>
>
^ permalink raw reply
* [PATCH v2] ARM: dts: aspeed: tiogapass: Add Riser card
From: Vijay Khemka @ 2019-07-23 17:58 UTC (permalink / raw)
To: linux-aspeed
Added i2c mux for riser card and multiple ava card and its sensor
components for Facebook tiogapass platform
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
---
In V2: Modified ina219 to ina230 which is correct device.
.../dts/aspeed-bmc-facebook-tiogapass.dts | 230 ++++++++++++++++++
1 file changed, 230 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
index e722e9aef907..d0c823e8fce5 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
@@ -12,6 +12,27 @@
aliases {
serial0 = &uart1;
serial4 = &uart5;
+
+ /*
+ * Hardcode the bus number of i2c switches' channels to
+ * avoid breaking the legacy applications.
+ */
+ i2c16 = &imux16;
+ i2c17 = &imux17;
+ i2c18 = &imux18;
+ i2c19 = &imux19;
+ i2c20 = &imux20;
+ i2c21 = &imux21;
+ i2c22 = &imux22;
+ i2c23 = &imux23;
+ i2c24 = &imux24;
+ i2c25 = &imux25;
+ i2c26 = &imux26;
+ i2c27 = &imux27;
+ i2c28 = &imux28;
+ i2c29 = &imux29;
+ i2c30 = &imux30;
+ i2c31 = &imux31;
};
chosen {
stdout-path = &uart5;
@@ -124,6 +145,215 @@
&i2c1 {
status = "okay";
//X24 Riser
+ i2c-switch at 71 {
+ compatible = "nxp,pca9544";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+
+ imux16: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ ina230 at 45 {
+ compatible = "ti,ina230";
+ reg = <0x45>;
+ };
+
+ tmp75 at 48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ tmp421 at 49 {
+ compatible = "ti,tmp75";
+ reg = <0x49>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-switch at 73 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+
+ imux20: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux21: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux22: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux23: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ };
+
+ };
+
+ imux17: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ ina230 at 45 {
+ compatible = "ti,ina230";
+ reg = <0x45>;
+ };
+
+ tmp421 at 48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ tmp421 at 49 {
+ compatible = "ti,tmp75";
+ reg = <0x49>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-switch at 73 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+
+ imux24: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux25: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux26: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux27: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ };
+
+ };
+
+ imux18: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ ina230 at 45 {
+ compatible = "ti,ina230";
+ reg = <0x45>;
+ };
+
+ tmp421 at 48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ tmp421 at 49 {
+ compatible = "ti,tmp75";
+ reg = <0x49>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-switch at 73 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+
+ imux28: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux29: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux30: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux31: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ };
+
+ };
+
+ imux19: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ i2c-switch at 40 {
+ compatible = "ti,ina230";
+ reg = <0x40>;
+ };
+
+ i2c-switch at 41 {
+ compatible = "ti,ina230";
+ reg = <0x41>;
+ };
+
+ i2c-switch at 45 {
+ compatible = "ti,ina230";
+ reg = <0x45>;
+ };
+
+ };
+
+ };
};
&i2c2 {
--
2.17.1
^ permalink raw reply related
* [PATCH 2/2] ARM: dts: aspeed: tiogapass: Add Riser card
From: Vijay Khemka @ 2019-07-23 17:22 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190722192451.1947348-3-vijaykhemka@fb.com>
Team,
This patch also needs review. I separated first patch with v2 and that was acked. Please review this as well.
Regards
-Vijay
?On 7/22/19, 12:41 PM, "Vijay Khemka" <vijaykhemka@fb.com> wrote:
Added i2c mux for riser card and multiple ava card and its sensor
components for Facebook Tiogapass platform
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
---
.../dts/aspeed-bmc-facebook-tiogapass.dts | 230 ++++++++++++++++++
1 file changed, 230 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
index b7783833a58c..8d0bcb3cd419 100644
--- a/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-facebook-tiogapass.dts
@@ -12,6 +12,27 @@
aliases {
serial0 = &uart1;
serial4 = &uart5;
+
+ /*
+ * Hardcode the bus number of i2c switches' channels to
+ * avoid breaking the legacy applications.
+ */
+ i2c16 = &imux16;
+ i2c17 = &imux17;
+ i2c18 = &imux18;
+ i2c19 = &imux19;
+ i2c20 = &imux20;
+ i2c21 = &imux21;
+ i2c22 = &imux22;
+ i2c23 = &imux23;
+ i2c24 = &imux24;
+ i2c25 = &imux25;
+ i2c26 = &imux26;
+ i2c27 = &imux27;
+ i2c28 = &imux28;
+ i2c29 = &imux29;
+ i2c30 = &imux30;
+ i2c31 = &imux31;
};
chosen {
stdout-path = &uart5;
@@ -124,6 +145,215 @@
&i2c1 {
status = "okay";
//X24 Riser
+ i2c-switch at 71 {
+ compatible = "nxp,pca9544";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x71>;
+
+ imux16: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+
+ ina219 at 45 {
+ compatible = "ti,ina219";
+ reg = <0x45>;
+ };
+
+ tmp75 at 48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ tmp421 at 49 {
+ compatible = "ti,tmp75";
+ reg = <0x49>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-switch at 73 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+
+ imux20: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux21: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux22: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux23: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ };
+
+ };
+
+ imux17: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+
+ ina219 at 45 {
+ compatible = "ti,ina219";
+ reg = <0x45>;
+ };
+
+ tmp421 at 48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ tmp421 at 49 {
+ compatible = "ti,tmp75";
+ reg = <0x49>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-switch at 73 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+
+ imux24: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux25: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux26: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux27: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ };
+
+ };
+
+ imux18: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+
+ ina219 at 45 {
+ compatible = "ti,ina219";
+ reg = <0x45>;
+ };
+
+ tmp421 at 48 {
+ compatible = "ti,tmp75";
+ reg = <0x48>;
+ };
+
+ tmp421 at 49 {
+ compatible = "ti,tmp75";
+ reg = <0x49>;
+ };
+
+ eeprom at 50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ pagesize = <32>;
+ };
+
+ i2c-switch at 73 {
+ compatible = "nxp,pca9546";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0x73>;
+
+ imux28: i2c at 0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0>;
+ };
+
+ imux29: i2c at 1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <1>;
+ };
+
+ imux30: i2c at 2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <2>;
+ };
+
+ imux31: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+ };
+
+ };
+
+ };
+
+ imux19: i2c at 3 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <3>;
+
+ i2c-switch at 40 {
+ compatible = "ti,ina219";
+ reg = <0x40>;
+ };
+
+ i2c-switch at 41 {
+ compatible = "ti,ina219";
+ reg = <0x41>;
+ };
+
+ i2c-switch at 45 {
+ compatible = "ti,ina219";
+ reg = <0x45>;
+ };
+
+ };
+
+ };
};
&i2c2 {
--
2.17.1
^ permalink raw reply
* [PATCH v2] dt-bindings: Add pxe1610 as a trivial device
From: Vijay Khemka @ 2019-07-23 17:19 UTC (permalink / raw)
To: linux-aspeed
The pxe1610 is a voltage regulator from Infineon. It also supports
other VRs pxe1110 and pxm1310 from Infineon.
Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
---
In V2: comment was put wrongly after device so corrected.
Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
index 2e742d399e87..a3dd83d4f429 100644
--- a/Documentation/devicetree/bindings/trivial-devices.yaml
+++ b/Documentation/devicetree/bindings/trivial-devices.yaml
@@ -98,6 +98,8 @@ properties:
- gmt,g751
# Infineon IR38064 Voltage Regulator
- infineon,ir38064
+ # Infineon PXE1610, PXE1110 and PXM1310 Voltage Regulators
+ - infineon,pxe1610
# Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
- infineon,slb9635tt
# Infineon SLB9645 I2C TPM (new protocol, max 400khz)
--
2.17.1
^ permalink raw reply related
* [PATCH] dt-bindings: Add pxe1610 as a trivial device
From: Vijay Khemka @ 2019-07-23 17:13 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <CAL_Jsq+Kw0TFW_v54Y2QHcChqpNDYhFyCSO5Cj-be9yLSCq-Pw@mail.gmail.com>
?On 7/23/19, 7:53 AM, "Rob Herring" <robh+dt@kernel.org> wrote:
On Tue, Jul 23, 2019 at 8:50 AM Rob Herring <robh+dt@kernel.org> wrote:
>
> On Mon, Jul 22, 2019 at 6:46 PM Vijay Khemka <vijaykhemka@fb.com> wrote:
> >
> > The pxe1610 is a voltage regulator from Infineon. It also supports
> > other VRs pxe1110 and pxm1310 from Infineon.
What happened to the other compatibles? S/w doesn't need to know the
differences?
As far as driver is concerned, it doesn't need to know differences.
> >
> > Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
> > ---
> > Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
> > index 2e742d399e87..1be648828a31 100644
> > --- a/Documentation/devicetree/bindings/trivial-devices.yaml
> > +++ b/Documentation/devicetree/bindings/trivial-devices.yaml
> > @@ -99,6 +99,8 @@ properties:
> > # Infineon IR38064 Voltage Regulator
> > - infineon,ir38064
> > # Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
> > + - infineon,pxe1610
> > + # Infineon PXE1610, PXE1110 and PXM1310 Voltage Regulators
>
> The comment goes above the entry.
>
> > - infineon,slb9635tt
> > # Infineon SLB9645 I2C TPM (new protocol, max 400khz)
> > - infineon,slb9645tt
> > --
> > 2.17.1
> >
^ permalink raw reply
* [PATCH] dt-bindings: Add pxe1610 as a trivial device
From: Rob Herring @ 2019-07-23 14:52 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <CAL_Jsq+uAjK6+xzkyOhcH96tZuqv7i6Nz5_nhUQkZ2adt2gutA@mail.gmail.com>
On Tue, Jul 23, 2019 at 8:50 AM Rob Herring <robh+dt@kernel.org> wrote:
>
> On Mon, Jul 22, 2019 at 6:46 PM Vijay Khemka <vijaykhemka@fb.com> wrote:
> >
> > The pxe1610 is a voltage regulator from Infineon. It also supports
> > other VRs pxe1110 and pxm1310 from Infineon.
What happened to the other compatibles? S/w doesn't need to know the
differences?
> >
> > Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
> > ---
> > Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
> > 1 file changed, 2 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
> > index 2e742d399e87..1be648828a31 100644
> > --- a/Documentation/devicetree/bindings/trivial-devices.yaml
> > +++ b/Documentation/devicetree/bindings/trivial-devices.yaml
> > @@ -99,6 +99,8 @@ properties:
> > # Infineon IR38064 Voltage Regulator
> > - infineon,ir38064
> > # Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
> > + - infineon,pxe1610
> > + # Infineon PXE1610, PXE1110 and PXM1310 Voltage Regulators
>
> The comment goes above the entry.
>
> > - infineon,slb9635tt
> > # Infineon SLB9645 I2C TPM (new protocol, max 400khz)
> > - infineon,slb9645tt
> > --
> > 2.17.1
> >
^ permalink raw reply
* [PATCH] dt-bindings: Add pxe1610 as a trivial device
From: Rob Herring @ 2019-07-23 14:50 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190723002052.2878847-1-vijaykhemka@fb.com>
On Mon, Jul 22, 2019 at 6:46 PM Vijay Khemka <vijaykhemka@fb.com> wrote:
>
> The pxe1610 is a voltage regulator from Infineon. It also supports
> other VRs pxe1110 and pxm1310 from Infineon.
>
> Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
> ---
> Documentation/devicetree/bindings/trivial-devices.yaml | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/trivial-devices.yaml b/Documentation/devicetree/bindings/trivial-devices.yaml
> index 2e742d399e87..1be648828a31 100644
> --- a/Documentation/devicetree/bindings/trivial-devices.yaml
> +++ b/Documentation/devicetree/bindings/trivial-devices.yaml
> @@ -99,6 +99,8 @@ properties:
> # Infineon IR38064 Voltage Regulator
> - infineon,ir38064
> # Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
> + - infineon,pxe1610
> + # Infineon PXE1610, PXE1110 and PXM1310 Voltage Regulators
The comment goes above the entry.
> - infineon,slb9635tt
> # Infineon SLB9645 I2C TPM (new protocol, max 400khz)
> - infineon,slb9645tt
> --
> 2.17.1
>
^ permalink raw reply
* [PATCH] dt-bindings: Add pxe1610 as a trivial device
From: Joel Stanley @ 2019-07-23 2:18 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <20190723002052.2878847-1-vijaykhemka@fb.com>
On Tue, 23 Jul 2019 at 00:46, Vijay Khemka <vijaykhemka@fb.com> wrote:
>
> The pxe1610 is a voltage regulator from Infineon. It also supports
> other VRs pxe1110 and pxm1310 from Infineon.
>
> Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
Acked-by: Joel Stanley <joel@jms.id.au>
^ permalink raw reply
* [PATCH v2] ARM: dts: aspeed: tiogapass: Add VR devices
From: Joel Stanley @ 2019-07-23 2:16 UTC (permalink / raw)
To: linux-aspeed
In-Reply-To: <a0a8162e-c21b-4b3d-b096-1676c5cc9758@www.fastmail.com>
On Tue, 23 Jul 2019 at 00:40, Andrew Jeffery <andrew@aj.id.au> wrote:
>
>
>
> On Tue, 23 Jul 2019, at 10:04, Vijay Khemka wrote:
> > Adds voltage regulators Infineon pxe1610 devices to Facebook
> > tiogapass platform.
> >
> > Signed-off-by: Vijay Khemka <vijaykhemka@fb.com>
>
> Acked-by: Andrew Jeffery <andrew@aj.id.au>
Thanks, applied to aspeed's dt-for-5.4.
Cheers,
Joel
^ permalink raw reply
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