From: Ira Weiny <ira.weiny@intel.com>
To: Dave Jiang <dave.jiang@intel.com>, Fan Ni <fan.ni@samsung.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Navneet Singh <navneet.singh@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
linux-btrfs@vger.kernel.org, linux-cxl@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 12/25] cxl/region: Refactor common create region code
Date: Fri, 16 Aug 2024 09:00:00 -0500 [thread overview]
Message-ID: <20240816-dcd-type2-upstream-v2-12-20189a10ad7d@intel.com> (raw)
In-Reply-To: <20240816-dcd-type2-upstream-v2-0-20189a10ad7d@intel.com>
create_pmem_region_store() and create_ram_region_store() are identical
with the exception of the region mode. With the addition of DC region
mode this would end up being 3 copies of the same code.
Refactor create_pmem_region_store() and create_ram_region_store() to use
a single common function to be used in subsequent DC code.
Suggested-by: Fan Ni <fan.ni@samsung.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
drivers/cxl/core/region.c | 28 +++++++++++-----------------
1 file changed, 11 insertions(+), 17 deletions(-)
diff --git a/drivers/cxl/core/region.c b/drivers/cxl/core/region.c
index 650fe33f2ed4..f85b26b39b2f 100644
--- a/drivers/cxl/core/region.c
+++ b/drivers/cxl/core/region.c
@@ -2553,9 +2553,8 @@ static struct cxl_region *__create_region(struct cxl_root_decoder *cxlrd,
return devm_cxl_add_region(cxlrd, id, mode, CXL_DECODER_HOSTONLYMEM);
}
-static ssize_t create_pmem_region_store(struct device *dev,
- struct device_attribute *attr,
- const char *buf, size_t len)
+static ssize_t create_region_store(struct device *dev, const char *buf,
+ size_t len, enum cxl_region_mode mode)
{
struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);
struct cxl_region *cxlr;
@@ -2565,31 +2564,26 @@ static ssize_t create_pmem_region_store(struct device *dev,
if (rc != 1)
return -EINVAL;
- cxlr = __create_region(cxlrd, CXL_REGION_PMEM, id);
+ cxlr = __create_region(cxlrd, mode, id);
if (IS_ERR(cxlr))
return PTR_ERR(cxlr);
return len;
}
+
+static ssize_t create_pmem_region_store(struct device *dev,
+ struct device_attribute *attr,
+ const char *buf, size_t len)
+{
+ return create_region_store(dev, buf, len, CXL_REGION_PMEM);
+}
DEVICE_ATTR_RW(create_pmem_region);
static ssize_t create_ram_region_store(struct device *dev,
struct device_attribute *attr,
const char *buf, size_t len)
{
- struct cxl_root_decoder *cxlrd = to_cxl_root_decoder(dev);
- struct cxl_region *cxlr;
- int rc, id;
-
- rc = sscanf(buf, "region%d\n", &id);
- if (rc != 1)
- return -EINVAL;
-
- cxlr = __create_region(cxlrd, CXL_REGION_RAM, id);
- if (IS_ERR(cxlr))
- return PTR_ERR(cxlr);
-
- return len;
+ return create_region_store(dev, buf, len, CXL_REGION_RAM);
}
DEVICE_ATTR_RW(create_ram_region);
--
2.45.2
next prev parent reply other threads:[~2024-08-16 14:00 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-16 13:59 [PATCH v2 00/25] DCD: Add support for Dynamic Capacity Devices (DCD) Ira Weiny
2024-08-16 13:59 ` [PATCH v2 01/25] range: Add range_overlaps() Ira Weiny
2024-08-16 13:59 ` [PATCH v2 02/25] printk: Add print format (%par) for struct range Ira Weiny
2024-08-16 13:59 ` [PATCH v2 03/25] dax: Document dax dev range tuple Ira Weiny
2024-08-16 13:59 ` [PATCH v2 04/25] cxl/pci: Delay event buffer allocation Ira Weiny
2024-08-16 13:59 ` [PATCH v2 05/25] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) ira.weiny
2024-08-16 13:59 ` [PATCH v2 06/25] cxl/mem: Read dynamic capacity configuration from the device ira.weiny
2024-08-16 13:59 ` [PATCH v2 07/25] cxl/core: Separate region mode from decoder mode ira.weiny
2024-08-16 13:59 ` [PATCH v2 08/25] cxl/region: Add dynamic capacity decoder and region modes ira.weiny
2024-08-16 13:59 ` [PATCH v2 09/25] cxl/hdm: Add dynamic capacity size support to endpoint decoders ira.weiny
2024-08-16 13:59 ` [PATCH v2 10/25] cxl/port: Add endpoint decoder DC mode support to sysfs ira.weiny
2024-08-16 13:59 ` [PATCH v2 11/25] cxl/mem: Expose DCD partition capabilities in sysfs ira.weiny
2024-08-16 14:00 ` Ira Weiny [this message]
2024-08-16 14:00 ` [PATCH v2 13/25] cxl/region: Add sparse DAX region support ira.weiny
2024-08-16 14:00 ` [PATCH v2 14/25] cxl/events: Split event msgnum configuration from irq setup Ira Weiny
2024-08-16 14:00 ` [PATCH v2 15/25] cxl/pci: Factor out interrupt policy check Ira Weiny
2024-08-16 14:00 ` [PATCH v2 16/25] cxl/mem: Configure dynamic capacity interrupts ira.weiny
2024-08-16 14:00 ` [PATCH v2 17/25] cxl/core: Return endpoint decoder information from region search Ira Weiny
2024-08-16 14:00 ` [PATCH v2 18/25] cxl/extent: Process DCD events and realize region extents ira.weiny
2024-08-16 14:00 ` [PATCH v2 19/25] cxl/region/extent: Expose region extent information in sysfs ira.weiny
2024-08-16 14:00 ` [PATCH v2 20/25] dax/bus: Factor out dev dax resize logic Ira Weiny
2024-08-16 14:00 ` [PATCH v2 21/25] dax/region: Create resources on sparse DAX regions Ira Weiny
2024-08-16 14:17 ` [PATCH v2 00/25] DCD: Add support for Dynamic Capacity Devices (DCD) Ira Weiny
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