From: Ira Weiny <ira.weiny@intel.com>
To: Dave Jiang <dave.jiang@intel.com>, Fan Ni <fan.ni@samsung.com>,
Jonathan Cameron <Jonathan.Cameron@huawei.com>,
Navneet Singh <navneet.singh@intel.com>
Cc: Dan Williams <dan.j.williams@intel.com>,
Davidlohr Bueso <dave@stgolabs.net>,
Alison Schofield <alison.schofield@intel.com>,
Vishal Verma <vishal.l.verma@intel.com>,
Ira Weiny <ira.weiny@intel.com>,
linux-btrfs@vger.kernel.org, linux-cxl@vger.kernel.org,
linux-kernel@vger.kernel.org
Subject: [PATCH v2 15/25] cxl/pci: Factor out interrupt policy check
Date: Fri, 16 Aug 2024 09:00:03 -0500 [thread overview]
Message-ID: <20240816-dcd-type2-upstream-v2-15-20189a10ad7d@intel.com> (raw)
In-Reply-To: <20240816-dcd-type2-upstream-v2-0-20189a10ad7d@intel.com>
Dynamic Capacity Devices (DCD) require event interrupts to process
memory addition or removal. BIOS may have control over non-DCD event
processing. DCD interrupt configuration needs to be separate from
memory event interrupt configuration.
Factor out event interrupt setting validation.
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Signed-off-by: Ira Weiny <ira.weiny@intel.com>
---
Changes:
[iweiny: reword commit message]
[iweiny: keep review tags on simple patch]
---
drivers/cxl/pci.c | 23 ++++++++++++++++-------
1 file changed, 16 insertions(+), 7 deletions(-)
diff --git a/drivers/cxl/pci.c b/drivers/cxl/pci.c
index 17bea49bbf4d..370c74eae323 100644
--- a/drivers/cxl/pci.c
+++ b/drivers/cxl/pci.c
@@ -738,6 +738,21 @@ static bool cxl_event_int_is_fw(u8 setting)
return mode == CXL_INT_FW;
}
+static bool cxl_event_validate_mem_policy(struct cxl_memdev_state *mds,
+ struct cxl_event_interrupt_policy *policy)
+{
+ if (cxl_event_int_is_fw(policy->info_settings) ||
+ cxl_event_int_is_fw(policy->warn_settings) ||
+ cxl_event_int_is_fw(policy->failure_settings) ||
+ cxl_event_int_is_fw(policy->fatal_settings)) {
+ dev_err(mds->cxlds.dev,
+ "FW still in control of Event Logs despite _OSC settings\n");
+ return false;
+ }
+
+ return true;
+}
+
static int cxl_event_config(struct pci_host_bridge *host_bridge,
struct cxl_memdev_state *mds, bool irq_avail)
{
@@ -760,14 +775,8 @@ static int cxl_event_config(struct pci_host_bridge *host_bridge,
if (rc)
return rc;
- if (cxl_event_int_is_fw(policy.info_settings) ||
- cxl_event_int_is_fw(policy.warn_settings) ||
- cxl_event_int_is_fw(policy.failure_settings) ||
- cxl_event_int_is_fw(policy.fatal_settings)) {
- dev_err(mds->cxlds.dev,
- "FW still in control of Event Logs despite _OSC settings\n");
+ if (!cxl_event_validate_mem_policy(mds, &policy))
return -EBUSY;
- }
rc = cxl_event_config_msgnums(mds, &policy);
if (rc)
--
2.45.2
next prev parent reply other threads:[~2024-08-16 14:00 UTC|newest]
Thread overview: 23+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-08-16 13:59 [PATCH v2 00/25] DCD: Add support for Dynamic Capacity Devices (DCD) Ira Weiny
2024-08-16 13:59 ` [PATCH v2 01/25] range: Add range_overlaps() Ira Weiny
2024-08-16 13:59 ` [PATCH v2 02/25] printk: Add print format (%par) for struct range Ira Weiny
2024-08-16 13:59 ` [PATCH v2 03/25] dax: Document dax dev range tuple Ira Weiny
2024-08-16 13:59 ` [PATCH v2 04/25] cxl/pci: Delay event buffer allocation Ira Weiny
2024-08-16 13:59 ` [PATCH v2 05/25] cxl/mbox: Flag support for Dynamic Capacity Devices (DCD) ira.weiny
2024-08-16 13:59 ` [PATCH v2 06/25] cxl/mem: Read dynamic capacity configuration from the device ira.weiny
2024-08-16 13:59 ` [PATCH v2 07/25] cxl/core: Separate region mode from decoder mode ira.weiny
2024-08-16 13:59 ` [PATCH v2 08/25] cxl/region: Add dynamic capacity decoder and region modes ira.weiny
2024-08-16 13:59 ` [PATCH v2 09/25] cxl/hdm: Add dynamic capacity size support to endpoint decoders ira.weiny
2024-08-16 13:59 ` [PATCH v2 10/25] cxl/port: Add endpoint decoder DC mode support to sysfs ira.weiny
2024-08-16 13:59 ` [PATCH v2 11/25] cxl/mem: Expose DCD partition capabilities in sysfs ira.weiny
2024-08-16 14:00 ` [PATCH v2 12/25] cxl/region: Refactor common create region code Ira Weiny
2024-08-16 14:00 ` [PATCH v2 13/25] cxl/region: Add sparse DAX region support ira.weiny
2024-08-16 14:00 ` [PATCH v2 14/25] cxl/events: Split event msgnum configuration from irq setup Ira Weiny
2024-08-16 14:00 ` Ira Weiny [this message]
2024-08-16 14:00 ` [PATCH v2 16/25] cxl/mem: Configure dynamic capacity interrupts ira.weiny
2024-08-16 14:00 ` [PATCH v2 17/25] cxl/core: Return endpoint decoder information from region search Ira Weiny
2024-08-16 14:00 ` [PATCH v2 18/25] cxl/extent: Process DCD events and realize region extents ira.weiny
2024-08-16 14:00 ` [PATCH v2 19/25] cxl/region/extent: Expose region extent information in sysfs ira.weiny
2024-08-16 14:00 ` [PATCH v2 20/25] dax/bus: Factor out dev dax resize logic Ira Weiny
2024-08-16 14:00 ` [PATCH v2 21/25] dax/region: Create resources on sparse DAX regions Ira Weiny
2024-08-16 14:17 ` [PATCH v2 00/25] DCD: Add support for Dynamic Capacity Devices (DCD) Ira Weiny
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