* [PATCH v2 1/7] btrfs-progs: cleanup inline asm usage
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
@ 2026-11-09 4:09 ` Qu Wenruo
2026-11-09 4:09 ` [PATCH v2 2/7] btrfs-progs: crypto/crc32c: port crc32c-pcl optimization to C Qu Wenruo
` (5 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:09 UTC (permalink / raw)
To: linux-btrfs
Both clang and gcc have lowlevel instruction wrappers already, there is
no need to use inline asm just for several small operations like cpuid.
The cleanup includes:
- Use compiler wrappers to replace inlined asm
- Add dedicated target attributes for involved hardware acceleration
Asssited-by: LLM (locating the wrappers)
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
common/cpu-utils.c | 31 ++++-------------------------
crypto/crc32c.c | 20 ++++++++-----------
crypto/hash-speedtest.c | 14 +++-----------
libbtrfs/crc32c.c | 43 +++++++++++------------------------------
4 files changed, 26 insertions(+), 82 deletions(-)
diff --git a/common/cpu-utils.c b/common/cpu-utils.c
index 32914d360e63..a99efb932ff2 100644
--- a/common/cpu-utils.c
+++ b/common/cpu-utils.c
@@ -15,37 +15,14 @@
*/
#include <stdio.h>
+#ifdef __x86_64__
+#include <cpuid.h>
+#endif
#include "common/cpu-utils.h"
unsigned long __cpu_flags = CPU_FLAG_NONE;
unsigned long __cpu_flags_orig = CPU_FLAG_NONE;
-#ifdef __x86_64__
-/*
- * Do manual cpuid as cpuid.h is not available for all versions.
- *
- * Plain cpuid(level) is __cpuidex(level, 0), otherwise look for the leaf/subleaf
- * modes at https://en.wikipedia.org/wiki/CPUID or compilers' cpuid.h.
- */
-
-#ifndef __cpuidex
-#define __cpuidex(leaf, subleaf, a, b, c, d) \
- __asm__ __volatile__ ("cpuid\n\t" \
- : "=a" (a), "=b" (b), "=c" (c), "=d" (d) \
- : "0" (leaf), "2" (subleaf))
-#endif
-
-#else
-
-#define __cpuidex(leaf, subleaf, a, b, c, d) \
- do { \
- a = 0; \
- b = 0; \
- c = 0; \
- d = 0; \
- } while(0)
-#endif
-
#define FLAG(name) if (__cpu_flags & CPU_FLAG_ ## name) printf(" " #name)
void cpu_print_flags(void) {
printf("CPU flags: 0x%lx\n", __cpu_flags);
@@ -88,7 +65,7 @@ void cpu_detect_flags(void)
__cpu_flags |= CPU_FLAG_AVX2;
/* Flags unsupported by builtins */
- __cpuidex(7, 0, a, b, c, d);
+ __cpuid_count(7, 0, a, b, c, d);
if (b & (1UL << 29))
__cpu_flags |= CPU_FLAG_SHA;
diff --git a/crypto/crc32c.c b/crypto/crc32c.c
index f0a23f836741..9a3c9fc14eab 100644
--- a/crypto/crc32c.c
+++ b/crypto/crc32c.c
@@ -18,6 +18,8 @@ static uint32_t (*crc32c_impl)(uint32_t crc, unsigned char const *data, uint32_t
#ifdef __x86_64__
+#include <nmmintrin.h>
+
/* asmlinkage */ unsigned int crc_pcl(const unsigned char *buffer, unsigned int len, unsigned int crc_init);
static unsigned int crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len) {
return crc_pcl(data, len, crc);
@@ -34,22 +36,19 @@ static unsigned int crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t
* Volume 2A: Instruction Set Reference, A-M
*/
#if __SIZEOF_LONG__ == 8
-#define REX_PRE "0x48, "
#define SCALE_F 8
+#define crc32c_hw_long(crc, v) _mm_crc32_u64((crc), (v))
#else
-#define REX_PRE
#define SCALE_F 4
+#define crc32c_hw_long(crc, v) _mm_crc32_u32((crc), (v))
#endif
+__attribute__((target("sse4.2")))
static uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
uint32_t length)
{
while (length--) {
- __asm__ __volatile__(
- ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
- :"=S"(crc)
- :"0"(crc), "c"(*data)
- );
+ crc = _mm_crc32_u8(crc, *data);
data++;
}
@@ -61,6 +60,7 @@ static uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
* Steps through buffer one byte at at time, calculates reflected crc using
* table.
*/
+__attribute__((target("sse4.2")))
static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t length)
{
unsigned int iquotient = length / SCALE_F;
@@ -68,11 +68,7 @@ static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t l
unsigned long *ptmp = (unsigned long *)data;
while (iquotient--) {
- __asm__ __volatile__(
- ".byte 0xf2, " REX_PRE "0xf, 0x38, 0xf1, 0xf1;"
- :"=S"(crc)
- :"0"(crc), "c"(*ptmp)
- );
+ crc = crc32c_hw_long(crc, *ptmp);
ptmp++;
}
diff --git a/crypto/hash-speedtest.c b/crypto/hash-speedtest.c
index 6caa89f7d6f8..95ba63ee6025 100644
--- a/crypto/hash-speedtest.c
+++ b/crypto/hash-speedtest.c
@@ -30,6 +30,7 @@
#include "common/cpu-utils.h"
#ifdef __x86_64__
+#include <x86intrin.h>
static const int cycles_supported = 1;
#else
static const int cycles_supported = 0;
@@ -45,19 +46,10 @@ const int blocksize = 4096;
int iterations = 100000;
#ifdef __x86_64__
-static __always_inline unsigned long long rdtsc(void)
-{
- unsigned low, high;
-
- asm volatile("rdtsc" : "=a" (low), "=d" (high));
-
- return (low | ((u64)(high) << 32));
-}
-
static inline u64 read_tsc(void)
{
- asm volatile("mfence");
- return rdtsc();
+ _mm_mfence();
+ return __rdtsc();
}
#define cpu_cycles() read_tsc()
diff --git a/libbtrfs/crc32c.c b/libbtrfs/crc32c.c
index 4391e46f16ee..14c1694a2823 100644
--- a/libbtrfs/crc32c.c
+++ b/libbtrfs/crc32c.c
@@ -16,6 +16,9 @@ static uint32_t (*crc_function)(uint32_t crc, unsigned char const *data, uint32_
#ifdef __x86_64__
+#include <cpuid.h>
+#include <nmmintrin.h>
+
/*
* Based on a posting to lkml by Austin Zhang <austin.zhang@intel.com>
*
@@ -27,25 +30,22 @@ static uint32_t (*crc_function)(uint32_t crc, unsigned char const *data, uint32_
* Volume 2A: Instruction Set Reference, A-M
*/
#if __SIZEOF_LONG__ == 8
-#define REX_PRE "0x48, "
#define SCALE_F 8
+#define crc32c_hw_long(crc, v) _mm_crc32_u64((crc), (v))
#else
-#define REX_PRE
#define SCALE_F 4
+#define crc32c_hw_long(crc, v) _mm_crc32_u32((crc), (v))
#endif
static int crc32c_probed = 0;
static int crc32c_intel_available = 0;
+__attribute__((target("sse4.2")))
static uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
uint32_t length)
{
while (length--) {
- __asm__ __volatile__(
- ".byte 0xf2, 0xf, 0x38, 0xf0, 0xf1"
- :"=S"(crc)
- :"0"(crc), "c"(*data)
- );
+ crc = _mm_crc32_u8(crc, *data);
data++;
}
@@ -56,6 +56,7 @@ static uint32_t crc32c_intel_le_hw_byte(uint32_t crc, unsigned char const *data,
* Steps through buffer one byte at at time, calculates reflected
* crc using table.
*/
+__attribute__((target("sse4.2")))
static uint32_t crc32c_intel(uint32_t crc, unsigned char const *data, uint32_t length)
{
unsigned int iquotient = length / SCALE_F;
@@ -63,11 +64,7 @@ static uint32_t crc32c_intel(uint32_t crc, unsigned char const *data, uint32_t l
unsigned long *ptmp = (unsigned long *)data;
while (iquotient--) {
- __asm__ __volatile__(
- ".byte 0xf2, " REX_PRE "0xf, 0x38, 0xf1, 0xf1;"
- :"=S"(crc)
- :"0"(crc), "c"(*ptmp)
- );
+ crc = crc32c_hw_long(crc, *ptmp);
ptmp++;
}
@@ -78,31 +75,13 @@ static uint32_t crc32c_intel(uint32_t crc, unsigned char const *data, uint32_t l
return crc;
}
-static void do_cpuid(unsigned int *eax, unsigned int *ebx, unsigned int *ecx,
- unsigned int *edx)
-{
- int id = *eax;
-
- asm("movl %4, %%eax;"
- "cpuid;"
- "movl %%eax, %0;"
- "movl %%ebx, %1;"
- "movl %%ecx, %2;"
- "movl %%edx, %3;"
- : "=r" (*eax), "=r" (*ebx), "=r" (*ecx), "=r" (*edx)
- : "r" (id)
- : "eax", "ebx", "ecx", "edx");
-}
-
static void crc32c_intel_probe(void)
{
if (!crc32c_probed) {
unsigned int eax, ebx, ecx, edx;
- eax = 1;
-
- do_cpuid(&eax, &ebx, &ecx, &edx);
- crc32c_intel_available = (ecx & (1U << 20)) != 0;
+ __cpuid(1, eax, ebx, ecx, edx);
+ crc32c_intel_available = (ecx & bit_SSE4_2) != 0;
crc32c_probed = 1;
}
}
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 2/7] btrfs-progs: crypto/crc32c: port crc32c-pcl optimization to C
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
2026-11-09 4:09 ` [PATCH v2 1/7] btrfs-progs: cleanup inline asm usage Qu Wenruo
@ 2026-11-09 4:09 ` Qu Wenruo
2026-11-11 16:58 ` good crcs in userspace, " Christoph Hellwig
2026-11-09 4:09 ` [PATCH v2 3/7] btrfs-progs: rename cpu features to prepare for other archs Qu Wenruo
` (4 subsequent siblings)
6 siblings, 1 reply; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:09 UTC (permalink / raw)
To: linux-btrfs
This is inspired by Google's CRC32C library which has all the hardware
acceleration, but without any ASM code.
The idea is to use compiler wrapped commands instead of the hand written
ASM code.
The performance is at the same level as the old code:
The hardware is Ryzen 9 HX 370, on a single CPU core, unit is GiB/s.
Size | Old (asm) | New (C)
-----------+-------------+-------------
64 B | 4.76–4.80 | 4.80–4.82
256 B | 8.76–8.88 | 8.82–8.87
1 KiB | 12.26–12.41 | 12.47–12.51
4 KiB | 13.35–13.49 | 13.48
16 KiB | 13.69–13.78 | 13.66–13.79
64 KiB | 13.73–13.83 | 13.75–13.83
1 MiB | 13.62–13.72 | 13.61–13.63
We should have a better hash-vectest to cover larger block sizes, but
that will be added later by the newer ARMv8 CRC optimization.
Asssited-by: LLM (code porting, testing)
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
Makefile | 14 --
crypto/crc32c-pcl-intel-asm_64.S | 370 -------------------------------
crypto/crc32c.c | 262 +++++++++++++++++++++-
3 files changed, 258 insertions(+), 388 deletions(-)
delete mode 100644 crypto/crc32c-pcl-intel-asm_64.S
diff --git a/Makefile b/Makefile
index 78c23ad3c694..e5a5534b4fb7 100644
--- a/Makefile
+++ b/Makefile
@@ -107,8 +107,6 @@ ENABLE_WARNING_FLAGS := $(call cc-option, -Wimplicit-fallthrough) \
$(call cc-option, -Wmissing-prototypes) \
-Wshadow
-ASFLAGS =
-
# Common build flags
CFLAGS = $(SUBST_CFLAGS) \
-std=gnu11 \
@@ -413,11 +411,6 @@ CRYPTO_OBJECTS = crypto/sha224-256.o crypto/blake2b-ref.o crypto/blake2b-sse2.o
CRYPTO_CFLAGS = -DCRYPTOPROVIDER_BUILTIN=1
endif
-ifeq ($(TARGET_CPU),x86_64)
-CRYPTO_OBJECTS += crypto/crc32c-pcl-intel-asm_64.o
-ASFLAGS += -fPIC
-endif
-
CHECKER_FLAGS += $(btrfs_convert_cflags)
# collect values of the variables above
@@ -478,13 +471,6 @@ else
check_echo = true
endif
-.S.o:
- @echo " AS $@"
- $(Q)$(CC) $(CFLAGS) $(ASFLAGS) -c $< -o $@
-
-%.static.o: %.S
- @echo " AS $@"
- $(Q)$(CC) $(CFLAGS) $(ASFLAGS) -c $< -o $@
#
# Pick from per-file variables, btrfs_*_cflags
#
diff --git a/crypto/crc32c-pcl-intel-asm_64.S b/crypto/crc32c-pcl-intel-asm_64.S
deleted file mode 100644
index f87e62bdf345..000000000000
--- a/crypto/crc32c-pcl-intel-asm_64.S
+++ /dev/null
@@ -1,370 +0,0 @@
-/*
- * Implement fast CRC32C with PCLMULQDQ instructions. (x86_64)
- *
- * The white papers on CRC32C calculations with PCLMULQDQ instruction can be
- * downloaded from:
- * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/crc-iscsi-polynomial-crc32-instruction-paper.pdf
- * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-paper.pdf
- *
- * Copyright (C) 2012 Intel Corporation.
- * Copyright 2024 Google LLC
- *
- * Authors:
- * Wajdi Feghali <wajdi.k.feghali@intel.com>
- * James Guilford <james.guilford@intel.com>
- * David Cote <david.m.cote@intel.com>
- * Tim Chen <tim.c.chen@linux.intel.com>
- *
- * This software is available to you under a choice of one of two
- * licenses. You may choose to be licensed under the terms of the GNU
- * General Public License (GPL) Version 2, available from the file
- * COPYING in the main directory of this source tree, or the
- * OpenIB.org BSD license below:
- *
- * Redistribution and use in source and binary forms, with or
- * without modification, are permitted provided that the following
- * conditions are met:
- *
- * - Redistributions of source code must retain the above
- * copyright notice, this list of conditions and the following
- * disclaimer.
- *
- * - Redistributions in binary form must reproduce the above
- * copyright notice, this list of conditions and the following
- * disclaimer in the documentation and/or other materials
- * provided with the distribution.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
- * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
- * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
- * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
- * SOFTWARE.
- */
-
-##include "linkage.h"
-
-#define ENDBR
-
-## ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction
-
-# Define threshold below which buffers are considered "small" and routed to
-# regular CRC code that does not interleave the CRC instructions.
-#define SMALL_SIZE 200
-
-# unsigned int crc_pcl(const u8 *buffer, unsigned int len, unsigned int crc_init);
-
-.text
-###SYM_FUNC_START(crc_pcl)
-.globl crc_pcl
-crc_pcl:
-###SYM_FUNC_START(crc_pcl)
-#define bufp %rdi
-#define bufp_d %edi
-#define len %esi
-#define crc_init %edx
-#define crc_init_q %rdx
-#define n_misaligned %ecx /* overlaps chunk_bytes! */
-#define n_misaligned_q %rcx
-#define chunk_bytes %ecx /* overlaps n_misaligned! */
-#define chunk_bytes_q %rcx
-#define crc1 %r8
-#define crc2 %r9
-
- cmp $SMALL_SIZE, len
- jb .Lsmall
-
- ################################################################
- ## 1) ALIGN:
- ################################################################
- mov bufp_d, n_misaligned
- neg n_misaligned
- and $7, n_misaligned # calculate the misalignment amount of
- # the address
- je .Laligned # Skip if aligned
-
- # Process 1 <= n_misaligned <= 7 bytes individually in order to align
- # the remaining data to an 8-byte boundary.
-.Ldo_align:
- movq (bufp), %rax
- add n_misaligned_q, bufp
- sub n_misaligned, len
-.Lalign_loop:
- crc32b %al, crc_init # compute crc32 of 1-byte
- shr $8, %rax # get next byte
- dec n_misaligned
- jne .Lalign_loop
-.Laligned:
-
- ################################################################
- ## 2) PROCESS BLOCK:
- ################################################################
-
- cmp $128*24, len
- jae .Lfull_block
-
-.Lpartial_block:
- # Compute floor(len / 24) to get num qwords to process from each lane.
- imul $2731, len, %eax # 2731 = ceil(2^16 / 24)
- shr $16, %eax
- jmp .Lcrc_3lanes
-
-.Lfull_block:
- # Processing 128 qwords from each lane.
- mov $128, %eax
-
- ################################################################
- ## 3) CRC each of three lanes:
- ################################################################
-
-.Lcrc_3lanes:
- xor crc1,crc1
- xor crc2,crc2
- mov %eax, chunk_bytes
- shl $3, chunk_bytes # num bytes to process from each lane
- sub $5, %eax # 4 for 4x_loop, 1 for special last iter
- jl .Lcrc_3lanes_4x_done
-
- # Unroll the loop by a factor of 4 to reduce the overhead of the loop
- # bookkeeping instructions, which can compete with crc32q for the ALUs.
-.Lcrc_3lanes_4x_loop:
- crc32q (bufp), crc_init_q
- crc32q (bufp,chunk_bytes_q), crc1
- crc32q (bufp,chunk_bytes_q,2), crc2
- crc32q 8(bufp), crc_init_q
- crc32q 8(bufp,chunk_bytes_q), crc1
- crc32q 8(bufp,chunk_bytes_q,2), crc2
- crc32q 16(bufp), crc_init_q
- crc32q 16(bufp,chunk_bytes_q), crc1
- crc32q 16(bufp,chunk_bytes_q,2), crc2
- crc32q 24(bufp), crc_init_q
- crc32q 24(bufp,chunk_bytes_q), crc1
- crc32q 24(bufp,chunk_bytes_q,2), crc2
- add $32, bufp
- sub $4, %eax
- jge .Lcrc_3lanes_4x_loop
-
-.Lcrc_3lanes_4x_done:
- add $4, %eax
- jz .Lcrc_3lanes_last_qword
-
-.Lcrc_3lanes_1x_loop:
- crc32q (bufp), crc_init_q
- crc32q (bufp,chunk_bytes_q), crc1
- crc32q (bufp,chunk_bytes_q,2), crc2
- add $8, bufp
- dec %eax
- jnz .Lcrc_3lanes_1x_loop
-
-.Lcrc_3lanes_last_qword:
- crc32q (bufp), crc_init_q
- crc32q (bufp,chunk_bytes_q), crc1
-# SKIP crc32q (bufp,chunk_bytes_q,2), crc2 ; Don't do this one yet
-
- ################################################################
- ## 4) Combine three results:
- ################################################################
-
- lea (K_table-8)(%rip), %rax # first entry is for idx 1
- pmovzxdq (%rax,chunk_bytes_q), %xmm0 # 2 consts: K1:K2
- lea (chunk_bytes,chunk_bytes,2), %eax # chunk_bytes * 3
- sub %eax, len # len -= chunk_bytes * 3
-
- movq crc_init_q, %xmm1 # CRC for block 1
- pclmulqdq $0x00, %xmm0, %xmm1 # Multiply by K2
-
- movq crc1, %xmm2 # CRC for block 2
- pclmulqdq $0x10, %xmm0, %xmm2 # Multiply by K1
-
- pxor %xmm2,%xmm1
- movq %xmm1, %rax
- xor (bufp,chunk_bytes_q,2), %rax
- mov crc2, crc_init_q
- crc32 %rax, crc_init_q
- lea 8(bufp,chunk_bytes_q,2), bufp
-
- ################################################################
- ## 5) If more blocks remain, goto (2):
- ################################################################
-
- cmp $128*24, len
- jae .Lfull_block
- cmp $SMALL_SIZE, len
- jae .Lpartial_block
-
- #######################################################################
- ## 6) Process any remainder without interleaving:
- #######################################################################
-.Lsmall:
- test len, len
- jz .Ldone
- mov len, %eax
- shr $3, %eax
- jz .Ldo_dword
-.Ldo_qwords:
- crc32q (bufp), crc_init_q
- add $8, bufp
- dec %eax
- jnz .Ldo_qwords
-.Ldo_dword:
- test $4, len
- jz .Ldo_word
- crc32l (bufp), crc_init
- add $4, bufp
-.Ldo_word:
- test $2, len
- jz .Ldo_byte
- crc32w (bufp), crc_init
- add $2, bufp
-.Ldo_byte:
- test $1, len
- jz .Ldone
- crc32b (bufp), crc_init
-.Ldone:
- mov crc_init, %eax
- RET
-###SYM_FUNC_END(crc_pcl)
-.size crc_pcl, .-crc_pcl
-###SYM_FUNC_END(crc_pcl)
-
-.data
- ################################################################
- ## PCLMULQDQ tables
- ## Table is 128 entries x 2 words (8 bytes) each
- ################################################################
-.section .rodata, "a", @progbits
-.align 8
-K_table:
- .long 0x493c7d27, 0x00000001
- .long 0xba4fc28e, 0x493c7d27
- .long 0xddc0152b, 0xf20c0dfe
- .long 0x9e4addf8, 0xba4fc28e
- .long 0x39d3b296, 0x3da6d0cb
- .long 0x0715ce53, 0xddc0152b
- .long 0x47db8317, 0x1c291d04
- .long 0x0d3b6092, 0x9e4addf8
- .long 0xc96cfdc0, 0x740eef02
- .long 0x878a92a7, 0x39d3b296
- .long 0xdaece73e, 0x083a6eec
- .long 0xab7aff2a, 0x0715ce53
- .long 0x2162d385, 0xc49f4f67
- .long 0x83348832, 0x47db8317
- .long 0x299847d5, 0x2ad91c30
- .long 0xb9e02b86, 0x0d3b6092
- .long 0x18b33a4e, 0x6992cea2
- .long 0xb6dd949b, 0xc96cfdc0
- .long 0x78d9ccb7, 0x7e908048
- .long 0xbac2fd7b, 0x878a92a7
- .long 0xa60ce07b, 0x1b3d8f29
- .long 0xce7f39f4, 0xdaece73e
- .long 0x61d82e56, 0xf1d0f55e
- .long 0xd270f1a2, 0xab7aff2a
- .long 0xc619809d, 0xa87ab8a8
- .long 0x2b3cac5d, 0x2162d385
- .long 0x65863b64, 0x8462d800
- .long 0x1b03397f, 0x83348832
- .long 0xebb883bd, 0x71d111a8
- .long 0xb3e32c28, 0x299847d5
- .long 0x064f7f26, 0xffd852c6
- .long 0xdd7e3b0c, 0xb9e02b86
- .long 0xf285651c, 0xdcb17aa4
- .long 0x10746f3c, 0x18b33a4e
- .long 0xc7a68855, 0xf37c5aee
- .long 0x271d9844, 0xb6dd949b
- .long 0x8e766a0c, 0x6051d5a2
- .long 0x93a5f730, 0x78d9ccb7
- .long 0x6cb08e5c, 0x18b0d4ff
- .long 0x6b749fb2, 0xbac2fd7b
- .long 0x1393e203, 0x21f3d99c
- .long 0xcec3662e, 0xa60ce07b
- .long 0x96c515bb, 0x8f158014
- .long 0xe6fc4e6a, 0xce7f39f4
- .long 0x8227bb8a, 0xa00457f7
- .long 0xb0cd4768, 0x61d82e56
- .long 0x39c7ff35, 0x8d6d2c43
- .long 0xd7a4825c, 0xd270f1a2
- .long 0x0ab3844b, 0x00ac29cf
- .long 0x0167d312, 0xc619809d
- .long 0xf6076544, 0xe9adf796
- .long 0x26f6a60a, 0x2b3cac5d
- .long 0xa741c1bf, 0x96638b34
- .long 0x98d8d9cb, 0x65863b64
- .long 0x49c3cc9c, 0xe0e9f351
- .long 0x68bce87a, 0x1b03397f
- .long 0x57a3d037, 0x9af01f2d
- .long 0x6956fc3b, 0xebb883bd
- .long 0x42d98888, 0x2cff42cf
- .long 0x3771e98f, 0xb3e32c28
- .long 0xb42ae3d9, 0x88f25a3a
- .long 0x2178513a, 0x064f7f26
- .long 0xe0ac139e, 0x4e36f0b0
- .long 0x170076fa, 0xdd7e3b0c
- .long 0x444dd413, 0xbd6f81f8
- .long 0x6f345e45, 0xf285651c
- .long 0x41d17b64, 0x91c9bd4b
- .long 0xff0dba97, 0x10746f3c
- .long 0xa2b73df1, 0x885f087b
- .long 0xf872e54c, 0xc7a68855
- .long 0x1e41e9fc, 0x4c144932
- .long 0x86d8e4d2, 0x271d9844
- .long 0x651bd98b, 0x52148f02
- .long 0x5bb8f1bc, 0x8e766a0c
- .long 0xa90fd27a, 0xa3c6f37a
- .long 0xb3af077a, 0x93a5f730
- .long 0x4984d782, 0xd7c0557f
- .long 0xca6ef3ac, 0x6cb08e5c
- .long 0x234e0b26, 0x63ded06a
- .long 0xdd66cbbb, 0x6b749fb2
- .long 0x4597456a, 0x4d56973c
- .long 0xe9e28eb4, 0x1393e203
- .long 0x7b3ff57a, 0x9669c9df
- .long 0xc9c8b782, 0xcec3662e
- .long 0x3f70cc6f, 0xe417f38a
- .long 0x93e106a4, 0x96c515bb
- .long 0x62ec6c6d, 0x4b9e0f71
- .long 0xd813b325, 0xe6fc4e6a
- .long 0x0df04680, 0xd104b8fc
- .long 0x2342001e, 0x8227bb8a
- .long 0x0a2a8d7e, 0x5b397730
- .long 0x6d9a4957, 0xb0cd4768
- .long 0xe8b6368b, 0xe78eb416
- .long 0xd2c3ed1a, 0x39c7ff35
- .long 0x995a5724, 0x61ff0e01
- .long 0x9ef68d35, 0xd7a4825c
- .long 0x0c139b31, 0x8d96551c
- .long 0xf2271e60, 0x0ab3844b
- .long 0x0b0bf8ca, 0x0bf80dd2
- .long 0x2664fd8b, 0x0167d312
- .long 0xed64812d, 0x8821abed
- .long 0x02ee03b2, 0xf6076544
- .long 0x8604ae0f, 0x6a45d2b2
- .long 0x363bd6b3, 0x26f6a60a
- .long 0x135c83fd, 0xd8d26619
- .long 0x5fabe670, 0xa741c1bf
- .long 0x35ec3279, 0xde87806c
- .long 0x00bcf5f6, 0x98d8d9cb
- .long 0x8ae00689, 0x14338754
- .long 0x17f27698, 0x49c3cc9c
- .long 0x58ca5f00, 0x5bd2011f
- .long 0xaa7c7ad5, 0x68bce87a
- .long 0xb5cfca28, 0xdd07448e
- .long 0xded288f8, 0x57a3d037
- .long 0x59f229bc, 0xdde8f5b9
- .long 0x6d390dec, 0x6956fc3b
- .long 0x37170390, 0xa3e3e02c
- .long 0x6353c1cc, 0x42d98888
- .long 0xc4584f5c, 0xd73c7bea
- .long 0xf48642e9, 0x3771e98f
- .long 0x531377e2, 0x80ff0093
- .long 0xdd35bc8d, 0xb42ae3d9
- .long 0xb25b29f2, 0x8fe4c34d
- .long 0x9a5ede41, 0x2178513a
- .long 0xa563905d, 0xdf99fc11
- .long 0x45cddf4e, 0xe0ac139e
- .long 0xacfa3103, 0x6c23e841
- .long 0xa51b6135, 0x170076fa
-
-## Warning
-.section .note.GNU-stack,"",@progbits
diff --git a/crypto/crc32c.c b/crypto/crc32c.c
index 9a3c9fc14eab..daf232c44e4d 100644
--- a/crypto/crc32c.c
+++ b/crypto/crc32c.c
@@ -10,6 +10,7 @@
#include <inttypes.h>
#include <stdio.h>
+#include <string.h>
#include "crypto/crc32c.h"
#include "common/cpu-utils.h"
@@ -19,10 +20,262 @@ static uint32_t (*crc32c_impl)(uint32_t crc, unsigned char const *data, uint32_t
#ifdef __x86_64__
#include <nmmintrin.h>
+#include <wmmintrin.h>
-/* asmlinkage */ unsigned int crc_pcl(const unsigned char *buffer, unsigned int len, unsigned int crc_init);
-static unsigned int crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len) {
- return crc_pcl(data, len, crc);
+/*
+ * Fast CRC32C with PCLMULQDQ, three interleaved crc32 lanes combined with
+ * carry-less multiplication. Derived from the Intel implementation
+ * (crc32c-pcl-intel-asm_64.S in the kernel), available under GPLv2 or the
+ * OpenIB.org BSD license.
+ *
+ * Copyright (C) 2012 Intel Corporation.
+ * Copyright 2024 Google LLC
+ *
+ * Authors:
+ * Wajdi Feghali <wajdi.k.feghali@intel.com>
+ * James Guilford <james.guilford@intel.com>
+ * David Cote <david.m.cote@intel.com>
+ * Tim Chen <tim.c.chen@linux.intel.com>
+ */
+
+/* ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction */
+
+/*
+ * Define threshold below which buffers are considered "small" and routed to
+ * regular CRC code that does not interleave the CRC instructions.
+ */
+#define PCL_SMALL_SIZE 200
+
+/*
+ * PCLMULQDQ tables
+ * Table is 128 entries x 2 words (8 bytes) each. The first entry is for idx 1
+ * (one qword per lane), the constants are used as K1:K2 when combining lanes.
+ */
+static const uint32_t crc32c_pcl_k_table[128][2] = {
+ { 0x493c7d27, 0x00000001 },
+ { 0xba4fc28e, 0x493c7d27 },
+ { 0xddc0152b, 0xf20c0dfe },
+ { 0x9e4addf8, 0xba4fc28e },
+ { 0x39d3b296, 0x3da6d0cb },
+ { 0x0715ce53, 0xddc0152b },
+ { 0x47db8317, 0x1c291d04 },
+ { 0x0d3b6092, 0x9e4addf8 },
+ { 0xc96cfdc0, 0x740eef02 },
+ { 0x878a92a7, 0x39d3b296 },
+ { 0xdaece73e, 0x083a6eec },
+ { 0xab7aff2a, 0x0715ce53 },
+ { 0x2162d385, 0xc49f4f67 },
+ { 0x83348832, 0x47db8317 },
+ { 0x299847d5, 0x2ad91c30 },
+ { 0xb9e02b86, 0x0d3b6092 },
+ { 0x18b33a4e, 0x6992cea2 },
+ { 0xb6dd949b, 0xc96cfdc0 },
+ { 0x78d9ccb7, 0x7e908048 },
+ { 0xbac2fd7b, 0x878a92a7 },
+ { 0xa60ce07b, 0x1b3d8f29 },
+ { 0xce7f39f4, 0xdaece73e },
+ { 0x61d82e56, 0xf1d0f55e },
+ { 0xd270f1a2, 0xab7aff2a },
+ { 0xc619809d, 0xa87ab8a8 },
+ { 0x2b3cac5d, 0x2162d385 },
+ { 0x65863b64, 0x8462d800 },
+ { 0x1b03397f, 0x83348832 },
+ { 0xebb883bd, 0x71d111a8 },
+ { 0xb3e32c28, 0x299847d5 },
+ { 0x064f7f26, 0xffd852c6 },
+ { 0xdd7e3b0c, 0xb9e02b86 },
+ { 0xf285651c, 0xdcb17aa4 },
+ { 0x10746f3c, 0x18b33a4e },
+ { 0xc7a68855, 0xf37c5aee },
+ { 0x271d9844, 0xb6dd949b },
+ { 0x8e766a0c, 0x6051d5a2 },
+ { 0x93a5f730, 0x78d9ccb7 },
+ { 0x6cb08e5c, 0x18b0d4ff },
+ { 0x6b749fb2, 0xbac2fd7b },
+ { 0x1393e203, 0x21f3d99c },
+ { 0xcec3662e, 0xa60ce07b },
+ { 0x96c515bb, 0x8f158014 },
+ { 0xe6fc4e6a, 0xce7f39f4 },
+ { 0x8227bb8a, 0xa00457f7 },
+ { 0xb0cd4768, 0x61d82e56 },
+ { 0x39c7ff35, 0x8d6d2c43 },
+ { 0xd7a4825c, 0xd270f1a2 },
+ { 0x0ab3844b, 0x00ac29cf },
+ { 0x0167d312, 0xc619809d },
+ { 0xf6076544, 0xe9adf796 },
+ { 0x26f6a60a, 0x2b3cac5d },
+ { 0xa741c1bf, 0x96638b34 },
+ { 0x98d8d9cb, 0x65863b64 },
+ { 0x49c3cc9c, 0xe0e9f351 },
+ { 0x68bce87a, 0x1b03397f },
+ { 0x57a3d037, 0x9af01f2d },
+ { 0x6956fc3b, 0xebb883bd },
+ { 0x42d98888, 0x2cff42cf },
+ { 0x3771e98f, 0xb3e32c28 },
+ { 0xb42ae3d9, 0x88f25a3a },
+ { 0x2178513a, 0x064f7f26 },
+ { 0xe0ac139e, 0x4e36f0b0 },
+ { 0x170076fa, 0xdd7e3b0c },
+ { 0x444dd413, 0xbd6f81f8 },
+ { 0x6f345e45, 0xf285651c },
+ { 0x41d17b64, 0x91c9bd4b },
+ { 0xff0dba97, 0x10746f3c },
+ { 0xa2b73df1, 0x885f087b },
+ { 0xf872e54c, 0xc7a68855 },
+ { 0x1e41e9fc, 0x4c144932 },
+ { 0x86d8e4d2, 0x271d9844 },
+ { 0x651bd98b, 0x52148f02 },
+ { 0x5bb8f1bc, 0x8e766a0c },
+ { 0xa90fd27a, 0xa3c6f37a },
+ { 0xb3af077a, 0x93a5f730 },
+ { 0x4984d782, 0xd7c0557f },
+ { 0xca6ef3ac, 0x6cb08e5c },
+ { 0x234e0b26, 0x63ded06a },
+ { 0xdd66cbbb, 0x6b749fb2 },
+ { 0x4597456a, 0x4d56973c },
+ { 0xe9e28eb4, 0x1393e203 },
+ { 0x7b3ff57a, 0x9669c9df },
+ { 0xc9c8b782, 0xcec3662e },
+ { 0x3f70cc6f, 0xe417f38a },
+ { 0x93e106a4, 0x96c515bb },
+ { 0x62ec6c6d, 0x4b9e0f71 },
+ { 0xd813b325, 0xe6fc4e6a },
+ { 0x0df04680, 0xd104b8fc },
+ { 0x2342001e, 0x8227bb8a },
+ { 0x0a2a8d7e, 0x5b397730 },
+ { 0x6d9a4957, 0xb0cd4768 },
+ { 0xe8b6368b, 0xe78eb416 },
+ { 0xd2c3ed1a, 0x39c7ff35 },
+ { 0x995a5724, 0x61ff0e01 },
+ { 0x9ef68d35, 0xd7a4825c },
+ { 0x0c139b31, 0x8d96551c },
+ { 0xf2271e60, 0x0ab3844b },
+ { 0x0b0bf8ca, 0x0bf80dd2 },
+ { 0x2664fd8b, 0x0167d312 },
+ { 0xed64812d, 0x8821abed },
+ { 0x02ee03b2, 0xf6076544 },
+ { 0x8604ae0f, 0x6a45d2b2 },
+ { 0x363bd6b3, 0x26f6a60a },
+ { 0x135c83fd, 0xd8d26619 },
+ { 0x5fabe670, 0xa741c1bf },
+ { 0x35ec3279, 0xde87806c },
+ { 0x00bcf5f6, 0x98d8d9cb },
+ { 0x8ae00689, 0x14338754 },
+ { 0x17f27698, 0x49c3cc9c },
+ { 0x58ca5f00, 0x5bd2011f },
+ { 0xaa7c7ad5, 0x68bce87a },
+ { 0xb5cfca28, 0xdd07448e },
+ { 0xded288f8, 0x57a3d037 },
+ { 0x59f229bc, 0xdde8f5b9 },
+ { 0x6d390dec, 0x6956fc3b },
+ { 0x37170390, 0xa3e3e02c },
+ { 0x6353c1cc, 0x42d98888 },
+ { 0xc4584f5c, 0xd73c7bea },
+ { 0xf48642e9, 0x3771e98f },
+ { 0x531377e2, 0x80ff0093 },
+ { 0xdd35bc8d, 0xb42ae3d9 },
+ { 0xb25b29f2, 0x8fe4c34d },
+ { 0x9a5ede41, 0x2178513a },
+ { 0xa563905d, 0xdf99fc11 },
+ { 0x45cddf4e, 0xe0ac139e },
+ { 0xacfa3103, 0x6c23e841 },
+ { 0xa51b6135, 0x170076fa },
+};
+
+static inline uint64_t crc32c_load64(const unsigned char *p)
+{
+ uint64_t v;
+
+ memcpy(&v, p, sizeof(v));
+ return v;
+}
+
+__attribute__((target("sse4.2,pclmul")))
+static uint32_t crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len)
+{
+ uint64_t crc0 = crc;
+
+ if (len >= PCL_SMALL_SIZE) {
+ unsigned int misaligned = -(uintptr_t)data & 7;
+
+ /*
+ * 1) ALIGN:
+ * Process 1 <= misaligned <= 7 bytes individually in order to
+ * align the remaining data to an 8-byte boundary.
+ */
+ len -= misaligned;
+ while (misaligned--)
+ crc0 = _mm_crc32_u8(crc0, *data++);
+ }
+
+ /*
+ * 2) PROCESS BLOCK:
+ * 5) If more blocks remain, repeat from here.
+ */
+ while (len >= PCL_SMALL_SIZE) {
+ /*
+ * Processing 128 qwords from each lane for a full block,
+ * otherwise compute floor(len / 24) to get the number of qwords
+ * to process from each lane. 2731 = ceil(2^16 / 24)
+ */
+ unsigned int qwords = len >= 128 * 24 ? 128 : (len * 2731) >> 16;
+ unsigned int chunk = qwords * 8;
+ const uint32_t *k = crc32c_pcl_k_table[qwords - 1];
+ const unsigned char *p1 = data + chunk;
+ const unsigned char *p2 = data + 2 * chunk;
+ uint64_t crc1 = 0, crc2 = 0;
+ __m128i kvec, x1, x2;
+ unsigned int i;
+
+ /* 3) CRC each of three lanes: */
+ for (i = 0; i < qwords - 1; i++) {
+ crc0 = _mm_crc32_u64(crc0, crc32c_load64(data + i * 8));
+ crc1 = _mm_crc32_u64(crc1, crc32c_load64(p1 + i * 8));
+ crc2 = _mm_crc32_u64(crc2, crc32c_load64(p2 + i * 8));
+ }
+ crc0 = _mm_crc32_u64(crc0, crc32c_load64(data + i * 8));
+ crc1 = _mm_crc32_u64(crc1, crc32c_load64(p1 + i * 8));
+ /* SKIP the last qword of crc2, don't do this one yet */
+
+ /* 4) Combine three results: */
+ /* 2 consts: K1:K2 */
+ kvec = _mm_set_epi64x(k[1], k[0]);
+ /* CRC for block 1, multiply by K2 */
+ x1 = _mm_clmulepi64_si128(_mm_cvtsi64_si128(crc0), kvec, 0x00);
+ /* CRC for block 2, multiply by K1 */
+ x2 = _mm_clmulepi64_si128(_mm_cvtsi64_si128(crc1), kvec, 0x10);
+ x1 = _mm_xor_si128(x1, x2);
+ crc0 = _mm_crc32_u64(crc2, _mm_cvtsi128_si64(x1) ^
+ crc32c_load64(p2 + i * 8));
+
+ data += 3 * chunk;
+ len -= 3 * chunk;
+ }
+
+ /* 6) Process any remainder without interleaving: */
+ while (len >= 8) {
+ crc0 = _mm_crc32_u64(crc0, crc32c_load64(data));
+ data += 8;
+ len -= 8;
+ }
+ if (len & 4) {
+ uint32_t v;
+
+ memcpy(&v, data, sizeof(v));
+ crc0 = _mm_crc32_u32(crc0, v);
+ data += 4;
+ }
+ if (len & 2) {
+ uint16_t v;
+
+ memcpy(&v, data, sizeof(v));
+ crc0 = _mm_crc32_u16(crc0, v);
+ data += 2;
+ }
+ if (len & 1)
+ crc0 = _mm_crc32_u8(crc0, *data);
+
+ return crc0;
}
/*
@@ -82,7 +335,8 @@ static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t l
void crc32c_init_accel(void)
{
if (0) {
- } else if (cpu_has_feature(CPU_FLAG_PCLMUL)) {
+ } else if (cpu_has_feature(CPU_FLAG_PCLMUL) &&
+ cpu_has_feature(CPU_FLAG_SSE42)) {
/* printf("CRC32C: pcl\n"); */
crc32c_impl = crc32c_pcl;
} else if (cpu_has_feature(CPU_FLAG_SSE42)) {
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* good crcs in userspace, Re: [PATCH v2 2/7] btrfs-progs: crypto/crc32c: port crc32c-pcl optimization to C
2026-11-09 4:09 ` [PATCH v2 2/7] btrfs-progs: crypto/crc32c: port crc32c-pcl optimization to C Qu Wenruo
@ 2026-11-11 16:58 ` Christoph Hellwig
2026-11-11 20:28 ` Qu Wenruo
0 siblings, 1 reply; 10+ messages in thread
From: Christoph Hellwig @ 2026-11-11 16:58 UTC (permalink / raw)
To: Qu Wenruo; +Cc: linux-btrfs, linux-xfs, Anuj Gupta, Eric Biggers
Hi Qu,
trying to hijack this a bit. We have a few uses for crcs in userspace.
Your btrfs code, libxfs which already has a very unoptimized crc32c and
I recently added a similarly basic crc64. For PI passthrough through
I/O uring we need crc16, crc32c and crc64, and I plan to also extend
this to file system checksums though io_uring.
I've been wondering what the recommended crc implementation for userspace
is or should be. The only google library I found was in c++ so it is
not very useful. Intel's ISA-L has fairly optimized implementations,
but it's a giant messy library doing more than just CRC. I briefly
thought about porting the kernel code to userspace, but the conversion
of kernel static branches to userspace concepts is non-trivial. Also
a GPL license might be a bit limiting as a lot of storage software the
could make good use of it is Apache license.
So no good answer on how to do it, but having some really well defined
library for userspace crc needs would be really neat and better than
everyone rolling their own.
On Mon, Nov 09, 2026 at 02:39:56PM +1030, Qu Wenruo wrote:
> This is inspired by Google's CRC32C library which has all the hardware
> acceleration, but without any ASM code.
>
> The idea is to use compiler wrapped commands instead of the hand written
> ASM code.
>
> The performance is at the same level as the old code:
>
> The hardware is Ryzen 9 HX 370, on a single CPU core, unit is GiB/s.
>
> Size | Old (asm) | New (C)
> -----------+-------------+-------------
> 64 B | 4.76–4.80 | 4.80–4.82
> 256 B | 8.76–8.88 | 8.82–8.87
> 1 KiB | 12.26–12.41 | 12.47–12.51
> 4 KiB | 13.35–13.49 | 13.48
> 16 KiB | 13.69–13.78 | 13.66–13.79
> 64 KiB | 13.73–13.83 | 13.75–13.83
> 1 MiB | 13.62–13.72 | 13.61–13.63
>
> We should have a better hash-vectest to cover larger block sizes, but
> that will be added later by the newer ARMv8 CRC optimization.
>
> Asssited-by: LLM (code porting, testing)
> Signed-off-by: Qu Wenruo <wqu@suse.com>
> ---
> Makefile | 14 --
> crypto/crc32c-pcl-intel-asm_64.S | 370 -------------------------------
> crypto/crc32c.c | 262 +++++++++++++++++++++-
> 3 files changed, 258 insertions(+), 388 deletions(-)
> delete mode 100644 crypto/crc32c-pcl-intel-asm_64.S
>
> diff --git a/Makefile b/Makefile
> index 78c23ad3c694..e5a5534b4fb7 100644
> --- a/Makefile
> +++ b/Makefile
> @@ -107,8 +107,6 @@ ENABLE_WARNING_FLAGS := $(call cc-option, -Wimplicit-fallthrough) \
> $(call cc-option, -Wmissing-prototypes) \
> -Wshadow
>
> -ASFLAGS =
> -
> # Common build flags
> CFLAGS = $(SUBST_CFLAGS) \
> -std=gnu11 \
> @@ -413,11 +411,6 @@ CRYPTO_OBJECTS = crypto/sha224-256.o crypto/blake2b-ref.o crypto/blake2b-sse2.o
> CRYPTO_CFLAGS = -DCRYPTOPROVIDER_BUILTIN=1
> endif
>
> -ifeq ($(TARGET_CPU),x86_64)
> -CRYPTO_OBJECTS += crypto/crc32c-pcl-intel-asm_64.o
> -ASFLAGS += -fPIC
> -endif
> -
> CHECKER_FLAGS += $(btrfs_convert_cflags)
>
> # collect values of the variables above
> @@ -478,13 +471,6 @@ else
> check_echo = true
> endif
>
> -.S.o:
> - @echo " AS $@"
> - $(Q)$(CC) $(CFLAGS) $(ASFLAGS) -c $< -o $@
> -
> -%.static.o: %.S
> - @echo " AS $@"
> - $(Q)$(CC) $(CFLAGS) $(ASFLAGS) -c $< -o $@
> #
> # Pick from per-file variables, btrfs_*_cflags
> #
> diff --git a/crypto/crc32c-pcl-intel-asm_64.S b/crypto/crc32c-pcl-intel-asm_64.S
> deleted file mode 100644
> index f87e62bdf345..000000000000
> --- a/crypto/crc32c-pcl-intel-asm_64.S
> +++ /dev/null
> @@ -1,370 +0,0 @@
> -/*
> - * Implement fast CRC32C with PCLMULQDQ instructions. (x86_64)
> - *
> - * The white papers on CRC32C calculations with PCLMULQDQ instruction can be
> - * downloaded from:
> - * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/crc-iscsi-polynomial-crc32-instruction-paper.pdf
> - * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-paper.pdf
> - *
> - * Copyright (C) 2012 Intel Corporation.
> - * Copyright 2024 Google LLC
> - *
> - * Authors:
> - * Wajdi Feghali <wajdi.k.feghali@intel.com>
> - * James Guilford <james.guilford@intel.com>
> - * David Cote <david.m.cote@intel.com>
> - * Tim Chen <tim.c.chen@linux.intel.com>
> - *
> - * This software is available to you under a choice of one of two
> - * licenses. You may choose to be licensed under the terms of the GNU
> - * General Public License (GPL) Version 2, available from the file
> - * COPYING in the main directory of this source tree, or the
> - * OpenIB.org BSD license below:
> - *
> - * Redistribution and use in source and binary forms, with or
> - * without modification, are permitted provided that the following
> - * conditions are met:
> - *
> - * - Redistributions of source code must retain the above
> - * copyright notice, this list of conditions and the following
> - * disclaimer.
> - *
> - * - Redistributions in binary form must reproduce the above
> - * copyright notice, this list of conditions and the following
> - * disclaimer in the documentation and/or other materials
> - * provided with the distribution.
> - *
> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
> - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
> - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
> - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
> - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
> - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
> - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
> - * SOFTWARE.
> - */
> -
> -##include "linkage.h"
> -
> -#define ENDBR
> -
> -## ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction
> -
> -# Define threshold below which buffers are considered "small" and routed to
> -# regular CRC code that does not interleave the CRC instructions.
> -#define SMALL_SIZE 200
> -
> -# unsigned int crc_pcl(const u8 *buffer, unsigned int len, unsigned int crc_init);
> -
> -.text
> -###SYM_FUNC_START(crc_pcl)
> -.globl crc_pcl
> -crc_pcl:
> -###SYM_FUNC_START(crc_pcl)
> -#define bufp %rdi
> -#define bufp_d %edi
> -#define len %esi
> -#define crc_init %edx
> -#define crc_init_q %rdx
> -#define n_misaligned %ecx /* overlaps chunk_bytes! */
> -#define n_misaligned_q %rcx
> -#define chunk_bytes %ecx /* overlaps n_misaligned! */
> -#define chunk_bytes_q %rcx
> -#define crc1 %r8
> -#define crc2 %r9
> -
> - cmp $SMALL_SIZE, len
> - jb .Lsmall
> -
> - ################################################################
> - ## 1) ALIGN:
> - ################################################################
> - mov bufp_d, n_misaligned
> - neg n_misaligned
> - and $7, n_misaligned # calculate the misalignment amount of
> - # the address
> - je .Laligned # Skip if aligned
> -
> - # Process 1 <= n_misaligned <= 7 bytes individually in order to align
> - # the remaining data to an 8-byte boundary.
> -.Ldo_align:
> - movq (bufp), %rax
> - add n_misaligned_q, bufp
> - sub n_misaligned, len
> -.Lalign_loop:
> - crc32b %al, crc_init # compute crc32 of 1-byte
> - shr $8, %rax # get next byte
> - dec n_misaligned
> - jne .Lalign_loop
> -.Laligned:
> -
> - ################################################################
> - ## 2) PROCESS BLOCK:
> - ################################################################
> -
> - cmp $128*24, len
> - jae .Lfull_block
> -
> -.Lpartial_block:
> - # Compute floor(len / 24) to get num qwords to process from each lane.
> - imul $2731, len, %eax # 2731 = ceil(2^16 / 24)
> - shr $16, %eax
> - jmp .Lcrc_3lanes
> -
> -.Lfull_block:
> - # Processing 128 qwords from each lane.
> - mov $128, %eax
> -
> - ################################################################
> - ## 3) CRC each of three lanes:
> - ################################################################
> -
> -.Lcrc_3lanes:
> - xor crc1,crc1
> - xor crc2,crc2
> - mov %eax, chunk_bytes
> - shl $3, chunk_bytes # num bytes to process from each lane
> - sub $5, %eax # 4 for 4x_loop, 1 for special last iter
> - jl .Lcrc_3lanes_4x_done
> -
> - # Unroll the loop by a factor of 4 to reduce the overhead of the loop
> - # bookkeeping instructions, which can compete with crc32q for the ALUs.
> -.Lcrc_3lanes_4x_loop:
> - crc32q (bufp), crc_init_q
> - crc32q (bufp,chunk_bytes_q), crc1
> - crc32q (bufp,chunk_bytes_q,2), crc2
> - crc32q 8(bufp), crc_init_q
> - crc32q 8(bufp,chunk_bytes_q), crc1
> - crc32q 8(bufp,chunk_bytes_q,2), crc2
> - crc32q 16(bufp), crc_init_q
> - crc32q 16(bufp,chunk_bytes_q), crc1
> - crc32q 16(bufp,chunk_bytes_q,2), crc2
> - crc32q 24(bufp), crc_init_q
> - crc32q 24(bufp,chunk_bytes_q), crc1
> - crc32q 24(bufp,chunk_bytes_q,2), crc2
> - add $32, bufp
> - sub $4, %eax
> - jge .Lcrc_3lanes_4x_loop
> -
> -.Lcrc_3lanes_4x_done:
> - add $4, %eax
> - jz .Lcrc_3lanes_last_qword
> -
> -.Lcrc_3lanes_1x_loop:
> - crc32q (bufp), crc_init_q
> - crc32q (bufp,chunk_bytes_q), crc1
> - crc32q (bufp,chunk_bytes_q,2), crc2
> - add $8, bufp
> - dec %eax
> - jnz .Lcrc_3lanes_1x_loop
> -
> -.Lcrc_3lanes_last_qword:
> - crc32q (bufp), crc_init_q
> - crc32q (bufp,chunk_bytes_q), crc1
> -# SKIP crc32q (bufp,chunk_bytes_q,2), crc2 ; Don't do this one yet
> -
> - ################################################################
> - ## 4) Combine three results:
> - ################################################################
> -
> - lea (K_table-8)(%rip), %rax # first entry is for idx 1
> - pmovzxdq (%rax,chunk_bytes_q), %xmm0 # 2 consts: K1:K2
> - lea (chunk_bytes,chunk_bytes,2), %eax # chunk_bytes * 3
> - sub %eax, len # len -= chunk_bytes * 3
> -
> - movq crc_init_q, %xmm1 # CRC for block 1
> - pclmulqdq $0x00, %xmm0, %xmm1 # Multiply by K2
> -
> - movq crc1, %xmm2 # CRC for block 2
> - pclmulqdq $0x10, %xmm0, %xmm2 # Multiply by K1
> -
> - pxor %xmm2,%xmm1
> - movq %xmm1, %rax
> - xor (bufp,chunk_bytes_q,2), %rax
> - mov crc2, crc_init_q
> - crc32 %rax, crc_init_q
> - lea 8(bufp,chunk_bytes_q,2), bufp
> -
> - ################################################################
> - ## 5) If more blocks remain, goto (2):
> - ################################################################
> -
> - cmp $128*24, len
> - jae .Lfull_block
> - cmp $SMALL_SIZE, len
> - jae .Lpartial_block
> -
> - #######################################################################
> - ## 6) Process any remainder without interleaving:
> - #######################################################################
> -.Lsmall:
> - test len, len
> - jz .Ldone
> - mov len, %eax
> - shr $3, %eax
> - jz .Ldo_dword
> -.Ldo_qwords:
> - crc32q (bufp), crc_init_q
> - add $8, bufp
> - dec %eax
> - jnz .Ldo_qwords
> -.Ldo_dword:
> - test $4, len
> - jz .Ldo_word
> - crc32l (bufp), crc_init
> - add $4, bufp
> -.Ldo_word:
> - test $2, len
> - jz .Ldo_byte
> - crc32w (bufp), crc_init
> - add $2, bufp
> -.Ldo_byte:
> - test $1, len
> - jz .Ldone
> - crc32b (bufp), crc_init
> -.Ldone:
> - mov crc_init, %eax
> - RET
> -###SYM_FUNC_END(crc_pcl)
> -.size crc_pcl, .-crc_pcl
> -###SYM_FUNC_END(crc_pcl)
> -
> -.data
> - ################################################################
> - ## PCLMULQDQ tables
> - ## Table is 128 entries x 2 words (8 bytes) each
> - ################################################################
> -.section .rodata, "a", @progbits
> -.align 8
> -K_table:
> - .long 0x493c7d27, 0x00000001
> - .long 0xba4fc28e, 0x493c7d27
> - .long 0xddc0152b, 0xf20c0dfe
> - .long 0x9e4addf8, 0xba4fc28e
> - .long 0x39d3b296, 0x3da6d0cb
> - .long 0x0715ce53, 0xddc0152b
> - .long 0x47db8317, 0x1c291d04
> - .long 0x0d3b6092, 0x9e4addf8
> - .long 0xc96cfdc0, 0x740eef02
> - .long 0x878a92a7, 0x39d3b296
> - .long 0xdaece73e, 0x083a6eec
> - .long 0xab7aff2a, 0x0715ce53
> - .long 0x2162d385, 0xc49f4f67
> - .long 0x83348832, 0x47db8317
> - .long 0x299847d5, 0x2ad91c30
> - .long 0xb9e02b86, 0x0d3b6092
> - .long 0x18b33a4e, 0x6992cea2
> - .long 0xb6dd949b, 0xc96cfdc0
> - .long 0x78d9ccb7, 0x7e908048
> - .long 0xbac2fd7b, 0x878a92a7
> - .long 0xa60ce07b, 0x1b3d8f29
> - .long 0xce7f39f4, 0xdaece73e
> - .long 0x61d82e56, 0xf1d0f55e
> - .long 0xd270f1a2, 0xab7aff2a
> - .long 0xc619809d, 0xa87ab8a8
> - .long 0x2b3cac5d, 0x2162d385
> - .long 0x65863b64, 0x8462d800
> - .long 0x1b03397f, 0x83348832
> - .long 0xebb883bd, 0x71d111a8
> - .long 0xb3e32c28, 0x299847d5
> - .long 0x064f7f26, 0xffd852c6
> - .long 0xdd7e3b0c, 0xb9e02b86
> - .long 0xf285651c, 0xdcb17aa4
> - .long 0x10746f3c, 0x18b33a4e
> - .long 0xc7a68855, 0xf37c5aee
> - .long 0x271d9844, 0xb6dd949b
> - .long 0x8e766a0c, 0x6051d5a2
> - .long 0x93a5f730, 0x78d9ccb7
> - .long 0x6cb08e5c, 0x18b0d4ff
> - .long 0x6b749fb2, 0xbac2fd7b
> - .long 0x1393e203, 0x21f3d99c
> - .long 0xcec3662e, 0xa60ce07b
> - .long 0x96c515bb, 0x8f158014
> - .long 0xe6fc4e6a, 0xce7f39f4
> - .long 0x8227bb8a, 0xa00457f7
> - .long 0xb0cd4768, 0x61d82e56
> - .long 0x39c7ff35, 0x8d6d2c43
> - .long 0xd7a4825c, 0xd270f1a2
> - .long 0x0ab3844b, 0x00ac29cf
> - .long 0x0167d312, 0xc619809d
> - .long 0xf6076544, 0xe9adf796
> - .long 0x26f6a60a, 0x2b3cac5d
> - .long 0xa741c1bf, 0x96638b34
> - .long 0x98d8d9cb, 0x65863b64
> - .long 0x49c3cc9c, 0xe0e9f351
> - .long 0x68bce87a, 0x1b03397f
> - .long 0x57a3d037, 0x9af01f2d
> - .long 0x6956fc3b, 0xebb883bd
> - .long 0x42d98888, 0x2cff42cf
> - .long 0x3771e98f, 0xb3e32c28
> - .long 0xb42ae3d9, 0x88f25a3a
> - .long 0x2178513a, 0x064f7f26
> - .long 0xe0ac139e, 0x4e36f0b0
> - .long 0x170076fa, 0xdd7e3b0c
> - .long 0x444dd413, 0xbd6f81f8
> - .long 0x6f345e45, 0xf285651c
> - .long 0x41d17b64, 0x91c9bd4b
> - .long 0xff0dba97, 0x10746f3c
> - .long 0xa2b73df1, 0x885f087b
> - .long 0xf872e54c, 0xc7a68855
> - .long 0x1e41e9fc, 0x4c144932
> - .long 0x86d8e4d2, 0x271d9844
> - .long 0x651bd98b, 0x52148f02
> - .long 0x5bb8f1bc, 0x8e766a0c
> - .long 0xa90fd27a, 0xa3c6f37a
> - .long 0xb3af077a, 0x93a5f730
> - .long 0x4984d782, 0xd7c0557f
> - .long 0xca6ef3ac, 0x6cb08e5c
> - .long 0x234e0b26, 0x63ded06a
> - .long 0xdd66cbbb, 0x6b749fb2
> - .long 0x4597456a, 0x4d56973c
> - .long 0xe9e28eb4, 0x1393e203
> - .long 0x7b3ff57a, 0x9669c9df
> - .long 0xc9c8b782, 0xcec3662e
> - .long 0x3f70cc6f, 0xe417f38a
> - .long 0x93e106a4, 0x96c515bb
> - .long 0x62ec6c6d, 0x4b9e0f71
> - .long 0xd813b325, 0xe6fc4e6a
> - .long 0x0df04680, 0xd104b8fc
> - .long 0x2342001e, 0x8227bb8a
> - .long 0x0a2a8d7e, 0x5b397730
> - .long 0x6d9a4957, 0xb0cd4768
> - .long 0xe8b6368b, 0xe78eb416
> - .long 0xd2c3ed1a, 0x39c7ff35
> - .long 0x995a5724, 0x61ff0e01
> - .long 0x9ef68d35, 0xd7a4825c
> - .long 0x0c139b31, 0x8d96551c
> - .long 0xf2271e60, 0x0ab3844b
> - .long 0x0b0bf8ca, 0x0bf80dd2
> - .long 0x2664fd8b, 0x0167d312
> - .long 0xed64812d, 0x8821abed
> - .long 0x02ee03b2, 0xf6076544
> - .long 0x8604ae0f, 0x6a45d2b2
> - .long 0x363bd6b3, 0x26f6a60a
> - .long 0x135c83fd, 0xd8d26619
> - .long 0x5fabe670, 0xa741c1bf
> - .long 0x35ec3279, 0xde87806c
> - .long 0x00bcf5f6, 0x98d8d9cb
> - .long 0x8ae00689, 0x14338754
> - .long 0x17f27698, 0x49c3cc9c
> - .long 0x58ca5f00, 0x5bd2011f
> - .long 0xaa7c7ad5, 0x68bce87a
> - .long 0xb5cfca28, 0xdd07448e
> - .long 0xded288f8, 0x57a3d037
> - .long 0x59f229bc, 0xdde8f5b9
> - .long 0x6d390dec, 0x6956fc3b
> - .long 0x37170390, 0xa3e3e02c
> - .long 0x6353c1cc, 0x42d98888
> - .long 0xc4584f5c, 0xd73c7bea
> - .long 0xf48642e9, 0x3771e98f
> - .long 0x531377e2, 0x80ff0093
> - .long 0xdd35bc8d, 0xb42ae3d9
> - .long 0xb25b29f2, 0x8fe4c34d
> - .long 0x9a5ede41, 0x2178513a
> - .long 0xa563905d, 0xdf99fc11
> - .long 0x45cddf4e, 0xe0ac139e
> - .long 0xacfa3103, 0x6c23e841
> - .long 0xa51b6135, 0x170076fa
> -
> -## Warning
> -.section .note.GNU-stack,"",@progbits
> diff --git a/crypto/crc32c.c b/crypto/crc32c.c
> index 9a3c9fc14eab..daf232c44e4d 100644
> --- a/crypto/crc32c.c
> +++ b/crypto/crc32c.c
> @@ -10,6 +10,7 @@
>
> #include <inttypes.h>
> #include <stdio.h>
> +#include <string.h>
> #include "crypto/crc32c.h"
> #include "common/cpu-utils.h"
>
> @@ -19,10 +20,262 @@ static uint32_t (*crc32c_impl)(uint32_t crc, unsigned char const *data, uint32_t
> #ifdef __x86_64__
>
> #include <nmmintrin.h>
> +#include <wmmintrin.h>
>
> -/* asmlinkage */ unsigned int crc_pcl(const unsigned char *buffer, unsigned int len, unsigned int crc_init);
> -static unsigned int crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len) {
> - return crc_pcl(data, len, crc);
> +/*
> + * Fast CRC32C with PCLMULQDQ, three interleaved crc32 lanes combined with
> + * carry-less multiplication. Derived from the Intel implementation
> + * (crc32c-pcl-intel-asm_64.S in the kernel), available under GPLv2 or the
> + * OpenIB.org BSD license.
> + *
> + * Copyright (C) 2012 Intel Corporation.
> + * Copyright 2024 Google LLC
> + *
> + * Authors:
> + * Wajdi Feghali <wajdi.k.feghali@intel.com>
> + * James Guilford <james.guilford@intel.com>
> + * David Cote <david.m.cote@intel.com>
> + * Tim Chen <tim.c.chen@linux.intel.com>
> + */
> +
> +/* ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction */
> +
> +/*
> + * Define threshold below which buffers are considered "small" and routed to
> + * regular CRC code that does not interleave the CRC instructions.
> + */
> +#define PCL_SMALL_SIZE 200
> +
> +/*
> + * PCLMULQDQ tables
> + * Table is 128 entries x 2 words (8 bytes) each. The first entry is for idx 1
> + * (one qword per lane), the constants are used as K1:K2 when combining lanes.
> + */
> +static const uint32_t crc32c_pcl_k_table[128][2] = {
> + { 0x493c7d27, 0x00000001 },
> + { 0xba4fc28e, 0x493c7d27 },
> + { 0xddc0152b, 0xf20c0dfe },
> + { 0x9e4addf8, 0xba4fc28e },
> + { 0x39d3b296, 0x3da6d0cb },
> + { 0x0715ce53, 0xddc0152b },
> + { 0x47db8317, 0x1c291d04 },
> + { 0x0d3b6092, 0x9e4addf8 },
> + { 0xc96cfdc0, 0x740eef02 },
> + { 0x878a92a7, 0x39d3b296 },
> + { 0xdaece73e, 0x083a6eec },
> + { 0xab7aff2a, 0x0715ce53 },
> + { 0x2162d385, 0xc49f4f67 },
> + { 0x83348832, 0x47db8317 },
> + { 0x299847d5, 0x2ad91c30 },
> + { 0xb9e02b86, 0x0d3b6092 },
> + { 0x18b33a4e, 0x6992cea2 },
> + { 0xb6dd949b, 0xc96cfdc0 },
> + { 0x78d9ccb7, 0x7e908048 },
> + { 0xbac2fd7b, 0x878a92a7 },
> + { 0xa60ce07b, 0x1b3d8f29 },
> + { 0xce7f39f4, 0xdaece73e },
> + { 0x61d82e56, 0xf1d0f55e },
> + { 0xd270f1a2, 0xab7aff2a },
> + { 0xc619809d, 0xa87ab8a8 },
> + { 0x2b3cac5d, 0x2162d385 },
> + { 0x65863b64, 0x8462d800 },
> + { 0x1b03397f, 0x83348832 },
> + { 0xebb883bd, 0x71d111a8 },
> + { 0xb3e32c28, 0x299847d5 },
> + { 0x064f7f26, 0xffd852c6 },
> + { 0xdd7e3b0c, 0xb9e02b86 },
> + { 0xf285651c, 0xdcb17aa4 },
> + { 0x10746f3c, 0x18b33a4e },
> + { 0xc7a68855, 0xf37c5aee },
> + { 0x271d9844, 0xb6dd949b },
> + { 0x8e766a0c, 0x6051d5a2 },
> + { 0x93a5f730, 0x78d9ccb7 },
> + { 0x6cb08e5c, 0x18b0d4ff },
> + { 0x6b749fb2, 0xbac2fd7b },
> + { 0x1393e203, 0x21f3d99c },
> + { 0xcec3662e, 0xa60ce07b },
> + { 0x96c515bb, 0x8f158014 },
> + { 0xe6fc4e6a, 0xce7f39f4 },
> + { 0x8227bb8a, 0xa00457f7 },
> + { 0xb0cd4768, 0x61d82e56 },
> + { 0x39c7ff35, 0x8d6d2c43 },
> + { 0xd7a4825c, 0xd270f1a2 },
> + { 0x0ab3844b, 0x00ac29cf },
> + { 0x0167d312, 0xc619809d },
> + { 0xf6076544, 0xe9adf796 },
> + { 0x26f6a60a, 0x2b3cac5d },
> + { 0xa741c1bf, 0x96638b34 },
> + { 0x98d8d9cb, 0x65863b64 },
> + { 0x49c3cc9c, 0xe0e9f351 },
> + { 0x68bce87a, 0x1b03397f },
> + { 0x57a3d037, 0x9af01f2d },
> + { 0x6956fc3b, 0xebb883bd },
> + { 0x42d98888, 0x2cff42cf },
> + { 0x3771e98f, 0xb3e32c28 },
> + { 0xb42ae3d9, 0x88f25a3a },
> + { 0x2178513a, 0x064f7f26 },
> + { 0xe0ac139e, 0x4e36f0b0 },
> + { 0x170076fa, 0xdd7e3b0c },
> + { 0x444dd413, 0xbd6f81f8 },
> + { 0x6f345e45, 0xf285651c },
> + { 0x41d17b64, 0x91c9bd4b },
> + { 0xff0dba97, 0x10746f3c },
> + { 0xa2b73df1, 0x885f087b },
> + { 0xf872e54c, 0xc7a68855 },
> + { 0x1e41e9fc, 0x4c144932 },
> + { 0x86d8e4d2, 0x271d9844 },
> + { 0x651bd98b, 0x52148f02 },
> + { 0x5bb8f1bc, 0x8e766a0c },
> + { 0xa90fd27a, 0xa3c6f37a },
> + { 0xb3af077a, 0x93a5f730 },
> + { 0x4984d782, 0xd7c0557f },
> + { 0xca6ef3ac, 0x6cb08e5c },
> + { 0x234e0b26, 0x63ded06a },
> + { 0xdd66cbbb, 0x6b749fb2 },
> + { 0x4597456a, 0x4d56973c },
> + { 0xe9e28eb4, 0x1393e203 },
> + { 0x7b3ff57a, 0x9669c9df },
> + { 0xc9c8b782, 0xcec3662e },
> + { 0x3f70cc6f, 0xe417f38a },
> + { 0x93e106a4, 0x96c515bb },
> + { 0x62ec6c6d, 0x4b9e0f71 },
> + { 0xd813b325, 0xe6fc4e6a },
> + { 0x0df04680, 0xd104b8fc },
> + { 0x2342001e, 0x8227bb8a },
> + { 0x0a2a8d7e, 0x5b397730 },
> + { 0x6d9a4957, 0xb0cd4768 },
> + { 0xe8b6368b, 0xe78eb416 },
> + { 0xd2c3ed1a, 0x39c7ff35 },
> + { 0x995a5724, 0x61ff0e01 },
> + { 0x9ef68d35, 0xd7a4825c },
> + { 0x0c139b31, 0x8d96551c },
> + { 0xf2271e60, 0x0ab3844b },
> + { 0x0b0bf8ca, 0x0bf80dd2 },
> + { 0x2664fd8b, 0x0167d312 },
> + { 0xed64812d, 0x8821abed },
> + { 0x02ee03b2, 0xf6076544 },
> + { 0x8604ae0f, 0x6a45d2b2 },
> + { 0x363bd6b3, 0x26f6a60a },
> + { 0x135c83fd, 0xd8d26619 },
> + { 0x5fabe670, 0xa741c1bf },
> + { 0x35ec3279, 0xde87806c },
> + { 0x00bcf5f6, 0x98d8d9cb },
> + { 0x8ae00689, 0x14338754 },
> + { 0x17f27698, 0x49c3cc9c },
> + { 0x58ca5f00, 0x5bd2011f },
> + { 0xaa7c7ad5, 0x68bce87a },
> + { 0xb5cfca28, 0xdd07448e },
> + { 0xded288f8, 0x57a3d037 },
> + { 0x59f229bc, 0xdde8f5b9 },
> + { 0x6d390dec, 0x6956fc3b },
> + { 0x37170390, 0xa3e3e02c },
> + { 0x6353c1cc, 0x42d98888 },
> + { 0xc4584f5c, 0xd73c7bea },
> + { 0xf48642e9, 0x3771e98f },
> + { 0x531377e2, 0x80ff0093 },
> + { 0xdd35bc8d, 0xb42ae3d9 },
> + { 0xb25b29f2, 0x8fe4c34d },
> + { 0x9a5ede41, 0x2178513a },
> + { 0xa563905d, 0xdf99fc11 },
> + { 0x45cddf4e, 0xe0ac139e },
> + { 0xacfa3103, 0x6c23e841 },
> + { 0xa51b6135, 0x170076fa },
> +};
> +
> +static inline uint64_t crc32c_load64(const unsigned char *p)
> +{
> + uint64_t v;
> +
> + memcpy(&v, p, sizeof(v));
> + return v;
> +}
> +
> +__attribute__((target("sse4.2,pclmul")))
> +static uint32_t crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len)
> +{
> + uint64_t crc0 = crc;
> +
> + if (len >= PCL_SMALL_SIZE) {
> + unsigned int misaligned = -(uintptr_t)data & 7;
> +
> + /*
> + * 1) ALIGN:
> + * Process 1 <= misaligned <= 7 bytes individually in order to
> + * align the remaining data to an 8-byte boundary.
> + */
> + len -= misaligned;
> + while (misaligned--)
> + crc0 = _mm_crc32_u8(crc0, *data++);
> + }
> +
> + /*
> + * 2) PROCESS BLOCK:
> + * 5) If more blocks remain, repeat from here.
> + */
> + while (len >= PCL_SMALL_SIZE) {
> + /*
> + * Processing 128 qwords from each lane for a full block,
> + * otherwise compute floor(len / 24) to get the number of qwords
> + * to process from each lane. 2731 = ceil(2^16 / 24)
> + */
> + unsigned int qwords = len >= 128 * 24 ? 128 : (len * 2731) >> 16;
> + unsigned int chunk = qwords * 8;
> + const uint32_t *k = crc32c_pcl_k_table[qwords - 1];
> + const unsigned char *p1 = data + chunk;
> + const unsigned char *p2 = data + 2 * chunk;
> + uint64_t crc1 = 0, crc2 = 0;
> + __m128i kvec, x1, x2;
> + unsigned int i;
> +
> + /* 3) CRC each of three lanes: */
> + for (i = 0; i < qwords - 1; i++) {
> + crc0 = _mm_crc32_u64(crc0, crc32c_load64(data + i * 8));
> + crc1 = _mm_crc32_u64(crc1, crc32c_load64(p1 + i * 8));
> + crc2 = _mm_crc32_u64(crc2, crc32c_load64(p2 + i * 8));
> + }
> + crc0 = _mm_crc32_u64(crc0, crc32c_load64(data + i * 8));
> + crc1 = _mm_crc32_u64(crc1, crc32c_load64(p1 + i * 8));
> + /* SKIP the last qword of crc2, don't do this one yet */
> +
> + /* 4) Combine three results: */
> + /* 2 consts: K1:K2 */
> + kvec = _mm_set_epi64x(k[1], k[0]);
> + /* CRC for block 1, multiply by K2 */
> + x1 = _mm_clmulepi64_si128(_mm_cvtsi64_si128(crc0), kvec, 0x00);
> + /* CRC for block 2, multiply by K1 */
> + x2 = _mm_clmulepi64_si128(_mm_cvtsi64_si128(crc1), kvec, 0x10);
> + x1 = _mm_xor_si128(x1, x2);
> + crc0 = _mm_crc32_u64(crc2, _mm_cvtsi128_si64(x1) ^
> + crc32c_load64(p2 + i * 8));
> +
> + data += 3 * chunk;
> + len -= 3 * chunk;
> + }
> +
> + /* 6) Process any remainder without interleaving: */
> + while (len >= 8) {
> + crc0 = _mm_crc32_u64(crc0, crc32c_load64(data));
> + data += 8;
> + len -= 8;
> + }
> + if (len & 4) {
> + uint32_t v;
> +
> + memcpy(&v, data, sizeof(v));
> + crc0 = _mm_crc32_u32(crc0, v);
> + data += 4;
> + }
> + if (len & 2) {
> + uint16_t v;
> +
> + memcpy(&v, data, sizeof(v));
> + crc0 = _mm_crc32_u16(crc0, v);
> + data += 2;
> + }
> + if (len & 1)
> + crc0 = _mm_crc32_u8(crc0, *data);
> +
> + return crc0;
> }
>
> /*
> @@ -82,7 +335,8 @@ static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t l
> void crc32c_init_accel(void)
> {
> if (0) {
> - } else if (cpu_has_feature(CPU_FLAG_PCLMUL)) {
> + } else if (cpu_has_feature(CPU_FLAG_PCLMUL) &&
> + cpu_has_feature(CPU_FLAG_SSE42)) {
> /* printf("CRC32C: pcl\n"); */
> crc32c_impl = crc32c_pcl;
> } else if (cpu_has_feature(CPU_FLAG_SSE42)) {
> --
> 2.56.0
>
>
---end quoted text---
^ permalink raw reply [flat|nested] 10+ messages in thread* Re: good crcs in userspace, Re: [PATCH v2 2/7] btrfs-progs: crypto/crc32c: port crc32c-pcl optimization to C
2026-11-11 16:58 ` good crcs in userspace, " Christoph Hellwig
@ 2026-11-11 20:28 ` Qu Wenruo
0 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-11 20:28 UTC (permalink / raw)
To: Christoph Hellwig, Qu Wenruo
Cc: linux-btrfs, linux-xfs, Anuj Gupta, Eric Biggers
在 2026/11/12 03:28, Christoph Hellwig 写道:
> Hi Qu,
>
> trying to hijack this a bit. We have a few uses for crcs in userspace.
> Your btrfs code, libxfs which already has a very unoptimized crc32c and
> I recently added a similarly basic crc64. For PI passthrough through
> I/O uring we need crc16, crc32c and crc64, and I plan to also extend
> this to file system checksums though io_uring.
>
> I've been wondering what the recommended crc implementation for userspace
> is or should be. The only google library I found was in c++ so it is
> not very useful.
And it's not that optimized on arm64, at least compared to kernel's ASM:
https://github.com/kdave/btrfs-progs/issues/1035#issuecomment-6721951904
There is also fast-crc project, doing almost exactly what I'm trying to
do, pure C with intrinsics, but covers both x86_64 and arm64, and with
more fine tuning on the details:
https://github.com/corsix/fast-crc32
> Intel's ISA-L has fairly optimized implementations,
> but it's a giant messy library doing more than just CRC. I briefly
> thought about porting the kernel code to userspace, but the conversion
> of kernel static branches to userspace concepts is non-trivial. Also
> a GPL license might be a bit limiting as a lot of storage software the
> could make good use of it is Apache license.
>
> So no good answer on how to do it, but having some really well defined
> library for userspace crc needs would be really neat and better than
> everyone rolling their own.
To be honest, at least on x86_64, I don't think we need to bother that
much on hand-writing ASM files to get everything done right.
As most of the time are spent on the vector commands anyway.
So my preferred solution is, let the kernel be the source of portable C
optimized code, and copy it to projects that needs it.
But since it's not yet there, I think fast-crc32 would be the best for
your refernece. Unfortunately it only covers crc32, no crc16 nor crc64
for your use cases.
Thanks,
Qu
>
> On Mon, Nov 09, 2026 at 02:39:56PM +1030, Qu Wenruo wrote:
>> This is inspired by Google's CRC32C library which has all the hardware
>> acceleration, but without any ASM code.
>>
>> The idea is to use compiler wrapped commands instead of the hand written
>> ASM code.
>>
>> The performance is at the same level as the old code:
>>
>> The hardware is Ryzen 9 HX 370, on a single CPU core, unit is GiB/s.
>>
>> Size | Old (asm) | New (C)
>> -----------+-------------+-------------
>> 64 B | 4.76–4.80 | 4.80–4.82
>> 256 B | 8.76–8.88 | 8.82–8.87
>> 1 KiB | 12.26–12.41 | 12.47–12.51
>> 4 KiB | 13.35–13.49 | 13.48
>> 16 KiB | 13.69–13.78 | 13.66–13.79
>> 64 KiB | 13.73–13.83 | 13.75–13.83
>> 1 MiB | 13.62–13.72 | 13.61–13.63
>>
>> We should have a better hash-vectest to cover larger block sizes, but
>> that will be added later by the newer ARMv8 CRC optimization.
>>
>> Asssited-by: LLM (code porting, testing)
>> Signed-off-by: Qu Wenruo <wqu@suse.com>
>> ---
>> Makefile | 14 --
>> crypto/crc32c-pcl-intel-asm_64.S | 370 -------------------------------
>> crypto/crc32c.c | 262 +++++++++++++++++++++-
>> 3 files changed, 258 insertions(+), 388 deletions(-)
>> delete mode 100644 crypto/crc32c-pcl-intel-asm_64.S
>>
>> diff --git a/Makefile b/Makefile
>> index 78c23ad3c694..e5a5534b4fb7 100644
>> --- a/Makefile
>> +++ b/Makefile
>> @@ -107,8 +107,6 @@ ENABLE_WARNING_FLAGS := $(call cc-option, -Wimplicit-fallthrough) \
>> $(call cc-option, -Wmissing-prototypes) \
>> -Wshadow
>>
>> -ASFLAGS =
>> -
>> # Common build flags
>> CFLAGS = $(SUBST_CFLAGS) \
>> -std=gnu11 \
>> @@ -413,11 +411,6 @@ CRYPTO_OBJECTS = crypto/sha224-256.o crypto/blake2b-ref.o crypto/blake2b-sse2.o
>> CRYPTO_CFLAGS = -DCRYPTOPROVIDER_BUILTIN=1
>> endif
>>
>> -ifeq ($(TARGET_CPU),x86_64)
>> -CRYPTO_OBJECTS += crypto/crc32c-pcl-intel-asm_64.o
>> -ASFLAGS += -fPIC
>> -endif
>> -
>> CHECKER_FLAGS += $(btrfs_convert_cflags)
>>
>> # collect values of the variables above
>> @@ -478,13 +471,6 @@ else
>> check_echo = true
>> endif
>>
>> -.S.o:
>> - @echo " AS $@"
>> - $(Q)$(CC) $(CFLAGS) $(ASFLAGS) -c $< -o $@
>> -
>> -%.static.o: %.S
>> - @echo " AS $@"
>> - $(Q)$(CC) $(CFLAGS) $(ASFLAGS) -c $< -o $@
>> #
>> # Pick from per-file variables, btrfs_*_cflags
>> #
>> diff --git a/crypto/crc32c-pcl-intel-asm_64.S b/crypto/crc32c-pcl-intel-asm_64.S
>> deleted file mode 100644
>> index f87e62bdf345..000000000000
>> --- a/crypto/crc32c-pcl-intel-asm_64.S
>> +++ /dev/null
>> @@ -1,370 +0,0 @@
>> -/*
>> - * Implement fast CRC32C with PCLMULQDQ instructions. (x86_64)
>> - *
>> - * The white papers on CRC32C calculations with PCLMULQDQ instruction can be
>> - * downloaded from:
>> - * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/crc-iscsi-polynomial-crc32-instruction-paper.pdf
>> - * http://www.intel.com/content/dam/www/public/us/en/documents/white-papers/fast-crc-computation-paper.pdf
>> - *
>> - * Copyright (C) 2012 Intel Corporation.
>> - * Copyright 2024 Google LLC
>> - *
>> - * Authors:
>> - * Wajdi Feghali <wajdi.k.feghali@intel.com>
>> - * James Guilford <james.guilford@intel.com>
>> - * David Cote <david.m.cote@intel.com>
>> - * Tim Chen <tim.c.chen@linux.intel.com>
>> - *
>> - * This software is available to you under a choice of one of two
>> - * licenses. You may choose to be licensed under the terms of the GNU
>> - * General Public License (GPL) Version 2, available from the file
>> - * COPYING in the main directory of this source tree, or the
>> - * OpenIB.org BSD license below:
>> - *
>> - * Redistribution and use in source and binary forms, with or
>> - * without modification, are permitted provided that the following
>> - * conditions are met:
>> - *
>> - * - Redistributions of source code must retain the above
>> - * copyright notice, this list of conditions and the following
>> - * disclaimer.
>> - *
>> - * - Redistributions in binary form must reproduce the above
>> - * copyright notice, this list of conditions and the following
>> - * disclaimer in the documentation and/or other materials
>> - * provided with the distribution.
>> - *
>> - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
>> - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
>> - * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
>> - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
>> - * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
>> - * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
>> - * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
>> - * SOFTWARE.
>> - */
>> -
>> -##include "linkage.h"
>> -
>> -#define ENDBR
>> -
>> -## ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction
>> -
>> -# Define threshold below which buffers are considered "small" and routed to
>> -# regular CRC code that does not interleave the CRC instructions.
>> -#define SMALL_SIZE 200
>> -
>> -# unsigned int crc_pcl(const u8 *buffer, unsigned int len, unsigned int crc_init);
>> -
>> -.text
>> -###SYM_FUNC_START(crc_pcl)
>> -.globl crc_pcl
>> -crc_pcl:
>> -###SYM_FUNC_START(crc_pcl)
>> -#define bufp %rdi
>> -#define bufp_d %edi
>> -#define len %esi
>> -#define crc_init %edx
>> -#define crc_init_q %rdx
>> -#define n_misaligned %ecx /* overlaps chunk_bytes! */
>> -#define n_misaligned_q %rcx
>> -#define chunk_bytes %ecx /* overlaps n_misaligned! */
>> -#define chunk_bytes_q %rcx
>> -#define crc1 %r8
>> -#define crc2 %r9
>> -
>> - cmp $SMALL_SIZE, len
>> - jb .Lsmall
>> -
>> - ################################################################
>> - ## 1) ALIGN:
>> - ################################################################
>> - mov bufp_d, n_misaligned
>> - neg n_misaligned
>> - and $7, n_misaligned # calculate the misalignment amount of
>> - # the address
>> - je .Laligned # Skip if aligned
>> -
>> - # Process 1 <= n_misaligned <= 7 bytes individually in order to align
>> - # the remaining data to an 8-byte boundary.
>> -.Ldo_align:
>> - movq (bufp), %rax
>> - add n_misaligned_q, bufp
>> - sub n_misaligned, len
>> -.Lalign_loop:
>> - crc32b %al, crc_init # compute crc32 of 1-byte
>> - shr $8, %rax # get next byte
>> - dec n_misaligned
>> - jne .Lalign_loop
>> -.Laligned:
>> -
>> - ################################################################
>> - ## 2) PROCESS BLOCK:
>> - ################################################################
>> -
>> - cmp $128*24, len
>> - jae .Lfull_block
>> -
>> -.Lpartial_block:
>> - # Compute floor(len / 24) to get num qwords to process from each lane.
>> - imul $2731, len, %eax # 2731 = ceil(2^16 / 24)
>> - shr $16, %eax
>> - jmp .Lcrc_3lanes
>> -
>> -.Lfull_block:
>> - # Processing 128 qwords from each lane.
>> - mov $128, %eax
>> -
>> - ################################################################
>> - ## 3) CRC each of three lanes:
>> - ################################################################
>> -
>> -.Lcrc_3lanes:
>> - xor crc1,crc1
>> - xor crc2,crc2
>> - mov %eax, chunk_bytes
>> - shl $3, chunk_bytes # num bytes to process from each lane
>> - sub $5, %eax # 4 for 4x_loop, 1 for special last iter
>> - jl .Lcrc_3lanes_4x_done
>> -
>> - # Unroll the loop by a factor of 4 to reduce the overhead of the loop
>> - # bookkeeping instructions, which can compete with crc32q for the ALUs.
>> -.Lcrc_3lanes_4x_loop:
>> - crc32q (bufp), crc_init_q
>> - crc32q (bufp,chunk_bytes_q), crc1
>> - crc32q (bufp,chunk_bytes_q,2), crc2
>> - crc32q 8(bufp), crc_init_q
>> - crc32q 8(bufp,chunk_bytes_q), crc1
>> - crc32q 8(bufp,chunk_bytes_q,2), crc2
>> - crc32q 16(bufp), crc_init_q
>> - crc32q 16(bufp,chunk_bytes_q), crc1
>> - crc32q 16(bufp,chunk_bytes_q,2), crc2
>> - crc32q 24(bufp), crc_init_q
>> - crc32q 24(bufp,chunk_bytes_q), crc1
>> - crc32q 24(bufp,chunk_bytes_q,2), crc2
>> - add $32, bufp
>> - sub $4, %eax
>> - jge .Lcrc_3lanes_4x_loop
>> -
>> -.Lcrc_3lanes_4x_done:
>> - add $4, %eax
>> - jz .Lcrc_3lanes_last_qword
>> -
>> -.Lcrc_3lanes_1x_loop:
>> - crc32q (bufp), crc_init_q
>> - crc32q (bufp,chunk_bytes_q), crc1
>> - crc32q (bufp,chunk_bytes_q,2), crc2
>> - add $8, bufp
>> - dec %eax
>> - jnz .Lcrc_3lanes_1x_loop
>> -
>> -.Lcrc_3lanes_last_qword:
>> - crc32q (bufp), crc_init_q
>> - crc32q (bufp,chunk_bytes_q), crc1
>> -# SKIP crc32q (bufp,chunk_bytes_q,2), crc2 ; Don't do this one yet
>> -
>> - ################################################################
>> - ## 4) Combine three results:
>> - ################################################################
>> -
>> - lea (K_table-8)(%rip), %rax # first entry is for idx 1
>> - pmovzxdq (%rax,chunk_bytes_q), %xmm0 # 2 consts: K1:K2
>> - lea (chunk_bytes,chunk_bytes,2), %eax # chunk_bytes * 3
>> - sub %eax, len # len -= chunk_bytes * 3
>> -
>> - movq crc_init_q, %xmm1 # CRC for block 1
>> - pclmulqdq $0x00, %xmm0, %xmm1 # Multiply by K2
>> -
>> - movq crc1, %xmm2 # CRC for block 2
>> - pclmulqdq $0x10, %xmm0, %xmm2 # Multiply by K1
>> -
>> - pxor %xmm2,%xmm1
>> - movq %xmm1, %rax
>> - xor (bufp,chunk_bytes_q,2), %rax
>> - mov crc2, crc_init_q
>> - crc32 %rax, crc_init_q
>> - lea 8(bufp,chunk_bytes_q,2), bufp
>> -
>> - ################################################################
>> - ## 5) If more blocks remain, goto (2):
>> - ################################################################
>> -
>> - cmp $128*24, len
>> - jae .Lfull_block
>> - cmp $SMALL_SIZE, len
>> - jae .Lpartial_block
>> -
>> - #######################################################################
>> - ## 6) Process any remainder without interleaving:
>> - #######################################################################
>> -.Lsmall:
>> - test len, len
>> - jz .Ldone
>> - mov len, %eax
>> - shr $3, %eax
>> - jz .Ldo_dword
>> -.Ldo_qwords:
>> - crc32q (bufp), crc_init_q
>> - add $8, bufp
>> - dec %eax
>> - jnz .Ldo_qwords
>> -.Ldo_dword:
>> - test $4, len
>> - jz .Ldo_word
>> - crc32l (bufp), crc_init
>> - add $4, bufp
>> -.Ldo_word:
>> - test $2, len
>> - jz .Ldo_byte
>> - crc32w (bufp), crc_init
>> - add $2, bufp
>> -.Ldo_byte:
>> - test $1, len
>> - jz .Ldone
>> - crc32b (bufp), crc_init
>> -.Ldone:
>> - mov crc_init, %eax
>> - RET
>> -###SYM_FUNC_END(crc_pcl)
>> -.size crc_pcl, .-crc_pcl
>> -###SYM_FUNC_END(crc_pcl)
>> -
>> -.data
>> - ################################################################
>> - ## PCLMULQDQ tables
>> - ## Table is 128 entries x 2 words (8 bytes) each
>> - ################################################################
>> -.section .rodata, "a", @progbits
>> -.align 8
>> -K_table:
>> - .long 0x493c7d27, 0x00000001
>> - .long 0xba4fc28e, 0x493c7d27
>> - .long 0xddc0152b, 0xf20c0dfe
>> - .long 0x9e4addf8, 0xba4fc28e
>> - .long 0x39d3b296, 0x3da6d0cb
>> - .long 0x0715ce53, 0xddc0152b
>> - .long 0x47db8317, 0x1c291d04
>> - .long 0x0d3b6092, 0x9e4addf8
>> - .long 0xc96cfdc0, 0x740eef02
>> - .long 0x878a92a7, 0x39d3b296
>> - .long 0xdaece73e, 0x083a6eec
>> - .long 0xab7aff2a, 0x0715ce53
>> - .long 0x2162d385, 0xc49f4f67
>> - .long 0x83348832, 0x47db8317
>> - .long 0x299847d5, 0x2ad91c30
>> - .long 0xb9e02b86, 0x0d3b6092
>> - .long 0x18b33a4e, 0x6992cea2
>> - .long 0xb6dd949b, 0xc96cfdc0
>> - .long 0x78d9ccb7, 0x7e908048
>> - .long 0xbac2fd7b, 0x878a92a7
>> - .long 0xa60ce07b, 0x1b3d8f29
>> - .long 0xce7f39f4, 0xdaece73e
>> - .long 0x61d82e56, 0xf1d0f55e
>> - .long 0xd270f1a2, 0xab7aff2a
>> - .long 0xc619809d, 0xa87ab8a8
>> - .long 0x2b3cac5d, 0x2162d385
>> - .long 0x65863b64, 0x8462d800
>> - .long 0x1b03397f, 0x83348832
>> - .long 0xebb883bd, 0x71d111a8
>> - .long 0xb3e32c28, 0x299847d5
>> - .long 0x064f7f26, 0xffd852c6
>> - .long 0xdd7e3b0c, 0xb9e02b86
>> - .long 0xf285651c, 0xdcb17aa4
>> - .long 0x10746f3c, 0x18b33a4e
>> - .long 0xc7a68855, 0xf37c5aee
>> - .long 0x271d9844, 0xb6dd949b
>> - .long 0x8e766a0c, 0x6051d5a2
>> - .long 0x93a5f730, 0x78d9ccb7
>> - .long 0x6cb08e5c, 0x18b0d4ff
>> - .long 0x6b749fb2, 0xbac2fd7b
>> - .long 0x1393e203, 0x21f3d99c
>> - .long 0xcec3662e, 0xa60ce07b
>> - .long 0x96c515bb, 0x8f158014
>> - .long 0xe6fc4e6a, 0xce7f39f4
>> - .long 0x8227bb8a, 0xa00457f7
>> - .long 0xb0cd4768, 0x61d82e56
>> - .long 0x39c7ff35, 0x8d6d2c43
>> - .long 0xd7a4825c, 0xd270f1a2
>> - .long 0x0ab3844b, 0x00ac29cf
>> - .long 0x0167d312, 0xc619809d
>> - .long 0xf6076544, 0xe9adf796
>> - .long 0x26f6a60a, 0x2b3cac5d
>> - .long 0xa741c1bf, 0x96638b34
>> - .long 0x98d8d9cb, 0x65863b64
>> - .long 0x49c3cc9c, 0xe0e9f351
>> - .long 0x68bce87a, 0x1b03397f
>> - .long 0x57a3d037, 0x9af01f2d
>> - .long 0x6956fc3b, 0xebb883bd
>> - .long 0x42d98888, 0x2cff42cf
>> - .long 0x3771e98f, 0xb3e32c28
>> - .long 0xb42ae3d9, 0x88f25a3a
>> - .long 0x2178513a, 0x064f7f26
>> - .long 0xe0ac139e, 0x4e36f0b0
>> - .long 0x170076fa, 0xdd7e3b0c
>> - .long 0x444dd413, 0xbd6f81f8
>> - .long 0x6f345e45, 0xf285651c
>> - .long 0x41d17b64, 0x91c9bd4b
>> - .long 0xff0dba97, 0x10746f3c
>> - .long 0xa2b73df1, 0x885f087b
>> - .long 0xf872e54c, 0xc7a68855
>> - .long 0x1e41e9fc, 0x4c144932
>> - .long 0x86d8e4d2, 0x271d9844
>> - .long 0x651bd98b, 0x52148f02
>> - .long 0x5bb8f1bc, 0x8e766a0c
>> - .long 0xa90fd27a, 0xa3c6f37a
>> - .long 0xb3af077a, 0x93a5f730
>> - .long 0x4984d782, 0xd7c0557f
>> - .long 0xca6ef3ac, 0x6cb08e5c
>> - .long 0x234e0b26, 0x63ded06a
>> - .long 0xdd66cbbb, 0x6b749fb2
>> - .long 0x4597456a, 0x4d56973c
>> - .long 0xe9e28eb4, 0x1393e203
>> - .long 0x7b3ff57a, 0x9669c9df
>> - .long 0xc9c8b782, 0xcec3662e
>> - .long 0x3f70cc6f, 0xe417f38a
>> - .long 0x93e106a4, 0x96c515bb
>> - .long 0x62ec6c6d, 0x4b9e0f71
>> - .long 0xd813b325, 0xe6fc4e6a
>> - .long 0x0df04680, 0xd104b8fc
>> - .long 0x2342001e, 0x8227bb8a
>> - .long 0x0a2a8d7e, 0x5b397730
>> - .long 0x6d9a4957, 0xb0cd4768
>> - .long 0xe8b6368b, 0xe78eb416
>> - .long 0xd2c3ed1a, 0x39c7ff35
>> - .long 0x995a5724, 0x61ff0e01
>> - .long 0x9ef68d35, 0xd7a4825c
>> - .long 0x0c139b31, 0x8d96551c
>> - .long 0xf2271e60, 0x0ab3844b
>> - .long 0x0b0bf8ca, 0x0bf80dd2
>> - .long 0x2664fd8b, 0x0167d312
>> - .long 0xed64812d, 0x8821abed
>> - .long 0x02ee03b2, 0xf6076544
>> - .long 0x8604ae0f, 0x6a45d2b2
>> - .long 0x363bd6b3, 0x26f6a60a
>> - .long 0x135c83fd, 0xd8d26619
>> - .long 0x5fabe670, 0xa741c1bf
>> - .long 0x35ec3279, 0xde87806c
>> - .long 0x00bcf5f6, 0x98d8d9cb
>> - .long 0x8ae00689, 0x14338754
>> - .long 0x17f27698, 0x49c3cc9c
>> - .long 0x58ca5f00, 0x5bd2011f
>> - .long 0xaa7c7ad5, 0x68bce87a
>> - .long 0xb5cfca28, 0xdd07448e
>> - .long 0xded288f8, 0x57a3d037
>> - .long 0x59f229bc, 0xdde8f5b9
>> - .long 0x6d390dec, 0x6956fc3b
>> - .long 0x37170390, 0xa3e3e02c
>> - .long 0x6353c1cc, 0x42d98888
>> - .long 0xc4584f5c, 0xd73c7bea
>> - .long 0xf48642e9, 0x3771e98f
>> - .long 0x531377e2, 0x80ff0093
>> - .long 0xdd35bc8d, 0xb42ae3d9
>> - .long 0xb25b29f2, 0x8fe4c34d
>> - .long 0x9a5ede41, 0x2178513a
>> - .long 0xa563905d, 0xdf99fc11
>> - .long 0x45cddf4e, 0xe0ac139e
>> - .long 0xacfa3103, 0x6c23e841
>> - .long 0xa51b6135, 0x170076fa
>> -
>> -## Warning
>> -.section .note.GNU-stack,"",@progbits
>> diff --git a/crypto/crc32c.c b/crypto/crc32c.c
>> index 9a3c9fc14eab..daf232c44e4d 100644
>> --- a/crypto/crc32c.c
>> +++ b/crypto/crc32c.c
>> @@ -10,6 +10,7 @@
>>
>> #include <inttypes.h>
>> #include <stdio.h>
>> +#include <string.h>
>> #include "crypto/crc32c.h"
>> #include "common/cpu-utils.h"
>>
>> @@ -19,10 +20,262 @@ static uint32_t (*crc32c_impl)(uint32_t crc, unsigned char const *data, uint32_t
>> #ifdef __x86_64__
>>
>> #include <nmmintrin.h>
>> +#include <wmmintrin.h>
>>
>> -/* asmlinkage */ unsigned int crc_pcl(const unsigned char *buffer, unsigned int len, unsigned int crc_init);
>> -static unsigned int crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len) {
>> - return crc_pcl(data, len, crc);
>> +/*
>> + * Fast CRC32C with PCLMULQDQ, three interleaved crc32 lanes combined with
>> + * carry-less multiplication. Derived from the Intel implementation
>> + * (crc32c-pcl-intel-asm_64.S in the kernel), available under GPLv2 or the
>> + * OpenIB.org BSD license.
>> + *
>> + * Copyright (C) 2012 Intel Corporation.
>> + * Copyright 2024 Google LLC
>> + *
>> + * Authors:
>> + * Wajdi Feghali <wajdi.k.feghali@intel.com>
>> + * James Guilford <james.guilford@intel.com>
>> + * David Cote <david.m.cote@intel.com>
>> + * Tim Chen <tim.c.chen@linux.intel.com>
>> + */
>> +
>> +/* ISCSI CRC 32 Implementation with crc32 and pclmulqdq Instruction */
>> +
>> +/*
>> + * Define threshold below which buffers are considered "small" and routed to
>> + * regular CRC code that does not interleave the CRC instructions.
>> + */
>> +#define PCL_SMALL_SIZE 200
>> +
>> +/*
>> + * PCLMULQDQ tables
>> + * Table is 128 entries x 2 words (8 bytes) each. The first entry is for idx 1
>> + * (one qword per lane), the constants are used as K1:K2 when combining lanes.
>> + */
>> +static const uint32_t crc32c_pcl_k_table[128][2] = {
>> + { 0x493c7d27, 0x00000001 },
>> + { 0xba4fc28e, 0x493c7d27 },
>> + { 0xddc0152b, 0xf20c0dfe },
>> + { 0x9e4addf8, 0xba4fc28e },
>> + { 0x39d3b296, 0x3da6d0cb },
>> + { 0x0715ce53, 0xddc0152b },
>> + { 0x47db8317, 0x1c291d04 },
>> + { 0x0d3b6092, 0x9e4addf8 },
>> + { 0xc96cfdc0, 0x740eef02 },
>> + { 0x878a92a7, 0x39d3b296 },
>> + { 0xdaece73e, 0x083a6eec },
>> + { 0xab7aff2a, 0x0715ce53 },
>> + { 0x2162d385, 0xc49f4f67 },
>> + { 0x83348832, 0x47db8317 },
>> + { 0x299847d5, 0x2ad91c30 },
>> + { 0xb9e02b86, 0x0d3b6092 },
>> + { 0x18b33a4e, 0x6992cea2 },
>> + { 0xb6dd949b, 0xc96cfdc0 },
>> + { 0x78d9ccb7, 0x7e908048 },
>> + { 0xbac2fd7b, 0x878a92a7 },
>> + { 0xa60ce07b, 0x1b3d8f29 },
>> + { 0xce7f39f4, 0xdaece73e },
>> + { 0x61d82e56, 0xf1d0f55e },
>> + { 0xd270f1a2, 0xab7aff2a },
>> + { 0xc619809d, 0xa87ab8a8 },
>> + { 0x2b3cac5d, 0x2162d385 },
>> + { 0x65863b64, 0x8462d800 },
>> + { 0x1b03397f, 0x83348832 },
>> + { 0xebb883bd, 0x71d111a8 },
>> + { 0xb3e32c28, 0x299847d5 },
>> + { 0x064f7f26, 0xffd852c6 },
>> + { 0xdd7e3b0c, 0xb9e02b86 },
>> + { 0xf285651c, 0xdcb17aa4 },
>> + { 0x10746f3c, 0x18b33a4e },
>> + { 0xc7a68855, 0xf37c5aee },
>> + { 0x271d9844, 0xb6dd949b },
>> + { 0x8e766a0c, 0x6051d5a2 },
>> + { 0x93a5f730, 0x78d9ccb7 },
>> + { 0x6cb08e5c, 0x18b0d4ff },
>> + { 0x6b749fb2, 0xbac2fd7b },
>> + { 0x1393e203, 0x21f3d99c },
>> + { 0xcec3662e, 0xa60ce07b },
>> + { 0x96c515bb, 0x8f158014 },
>> + { 0xe6fc4e6a, 0xce7f39f4 },
>> + { 0x8227bb8a, 0xa00457f7 },
>> + { 0xb0cd4768, 0x61d82e56 },
>> + { 0x39c7ff35, 0x8d6d2c43 },
>> + { 0xd7a4825c, 0xd270f1a2 },
>> + { 0x0ab3844b, 0x00ac29cf },
>> + { 0x0167d312, 0xc619809d },
>> + { 0xf6076544, 0xe9adf796 },
>> + { 0x26f6a60a, 0x2b3cac5d },
>> + { 0xa741c1bf, 0x96638b34 },
>> + { 0x98d8d9cb, 0x65863b64 },
>> + { 0x49c3cc9c, 0xe0e9f351 },
>> + { 0x68bce87a, 0x1b03397f },
>> + { 0x57a3d037, 0x9af01f2d },
>> + { 0x6956fc3b, 0xebb883bd },
>> + { 0x42d98888, 0x2cff42cf },
>> + { 0x3771e98f, 0xb3e32c28 },
>> + { 0xb42ae3d9, 0x88f25a3a },
>> + { 0x2178513a, 0x064f7f26 },
>> + { 0xe0ac139e, 0x4e36f0b0 },
>> + { 0x170076fa, 0xdd7e3b0c },
>> + { 0x444dd413, 0xbd6f81f8 },
>> + { 0x6f345e45, 0xf285651c },
>> + { 0x41d17b64, 0x91c9bd4b },
>> + { 0xff0dba97, 0x10746f3c },
>> + { 0xa2b73df1, 0x885f087b },
>> + { 0xf872e54c, 0xc7a68855 },
>> + { 0x1e41e9fc, 0x4c144932 },
>> + { 0x86d8e4d2, 0x271d9844 },
>> + { 0x651bd98b, 0x52148f02 },
>> + { 0x5bb8f1bc, 0x8e766a0c },
>> + { 0xa90fd27a, 0xa3c6f37a },
>> + { 0xb3af077a, 0x93a5f730 },
>> + { 0x4984d782, 0xd7c0557f },
>> + { 0xca6ef3ac, 0x6cb08e5c },
>> + { 0x234e0b26, 0x63ded06a },
>> + { 0xdd66cbbb, 0x6b749fb2 },
>> + { 0x4597456a, 0x4d56973c },
>> + { 0xe9e28eb4, 0x1393e203 },
>> + { 0x7b3ff57a, 0x9669c9df },
>> + { 0xc9c8b782, 0xcec3662e },
>> + { 0x3f70cc6f, 0xe417f38a },
>> + { 0x93e106a4, 0x96c515bb },
>> + { 0x62ec6c6d, 0x4b9e0f71 },
>> + { 0xd813b325, 0xe6fc4e6a },
>> + { 0x0df04680, 0xd104b8fc },
>> + { 0x2342001e, 0x8227bb8a },
>> + { 0x0a2a8d7e, 0x5b397730 },
>> + { 0x6d9a4957, 0xb0cd4768 },
>> + { 0xe8b6368b, 0xe78eb416 },
>> + { 0xd2c3ed1a, 0x39c7ff35 },
>> + { 0x995a5724, 0x61ff0e01 },
>> + { 0x9ef68d35, 0xd7a4825c },
>> + { 0x0c139b31, 0x8d96551c },
>> + { 0xf2271e60, 0x0ab3844b },
>> + { 0x0b0bf8ca, 0x0bf80dd2 },
>> + { 0x2664fd8b, 0x0167d312 },
>> + { 0xed64812d, 0x8821abed },
>> + { 0x02ee03b2, 0xf6076544 },
>> + { 0x8604ae0f, 0x6a45d2b2 },
>> + { 0x363bd6b3, 0x26f6a60a },
>> + { 0x135c83fd, 0xd8d26619 },
>> + { 0x5fabe670, 0xa741c1bf },
>> + { 0x35ec3279, 0xde87806c },
>> + { 0x00bcf5f6, 0x98d8d9cb },
>> + { 0x8ae00689, 0x14338754 },
>> + { 0x17f27698, 0x49c3cc9c },
>> + { 0x58ca5f00, 0x5bd2011f },
>> + { 0xaa7c7ad5, 0x68bce87a },
>> + { 0xb5cfca28, 0xdd07448e },
>> + { 0xded288f8, 0x57a3d037 },
>> + { 0x59f229bc, 0xdde8f5b9 },
>> + { 0x6d390dec, 0x6956fc3b },
>> + { 0x37170390, 0xa3e3e02c },
>> + { 0x6353c1cc, 0x42d98888 },
>> + { 0xc4584f5c, 0xd73c7bea },
>> + { 0xf48642e9, 0x3771e98f },
>> + { 0x531377e2, 0x80ff0093 },
>> + { 0xdd35bc8d, 0xb42ae3d9 },
>> + { 0xb25b29f2, 0x8fe4c34d },
>> + { 0x9a5ede41, 0x2178513a },
>> + { 0xa563905d, 0xdf99fc11 },
>> + { 0x45cddf4e, 0xe0ac139e },
>> + { 0xacfa3103, 0x6c23e841 },
>> + { 0xa51b6135, 0x170076fa },
>> +};
>> +
>> +static inline uint64_t crc32c_load64(const unsigned char *p)
>> +{
>> + uint64_t v;
>> +
>> + memcpy(&v, p, sizeof(v));
>> + return v;
>> +}
>> +
>> +__attribute__((target("sse4.2,pclmul")))
>> +static uint32_t crc32c_pcl(uint32_t crc, unsigned char const *data, uint32_t len)
>> +{
>> + uint64_t crc0 = crc;
>> +
>> + if (len >= PCL_SMALL_SIZE) {
>> + unsigned int misaligned = -(uintptr_t)data & 7;
>> +
>> + /*
>> + * 1) ALIGN:
>> + * Process 1 <= misaligned <= 7 bytes individually in order to
>> + * align the remaining data to an 8-byte boundary.
>> + */
>> + len -= misaligned;
>> + while (misaligned--)
>> + crc0 = _mm_crc32_u8(crc0, *data++);
>> + }
>> +
>> + /*
>> + * 2) PROCESS BLOCK:
>> + * 5) If more blocks remain, repeat from here.
>> + */
>> + while (len >= PCL_SMALL_SIZE) {
>> + /*
>> + * Processing 128 qwords from each lane for a full block,
>> + * otherwise compute floor(len / 24) to get the number of qwords
>> + * to process from each lane. 2731 = ceil(2^16 / 24)
>> + */
>> + unsigned int qwords = len >= 128 * 24 ? 128 : (len * 2731) >> 16;
>> + unsigned int chunk = qwords * 8;
>> + const uint32_t *k = crc32c_pcl_k_table[qwords - 1];
>> + const unsigned char *p1 = data + chunk;
>> + const unsigned char *p2 = data + 2 * chunk;
>> + uint64_t crc1 = 0, crc2 = 0;
>> + __m128i kvec, x1, x2;
>> + unsigned int i;
>> +
>> + /* 3) CRC each of three lanes: */
>> + for (i = 0; i < qwords - 1; i++) {
>> + crc0 = _mm_crc32_u64(crc0, crc32c_load64(data + i * 8));
>> + crc1 = _mm_crc32_u64(crc1, crc32c_load64(p1 + i * 8));
>> + crc2 = _mm_crc32_u64(crc2, crc32c_load64(p2 + i * 8));
>> + }
>> + crc0 = _mm_crc32_u64(crc0, crc32c_load64(data + i * 8));
>> + crc1 = _mm_crc32_u64(crc1, crc32c_load64(p1 + i * 8));
>> + /* SKIP the last qword of crc2, don't do this one yet */
>> +
>> + /* 4) Combine three results: */
>> + /* 2 consts: K1:K2 */
>> + kvec = _mm_set_epi64x(k[1], k[0]);
>> + /* CRC for block 1, multiply by K2 */
>> + x1 = _mm_clmulepi64_si128(_mm_cvtsi64_si128(crc0), kvec, 0x00);
>> + /* CRC for block 2, multiply by K1 */
>> + x2 = _mm_clmulepi64_si128(_mm_cvtsi64_si128(crc1), kvec, 0x10);
>> + x1 = _mm_xor_si128(x1, x2);
>> + crc0 = _mm_crc32_u64(crc2, _mm_cvtsi128_si64(x1) ^
>> + crc32c_load64(p2 + i * 8));
>> +
>> + data += 3 * chunk;
>> + len -= 3 * chunk;
>> + }
>> +
>> + /* 6) Process any remainder without interleaving: */
>> + while (len >= 8) {
>> + crc0 = _mm_crc32_u64(crc0, crc32c_load64(data));
>> + data += 8;
>> + len -= 8;
>> + }
>> + if (len & 4) {
>> + uint32_t v;
>> +
>> + memcpy(&v, data, sizeof(v));
>> + crc0 = _mm_crc32_u32(crc0, v);
>> + data += 4;
>> + }
>> + if (len & 2) {
>> + uint16_t v;
>> +
>> + memcpy(&v, data, sizeof(v));
>> + crc0 = _mm_crc32_u16(crc0, v);
>> + data += 2;
>> + }
>> + if (len & 1)
>> + crc0 = _mm_crc32_u8(crc0, *data);
>> +
>> + return crc0;
>> }
>>
>> /*
>> @@ -82,7 +335,8 @@ static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t l
>> void crc32c_init_accel(void)
>> {
>> if (0) {
>> - } else if (cpu_has_feature(CPU_FLAG_PCLMUL)) {
>> + } else if (cpu_has_feature(CPU_FLAG_PCLMUL) &&
>> + cpu_has_feature(CPU_FLAG_SSE42)) {
>> /* printf("CRC32C: pcl\n"); */
>> crc32c_impl = crc32c_pcl;
>> } else if (cpu_has_feature(CPU_FLAG_SSE42)) {
>> --
>> 2.56.0
>>
>>
> ---end quoted text---
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH v2 3/7] btrfs-progs: rename cpu features to prepare for other archs
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
2026-11-09 4:09 ` [PATCH v2 1/7] btrfs-progs: cleanup inline asm usage Qu Wenruo
2026-11-09 4:09 ` [PATCH v2 2/7] btrfs-progs: crypto/crc32c: port crc32c-pcl optimization to C Qu Wenruo
@ 2026-11-09 4:09 ` Qu Wenruo
2026-11-09 4:09 ` [PATCH v2 4/7] btrfs-progs: simplify the cpu utils for future expanasion Qu Wenruo
` (3 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:09 UTC (permalink / raw)
To: linux-btrfs
Currently btrfs-progs only implements extra instructions for x86_64 for
hardware accelerated hash algorithms.
But we're soon going to support arm64 hardware accelerated hashes, so
rename the follow names to include arch prefixes:
- CPU_FLAG_*
Now it's CPU_FLAG_NONE and CPU_FLAG_X64_*.
CPU_FLAG_ARM64_* will come soon.
- FLAG() helper
Now it's only FLAG_X64(). Will have FLAG_ARM64() in the future.
- hash-speedtest and hash-vectest names
The following are affected:
* CRC32C-SSE42
CRC32C-X64-SSE42
* CRC32c-NI
CRC32C-X64-NI
* SHA256-NI
SHA256-X64-NI
* BALKE2-SSE2
BLAKE2-X64-SSE2
* BALKE2-SSE41
BLAKE2-X64-SSE41
* BLAKE2-AVX2
BLAKE2-X64-AVX2
This change also makes the name[] array larger, now it's 20 bytes.
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
common/cpu-utils.c | 36 ++++++++++++++++++------------------
common/cpu-utils.h | 16 ++++++++--------
crypto/blake2b-ref.c | 6 +++---
crypto/crc32c.c | 6 +++---
crypto/hash-speedtest.c | 30 +++++++++++++++---------------
crypto/hash-vectest.c | 24 ++++++++++++------------
crypto/sha224-256.c | 2 +-
7 files changed, 60 insertions(+), 60 deletions(-)
diff --git a/common/cpu-utils.c b/common/cpu-utils.c
index a99efb932ff2..d8fbf664b998 100644
--- a/common/cpu-utils.c
+++ b/common/cpu-utils.c
@@ -23,21 +23,21 @@
unsigned long __cpu_flags = CPU_FLAG_NONE;
unsigned long __cpu_flags_orig = CPU_FLAG_NONE;
-#define FLAG(name) if (__cpu_flags & CPU_FLAG_ ## name) printf(" " #name)
+#define FLAG_X64(name) if (__cpu_flags & CPU_FLAG_X64_ ## name) printf(" " #name)
void cpu_print_flags(void) {
printf("CPU flags: 0x%lx\n", __cpu_flags);
printf("CPU features:");
- FLAG(SSE2);
- FLAG(SSSE3);
- FLAG(SSE41);
- FLAG(SSE42);
- FLAG(PCLMUL);
- FLAG(SHA);
- FLAG(AVX);
- FLAG(AVX2);
+ FLAG_X64(SSE2);
+ FLAG_X64(SSSE3);
+ FLAG_X64(SSE41);
+ FLAG_X64(SSE42);
+ FLAG_X64(PCLMUL);
+ FLAG_X64(SHA);
+ FLAG_X64(AVX);
+ FLAG_X64(AVX2);
putchar(10);
}
-#undef FLAG
+#undef FLAG_X64
#ifdef __x86_64__
@@ -48,26 +48,26 @@ void cpu_detect_flags(void)
__builtin_cpu_init();
__cpu_flags = CPU_FLAG_NONE;
if (__builtin_cpu_supports("sse2"))
- __cpu_flags |= CPU_FLAG_SSE2;
+ __cpu_flags |= CPU_FLAG_X64_SSE2;
if (__builtin_cpu_supports("ssse3"))
- __cpu_flags |= CPU_FLAG_SSSE3;
+ __cpu_flags |= CPU_FLAG_X64_SSSE3;
if (__builtin_cpu_supports("sse4.1"))
- __cpu_flags |= CPU_FLAG_SSE41;
+ __cpu_flags |= CPU_FLAG_X64_SSE41;
if (__builtin_cpu_supports("sse4.2"))
- __cpu_flags |= CPU_FLAG_SSE42;
+ __cpu_flags |= CPU_FLAG_X64_SSE42;
#if HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL
if (__builtin_cpu_supports("pclmul"))
- __cpu_flags |= CPU_FLAG_PCLMUL;
+ __cpu_flags |= CPU_FLAG_X64_PCLMUL;
#endif
if (__builtin_cpu_supports("avx"))
- __cpu_flags |= CPU_FLAG_AVX;
+ __cpu_flags |= CPU_FLAG_X64_AVX;
if (__builtin_cpu_supports("avx2"))
- __cpu_flags |= CPU_FLAG_AVX2;
+ __cpu_flags |= CPU_FLAG_X64_AVX2;
/* Flags unsupported by builtins */
__cpuid_count(7, 0, a, b, c, d);
if (b & (1UL << 29))
- __cpu_flags |= CPU_FLAG_SHA;
+ __cpu_flags |= CPU_FLAG_X64_SHA;
__cpu_flags_orig = __cpu_flags;
}
diff --git a/common/cpu-utils.h b/common/cpu-utils.h
index 21678dc6e8e7..97107f3f9086 100644
--- a/common/cpu-utils.h
+++ b/common/cpu-utils.h
@@ -30,14 +30,14 @@
enum cpu_feature {
ENUM_CPU_BIT(CPU_FLAG_NONE),
- ENUM_CPU_BIT(CPU_FLAG_SSE2),
- ENUM_CPU_BIT(CPU_FLAG_SSSE3),
- ENUM_CPU_BIT(CPU_FLAG_SSE41),
- ENUM_CPU_BIT(CPU_FLAG_SSE42),
- ENUM_CPU_BIT(CPU_FLAG_PCLMUL),
- ENUM_CPU_BIT(CPU_FLAG_SHA),
- ENUM_CPU_BIT(CPU_FLAG_AVX),
- ENUM_CPU_BIT(CPU_FLAG_AVX2),
+ ENUM_CPU_BIT(CPU_FLAG_X64_SSE2),
+ ENUM_CPU_BIT(CPU_FLAG_X64_SSSE3),
+ ENUM_CPU_BIT(CPU_FLAG_X64_SSE41),
+ ENUM_CPU_BIT(CPU_FLAG_X64_SSE42),
+ ENUM_CPU_BIT(CPU_FLAG_X64_PCLMUL),
+ ENUM_CPU_BIT(CPU_FLAG_X64_SHA),
+ ENUM_CPU_BIT(CPU_FLAG_X64_AVX),
+ ENUM_CPU_BIT(CPU_FLAG_X64_AVX2),
};
#undef ENUM_CPU_BIT
diff --git a/crypto/blake2b-ref.c b/crypto/blake2b-ref.c
index 2c7e72ee2026..56774ccb04f9 100644
--- a/crypto/blake2b-ref.c
+++ b/crypto/blake2b-ref.c
@@ -224,15 +224,15 @@ void blake2_init_accel(void)
{
if (0);
#if HAVE_CFLAG_mavx2 == 1
- else if (cpu_has_feature(CPU_FLAG_AVX2))
+ else if (cpu_has_feature(CPU_FLAG_X64_AVX2))
blake2b_compress = blake2b_compress_avx2;
#endif
#if HAVE_CFLAG_msse41 == 1
- else if (cpu_has_feature(CPU_FLAG_SSE41))
+ else if (cpu_has_feature(CPU_FLAG_X64_SSE41))
blake2b_compress = blake2b_compress_sse41;
#endif
#if HAVE_CFLAG_msse2 == 1
- else if (cpu_has_feature(CPU_FLAG_SSE2))
+ else if (cpu_has_feature(CPU_FLAG_X64_SSE2))
blake2b_compress = blake2b_compress_sse2;
#endif
else
diff --git a/crypto/crc32c.c b/crypto/crc32c.c
index daf232c44e4d..0da4a1573c30 100644
--- a/crypto/crc32c.c
+++ b/crypto/crc32c.c
@@ -335,11 +335,11 @@ static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t l
void crc32c_init_accel(void)
{
if (0) {
- } else if (cpu_has_feature(CPU_FLAG_PCLMUL) &&
- cpu_has_feature(CPU_FLAG_SSE42)) {
+ } else if (cpu_has_feature(CPU_FLAG_X64_PCLMUL) &&
+ cpu_has_feature(CPU_FLAG_X64_SSE42)) {
/* printf("CRC32C: pcl\n"); */
crc32c_impl = crc32c_pcl;
- } else if (cpu_has_feature(CPU_FLAG_SSE42)) {
+ } else if (cpu_has_feature(CPU_FLAG_X64_SSE42)) {
/* printf("CRC32c: intel\n"); */
crc32c_impl = crc32c_sse42;
} else {
diff --git a/crypto/hash-speedtest.c b/crypto/hash-speedtest.c
index 95ba63ee6025..5446161af997 100644
--- a/crypto/hash-speedtest.c
+++ b/crypto/hash-speedtest.c
@@ -168,7 +168,7 @@ int main(int argc, char **argv) {
int iter;
char *filter = NULL;
struct contestant {
- char name[16];
+ char name[20];
int (*digest)(const u8 *buf, size_t length, u8 *out);
int digest_size;
u64 cycles;
@@ -180,10 +180,10 @@ int main(int argc, char **argv) {
{ .name = "NULL-MEMCPY", .digest = hash_null_memcpy, .digest_size = 32 },
{ .name = "CRC32C-ref", .digest = hash_crc32c, .digest_size = 4,
.cpu_flag = CPU_FLAG_NONE },
- { .name = "CRC32C-SSE42", .digest = hash_crc32c, .digest_size = 4,
- .cpu_flag = CPU_FLAG_SSE42 },
- { .name = "CRC32C-NI", .digest = hash_crc32c, .digest_size = 4,
- .cpu_flag = CPU_FLAG_PCLMUL },
+ { .name = "CRC32C-X64-SSE42", .digest = hash_crc32c, .digest_size = 4,
+ .cpu_flag = CPU_FLAG_X64_SSE42 },
+ { .name = "CRC32C-X64-NI", .digest = hash_crc32c, .digest_size = 4,
+ .cpu_flag = CPU_FLAG_X64_PCLMUL },
{ .name = "XXHASH", .digest = hash_xxhash, .digest_size = 8 },
{ .name = "SHA256-ref", .digest = hash_sha256, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
@@ -197,8 +197,8 @@ int main(int argc, char **argv) {
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BOTAN + 1 },
{ .name = "SHA256-openssl", .digest = hash_sha256, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_OPENSSL + 1 },
- { .name = "SHA256-NI", .digest = hash_sha256, .digest_size = 32,
- .cpu_flag = CPU_FLAG_SHA, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
+ { .name = "SHA256-X64-NI", .digest = hash_sha256, .digest_size = 32,
+ .cpu_flag = CPU_FLAG_X64_SHA, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
{ .name = "BLAKE2-ref", .digest = hash_blake2b, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
{ .name = "BLAKE2-gcrypt", .digest = hash_blake2b, .digest_size = 32,
@@ -211,12 +211,12 @@ int main(int argc, char **argv) {
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BOTAN + 1 },
{ .name = "BLAKE2-openssl", .digest = hash_blake2b, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_OPENSSL + 1 },
- { .name = "BLAKE2-SSE2", .digest = hash_blake2b, .digest_size = 32,
- .cpu_flag = CPU_FLAG_SSE2, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
- { .name = "BLAKE2-SSE41", .digest = hash_blake2b, .digest_size = 32,
- .cpu_flag = CPU_FLAG_SSE41, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
- { .name = "BLAKE2-AVX2", .digest = hash_blake2b, .digest_size = 32,
- .cpu_flag = CPU_FLAG_AVX2, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
+ { .name = "BLAKE2-X64-SSE2", .digest = hash_blake2b, .digest_size = 32,
+ .cpu_flag = CPU_FLAG_X64_SSE2, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
+ { .name = "BLAKE2-X64-SSE41", .digest = hash_blake2b, .digest_size = 32,
+ .cpu_flag = CPU_FLAG_X64_SSE41, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
+ { .name = "BLAKE2-X64-AVX2", .digest = hash_blake2b, .digest_size = 32,
+ .cpu_flag = CPU_FLAG_X64_AVX2, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
};
int units = UNITS_CYCLES;
@@ -293,7 +293,7 @@ int main(int argc, char **argv) {
u64 total = 0;
if (c->cpu_flag != 0 && !cpu_has_feature(c->cpu_flag)) {
- printf("%14s: no CPU support\n", c->name);
+ printf("%16s: no CPU support\n", c->name);
continue;
}
/* Backend not compiled in */
@@ -305,7 +305,7 @@ int main(int argc, char **argv) {
else if (filter && fnmatch(filter, c->name, FNM_CASEFOLD) != 0)
continue;
- printf("%14s: ", c->name);
+ printf("%16s: ", c->name);
fflush(stdout);
if (c->cpu_flag) {
diff --git a/crypto/hash-vectest.c b/crypto/hash-vectest.c
index e9c6eda976a4..2d9cc5da8df6 100644
--- a/crypto/hash-vectest.c
+++ b/crypto/hash-vectest.c
@@ -435,18 +435,18 @@ static const struct hash_testspec test_spec[] = {
.cpu_flag = CPU_FLAG_NONE,
.hash = hash_crc32c,
}, {
- .name = "CRC32C-SSE42",
+ .name = "CRC32C-X64-SSE42",
.digest_size = 4,
.testvec = crc32c_tv,
.count = ARRAY_SIZE(crc32c_tv),
- .cpu_flag = CPU_FLAG_SSE42,
+ .cpu_flag = CPU_FLAG_X64_SSE42,
.hash = hash_crc32c,
}, {
- .name = "CRC32C-NI",
+ .name = "CRC32C-X64-NI",
.digest_size = 4,
.testvec = crc32c_tv,
.count = ARRAY_SIZE(crc32c_tv),
- .cpu_flag = CPU_FLAG_PCLMUL,
+ .cpu_flag = CPU_FLAG_X64_PCLMUL,
.hash = hash_crc32c
}, {
.name = "XXHASH",
@@ -503,11 +503,11 @@ static const struct hash_testspec test_spec[] = {
.hash = hash_sha256,
.backend = CRYPTOPROVIDER_OPENSSL + 1
}, {
- .name = "SHA256-NI",
+ .name = "SHA256-X64-NI",
.digest_size = 32,
.testvec = sha256_tv,
.count = ARRAY_SIZE(sha256_tv),
- .cpu_flag = CPU_FLAG_SHA,
+ .cpu_flag = CPU_FLAG_X64_SHA,
.hash = hash_sha256,
.backend = CRYPTOPROVIDER_BUILTIN + 1
}, {
@@ -559,27 +559,27 @@ static const struct hash_testspec test_spec[] = {
.hash = hash_blake2b,
.backend = CRYPTOPROVIDER_OPENSSL + 1
}, {
- .name = "BLAKE2-SSE2",
+ .name = "BLAKE2-X64-SSE2",
.digest_size = 32,
.testvec = blake2b_256_tv,
.count = ARRAY_SIZE(blake2b_256_tv),
- .cpu_flag = CPU_FLAG_SSE2,
+ .cpu_flag = CPU_FLAG_X64_SSE2,
.hash = hash_blake2b,
.backend = CRYPTOPROVIDER_BUILTIN + 1
}, {
- .name = "BLAKE2-SSE41",
+ .name = "BLAKE2-X64-SSE41",
.digest_size = 32,
.testvec = blake2b_256_tv,
.count = ARRAY_SIZE(blake2b_256_tv),
- .cpu_flag = CPU_FLAG_SSE41,
+ .cpu_flag = CPU_FLAG_X64_SSE41,
.hash = hash_blake2b,
.backend = CRYPTOPROVIDER_BUILTIN + 1
}, {
- .name = "BLAKE2-AVX2",
+ .name = "BLAKE2-X64-AVX2",
.digest_size = 32,
.testvec = blake2b_256_tv,
.count = ARRAY_SIZE(blake2b_256_tv),
- .cpu_flag = CPU_FLAG_AVX2,
+ .cpu_flag = CPU_FLAG_X64_AVX2,
.hash = hash_blake2b,
.backend = CRYPTOPROVIDER_BUILTIN + 1
}
diff --git a/crypto/sha224-256.c b/crypto/sha224-256.c
index e2075de5abfb..69e7ce5b9bd2 100644
--- a/crypto/sha224-256.c
+++ b/crypto/sha224-256.c
@@ -110,7 +110,7 @@ static void sha256_process_x86_dispatch(SHA256Context *context)
void sha256_init_accel(void)
{
#if HAVE_CFLAG_msha == 1
- if (cpu_has_feature(CPU_FLAG_SHA))
+ if (cpu_has_feature(CPU_FLAG_X64_SHA))
sha256_process_message_block = sha256_process_x86_dispatch;
else
#endif
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 4/7] btrfs-progs: simplify the cpu utils for future expanasion
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
` (2 preceding siblings ...)
2026-11-09 4:09 ` [PATCH v2 3/7] btrfs-progs: rename cpu features to prepare for other archs Qu Wenruo
@ 2026-11-09 4:09 ` Qu Wenruo
2026-11-09 4:09 ` [PATCH v2 5/7] btrfs-progs: crypto: select accelerated algo directly for testing Qu Wenruo
` (2 subsequent siblings)
6 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:09 UTC (permalink / raw)
To: linux-btrfs
Currently we define x86_64 specific cpu_detect_flags()/cpu_*_level(),
and all other architectures falls back to no-op for those 3 functions.
This makes future expansion much more complex. Change the code to make
future expansion easier by:
- Hide the architecture dependent code inside cpu_detect_flags()
- Use __builtin_cpu_supports("sha") for the previously unsupported flag
If the compiler is not uptodate, skip the flag, just like what we did
for pclmul.
Now we no longer need the hardcoded cpuid test, nor the <cpuid.h>
header.
- Remove the dead branch of cpu_set_level()
All callers pass a non-zero bit in, so use UASSERT() to do a quick
check, and remove the fallback branch.
- Use the same cpu_*_level() for all architectures
So they do not need to be hide behind certain architecture.
- Skip accelerated algos that are not supported by compiler
If the compiler is too old to detect sha/pclmul, there is no need to
show them in the hash-*test.
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
common/cpu-utils.c | 36 ++++++++++--------------------------
config/ax_gcc_builtin.m4 | 1 +
configure.ac | 1 +
crypto/hash-speedtest.c | 4 ++++
crypto/hash-vectest.c | 17 +++++++++++++----
5 files changed, 29 insertions(+), 30 deletions(-)
diff --git a/common/cpu-utils.c b/common/cpu-utils.c
index d8fbf664b998..e933b8322dc5 100644
--- a/common/cpu-utils.c
+++ b/common/cpu-utils.c
@@ -15,10 +15,8 @@
*/
#include <stdio.h>
-#ifdef __x86_64__
-#include <cpuid.h>
-#endif
#include "common/cpu-utils.h"
+#include "common/messages.h"
unsigned long __cpu_flags = CPU_FLAG_NONE;
unsigned long __cpu_flags_orig = CPU_FLAG_NONE;
@@ -39,14 +37,12 @@ void cpu_print_flags(void) {
}
#undef FLAG_X64
-#ifdef __x86_64__
void cpu_detect_flags(void)
{
- unsigned int a, b, c, d;
-
- __builtin_cpu_init();
__cpu_flags = CPU_FLAG_NONE;
+#ifdef __x86_64__
+ __builtin_cpu_init();
if (__builtin_cpu_supports("sse2"))
__cpu_flags |= CPU_FLAG_X64_SSE2;
if (__builtin_cpu_supports("ssse3"))
@@ -58,39 +54,27 @@ void cpu_detect_flags(void)
#if HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL
if (__builtin_cpu_supports("pclmul"))
__cpu_flags |= CPU_FLAG_X64_PCLMUL;
-#endif
+#endif /* HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL */
if (__builtin_cpu_supports("avx"))
__cpu_flags |= CPU_FLAG_X64_AVX;
if (__builtin_cpu_supports("avx2"))
__cpu_flags |= CPU_FLAG_X64_AVX2;
-
- /* Flags unsupported by builtins */
- __cpuid_count(7, 0, a, b, c, d);
- if (b & (1UL << 29))
+#if HAVE___BUILTIN_CPU_SUPPORTS__SHA
+ if (__builtin_cpu_supports("sha"))
__cpu_flags |= CPU_FLAG_X64_SHA;
+#endif /* HAVE___BUILTIN_CPU_SUPPORTS__SHA */
+#endif /* __x86_64__ */
__cpu_flags_orig = __cpu_flags;
}
void cpu_set_level(unsigned long topbit)
{
- if (topbit)
- __cpu_flags &= (topbit << 1) - 1;
- else
- __cpu_flags = CPU_FLAG_NONE;
+ UASSERT(topbit);
+ __cpu_flags &= (topbit << 1) - 1;
}
void cpu_reset_level(void)
{
__cpu_flags = __cpu_flags_orig;
}
-
-#else
-
-void cpu_detect_flags() { }
-
-void cpu_set_level(unsigned long topbit) { }
-
-void cpu_reset_level(void) { }
-
-#endif
diff --git a/config/ax_gcc_builtin.m4 b/config/ax_gcc_builtin.m4
index 224e824c1dfb..a9eb4aa85a66 100644
--- a/config/ax_gcc_builtin.m4
+++ b/config/ax_gcc_builtin.m4
@@ -125,6 +125,7 @@ AC_DEFUN([AX_GCC_BUILTIN], [
[__builtin_cpu_is], [$1("intel")],
[__builtin_cpu_supports], [$1("sse")],
[__builtin_cpu_supports__pclmul], [__builtin_cpu_supports("pclmul")],
+ [__builtin_cpu_supports__sha], [__builtin_cpu_supports("sha")],
[__builtin_ctz], [$1(0)],
[__builtin_ctzl], [$1(0)],
[__builtin_ctzll], [$1(0)],
diff --git a/configure.ac b/configure.ac
index 07cd92df5947..b4fa907f6656 100644
--- a/configure.ac
+++ b/configure.ac
@@ -97,6 +97,7 @@ AX_GCC_BUILTIN([__builtin_add_overflow])
AX_GCC_BUILTIN([__builtin_sub_overflow])
AX_GCC_BUILTIN([__builtin_mul_overflow])
AX_GCC_BUILTIN([__builtin_cpu_supports__pclmul])
+AX_GCC_BUILTIN([__builtin_cpu_supports__sha])
AC_CHECK_HEADERS([fcntl.h])
AC_CHECK_HEADERS([inttypes.h])
diff --git a/crypto/hash-speedtest.c b/crypto/hash-speedtest.c
index 5446161af997..b51ccbb19284 100644
--- a/crypto/hash-speedtest.c
+++ b/crypto/hash-speedtest.c
@@ -182,8 +182,10 @@ int main(int argc, char **argv) {
.cpu_flag = CPU_FLAG_NONE },
{ .name = "CRC32C-X64-SSE42", .digest = hash_crc32c, .digest_size = 4,
.cpu_flag = CPU_FLAG_X64_SSE42 },
+#if HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL
{ .name = "CRC32C-X64-NI", .digest = hash_crc32c, .digest_size = 4,
.cpu_flag = CPU_FLAG_X64_PCLMUL },
+#endif /* HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL */
{ .name = "XXHASH", .digest = hash_xxhash, .digest_size = 8 },
{ .name = "SHA256-ref", .digest = hash_sha256, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
@@ -197,8 +199,10 @@ int main(int argc, char **argv) {
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BOTAN + 1 },
{ .name = "SHA256-openssl", .digest = hash_sha256, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_OPENSSL + 1 },
+#if HAVE___BUILTIN_CPU_SUPPORTS__SHA
{ .name = "SHA256-X64-NI", .digest = hash_sha256, .digest_size = 32,
.cpu_flag = CPU_FLAG_X64_SHA, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
+#endif /* HAVE___BUILTIN_CPU_SUPPORTS__SHA */
{ .name = "BLAKE2-ref", .digest = hash_blake2b, .digest_size = 32,
.cpu_flag = CPU_FLAG_NONE, .backend = CRYPTOPROVIDER_BUILTIN + 1 },
{ .name = "BLAKE2-gcrypt", .digest = hash_blake2b, .digest_size = 32,
diff --git a/crypto/hash-vectest.c b/crypto/hash-vectest.c
index 2d9cc5da8df6..3b1b79eae138 100644
--- a/crypto/hash-vectest.c
+++ b/crypto/hash-vectest.c
@@ -441,14 +441,19 @@ static const struct hash_testspec test_spec[] = {
.count = ARRAY_SIZE(crc32c_tv),
.cpu_flag = CPU_FLAG_X64_SSE42,
.hash = hash_crc32c,
- }, {
+ },
+
+#if HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL
+ {
.name = "CRC32C-X64-NI",
.digest_size = 4,
.testvec = crc32c_tv,
.count = ARRAY_SIZE(crc32c_tv),
.cpu_flag = CPU_FLAG_X64_PCLMUL,
.hash = hash_crc32c
- }, {
+ },
+#endif /* HAVE___BUILTIN_CPU_SUPPORTS__PCLMUL */
+ {
.name = "XXHASH",
.digest_size = 8,
.testvec = xxhash64_tv,
@@ -502,7 +507,9 @@ static const struct hash_testspec test_spec[] = {
.cpu_flag = CPU_FLAG_NONE,
.hash = hash_sha256,
.backend = CRYPTOPROVIDER_OPENSSL + 1
- }, {
+ },
+#ifdef HAVE___BUILTIN_CPU_SUPPORTS__SHA
+ {
.name = "SHA256-X64-NI",
.digest_size = 32,
.testvec = sha256_tv,
@@ -510,7 +517,9 @@ static const struct hash_testspec test_spec[] = {
.cpu_flag = CPU_FLAG_X64_SHA,
.hash = hash_sha256,
.backend = CRYPTOPROVIDER_BUILTIN + 1
- }, {
+ },
+#endif /* HAVE___BUILTIN_CPU_SUPPORTS__SHA */
+ {
.name = "BLAKE2-ref",
.digest_size = 32,
.testvec = blake2b_256_tv,
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 5/7] btrfs-progs: crypto: select accelerated algo directly for testing
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
` (3 preceding siblings ...)
2026-11-09 4:09 ` [PATCH v2 4/7] btrfs-progs: simplify the cpu utils for future expanasion Qu Wenruo
@ 2026-11-09 4:09 ` Qu Wenruo
2026-11-09 4:10 ` [PATCH v2 6/7] btrfs-progs: crypto: hash-speedtest: cover more block sizes Qu Wenruo
2026-11-09 4:10 ` [PATCH v2 7/7] btrfs-progs: crypto: hash-vectest: " Qu Wenruo
6 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:09 UTC (permalink / raw)
To: linux-btrfs
Currently hash-speedtest and hash-vectest use cpu_set_level() to mask
out CPU flags, then call hash_init_accel() to pick the "best" algo under
that mask.
This relies on the CPU flag bit order being a strict capability ladder,
which is true for x86_64 but will not hold for other architectures like
arm64.
Since only hash-*test need to select a specific backend, introduce
hash_force_accel() to select the algo bound to the exact CPU flag
directly, falling back to the reference one if there is none.
All other users still use hash_init_accel() to get the fastest one.
With that, remove cpu_set_level(), cpu_reset_level() and
__cpu_flags_orig, as they have no user anymore.
Also do some cleanups:
- Only one crc32c_init_accel() for all architectures
Do the __x86_64__ check inside the function, instead of defining
duplicated functions.
- Use early return in sha256_*_accel()
So the reference implementation no longer needs an else branch across
the #endif.
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
common/cpu-utils.c | 15 ---------------
common/cpu-utils.h | 3 ---
crypto/blake2.h | 2 ++
crypto/blake2b-ref.c | 24 +++++++++++++++++++++++
crypto/crc32c.c | 42 +++++++++++++++++++++++------------------
crypto/crc32c.h | 2 ++
crypto/hash-speedtest.c | 7 ++-----
crypto/hash-vectest.c | 7 ++-----
crypto/hash.c | 9 +++++++++
crypto/hash.h | 2 ++
crypto/sha.h | 2 ++
crypto/sha224-256.c | 18 +++++++++++++++---
12 files changed, 84 insertions(+), 49 deletions(-)
diff --git a/common/cpu-utils.c b/common/cpu-utils.c
index e933b8322dc5..76959c0b729f 100644
--- a/common/cpu-utils.c
+++ b/common/cpu-utils.c
@@ -16,10 +16,8 @@
#include <stdio.h>
#include "common/cpu-utils.h"
-#include "common/messages.h"
unsigned long __cpu_flags = CPU_FLAG_NONE;
-unsigned long __cpu_flags_orig = CPU_FLAG_NONE;
#define FLAG_X64(name) if (__cpu_flags & CPU_FLAG_X64_ ## name) printf(" " #name)
void cpu_print_flags(void) {
@@ -64,17 +62,4 @@ void cpu_detect_flags(void)
__cpu_flags |= CPU_FLAG_X64_SHA;
#endif /* HAVE___BUILTIN_CPU_SUPPORTS__SHA */
#endif /* __x86_64__ */
-
- __cpu_flags_orig = __cpu_flags;
-}
-
-void cpu_set_level(unsigned long topbit)
-{
- UASSERT(topbit);
- __cpu_flags &= (topbit << 1) - 1;
-}
-
-void cpu_reset_level(void)
-{
- __cpu_flags = __cpu_flags_orig;
}
diff --git a/common/cpu-utils.h b/common/cpu-utils.h
index 97107f3f9086..2ca195567b84 100644
--- a/common/cpu-utils.h
+++ b/common/cpu-utils.h
@@ -44,12 +44,9 @@ enum cpu_feature {
/* Private but in public header to allow inlining */
extern unsigned long __cpu_flags;
-extern unsigned long __cpu_flags_orig;
/* Public API */
void cpu_detect_flags(void);
-void cpu_set_level(unsigned long topbit);
-void cpu_reset_level(void);
void cpu_print_flags(void);
static inline bool cpu_has_feature(enum cpu_feature f)
diff --git a/crypto/blake2.h b/crypto/blake2.h
index 052afe34a651..c4cc079ba04e 100644
--- a/crypto/blake2.h
+++ b/crypto/blake2.h
@@ -17,6 +17,7 @@
#include <stddef.h>
#include <stdint.h>
+#include "common/cpu-utils.h"
#if defined(_MSC_VER)
#define BLAKE2_PACKED(x) __pragma(pack(push, 1)) x __pragma(pack(pop))
@@ -91,6 +92,7 @@ extern "C" {
int blake2b( void *out, size_t outlen, const void *in, size_t inlen, const void *key, size_t keylen );
void blake2_init_accel(void);
+ void blake2_force_accel(enum cpu_feature f);
/* Export optimized versions to silent -Wmissing-prototypes warnings. */
void blake2b_compress_avx2( blake2b_state *S, const uint8_t block[BLAKE2B_BLOCKBYTES] );
diff --git a/crypto/blake2b-ref.c b/crypto/blake2b-ref.c
index 56774ccb04f9..e8d2adb0498e 100644
--- a/crypto/blake2b-ref.c
+++ b/crypto/blake2b-ref.c
@@ -239,6 +239,30 @@ void blake2_init_accel(void)
blake2b_compress = blake2b_compress_ref;
}
+void blake2_force_accel(enum cpu_feature f)
+{
+ switch (f) {
+#if HAVE_CFLAG_mavx2 == 1
+ case CPU_FLAG_X64_AVX2:
+ blake2b_compress = blake2b_compress_avx2;
+ break;
+#endif
+#if HAVE_CFLAG_msse41 == 1
+ case CPU_FLAG_X64_SSE41:
+ blake2b_compress = blake2b_compress_sse41;
+ break;
+#endif
+#if HAVE_CFLAG_msse2 == 1
+ case CPU_FLAG_X64_SSE2:
+ blake2b_compress = blake2b_compress_sse2;
+ break;
+#endif
+ default:
+ blake2b_compress = blake2b_compress_ref;
+ break;
+ }
+}
+
int blake2b_update( blake2b_state *S, const void *pin, size_t inlen )
{
const unsigned char * in = (const unsigned char *)pin;
diff --git a/crypto/crc32c.c b/crypto/crc32c.c
index 0da4a1573c30..b7a7ce74b526 100644
--- a/crypto/crc32c.c
+++ b/crypto/crc32c.c
@@ -332,30 +332,36 @@ static uint32_t crc32c_sse42(uint32_t crc, unsigned char const *data, uint32_t l
return crc;
}
-void crc32c_init_accel(void)
-{
- if (0) {
- } else if (cpu_has_feature(CPU_FLAG_X64_PCLMUL) &&
- cpu_has_feature(CPU_FLAG_X64_SSE42)) {
- /* printf("CRC32C: pcl\n"); */
- crc32c_impl = crc32c_pcl;
- } else if (cpu_has_feature(CPU_FLAG_X64_SSE42)) {
- /* printf("CRC32c: intel\n"); */
- crc32c_impl = crc32c_sse42;
- } else {
- /* printf("CRC32c: fallback\n"); */
- crc32c_impl = crc32c_ref;
- }
-}
-
-#else
+#endif /* __x86_64__ */
void crc32c_init_accel(void)
{
crc32c_impl = crc32c_ref;
+#ifdef __x86_64__
+ if (cpu_has_feature(CPU_FLAG_X64_PCLMUL) &&
+ cpu_has_feature(CPU_FLAG_X64_SSE42))
+ crc32c_impl = crc32c_pcl;
+ else if (cpu_has_feature(CPU_FLAG_X64_SSE42))
+ crc32c_impl = crc32c_sse42;
+#endif
}
-#endif /* __x86_64__ */
+void crc32c_force_accel(enum cpu_feature f)
+{
+ switch (f) {
+#ifdef __x86_64__
+ case CPU_FLAG_X64_PCLMUL:
+ crc32c_impl = crc32c_pcl;
+ break;
+ case CPU_FLAG_X64_SSE42:
+ crc32c_impl = crc32c_sse42;
+ break;
+#endif
+ default:
+ crc32c_impl = crc32c_ref;
+ break;
+ }
+}
/*
* This is the CRC-32C table
diff --git a/crypto/crc32c.h b/crypto/crc32c.h
index f990177147e5..dd427893cf99 100644
--- a/crypto/crc32c.h
+++ b/crypto/crc32c.h
@@ -20,9 +20,11 @@
#define __CRC32C__
#include <inttypes.h>
+#include "common/cpu-utils.h"
uint32_t crc32c_le(uint32_t seed, unsigned char const *data, uint32_t length);
void crc32c_init_accel(void);
+void crc32c_force_accel(enum cpu_feature f);
#define crc32c(seed, data, length) crc32c_le(seed, (unsigned char const *)data, length)
diff --git a/crypto/hash-speedtest.c b/crypto/hash-speedtest.c
index b51ccbb19284..a26959ae66e8 100644
--- a/crypto/hash-speedtest.c
+++ b/crypto/hash-speedtest.c
@@ -312,10 +312,8 @@ int main(int argc, char **argv) {
printf("%16s: ", c->name);
fflush(stdout);
- if (c->cpu_flag) {
- cpu_set_level(c->cpu_flag);
- hash_init_accel();
- }
+ if (c->cpu_flag)
+ hash_force_accel(c->cpu_flag);
tstart = get_time();
start = get_cycles(units);
for (iter = 0; iter < iterations; iter++) {
@@ -327,7 +325,6 @@ int main(int argc, char **argv) {
tend = get_time();
c->cycles = end - start;
c->time = tend - tstart;
- cpu_reset_level();
if (units == UNITS_CYCLES || units == UNITS_PERF)
total = c->cycles;
diff --git a/crypto/hash-vectest.c b/crypto/hash-vectest.c
index 3b1b79eae138..c190a7a01b95 100644
--- a/crypto/hash-vectest.c
+++ b/crypto/hash-vectest.c
@@ -617,12 +617,9 @@ static int test_hash(const struct hash_testspec *spec)
header = true;
}
- if (spec->cpu_flag) {
- cpu_set_level(spec->cpu_flag);
- hash_init_accel();
- }
+ if (spec->cpu_flag)
+ hash_force_accel(spec->cpu_flag);
ret = spec->hash((const u8 *)vec->plaintext, vec->psize, csum);
- cpu_reset_level();
if (ret < 0) {
error("hash %s = %d", spec->name, ret);
return 1;
diff --git a/crypto/hash.c b/crypto/hash.c
index 4af7b04a2507..675051873ef9 100644
--- a/crypto/hash.c
+++ b/crypto/hash.c
@@ -49,6 +49,15 @@ int hash_xxhash(const u8 *buf, size_t length, u8 *out)
return 0;
}
+void hash_force_accel(enum cpu_feature f)
+{
+ crc32c_force_accel(f);
+#if CRYPTOPROVIDER_BUILTIN == 1
+ blake2_force_accel(f);
+ sha256_force_accel(f);
+#endif
+}
+
/*
* Implementations of cryptographic primitives
*/
diff --git a/crypto/hash.h b/crypto/hash.h
index 4f8f668ad260..11d977922039 100644
--- a/crypto/hash.h
+++ b/crypto/hash.h
@@ -18,6 +18,7 @@
#define CRYPTO_HASH_H
#include "kerncompat.h"
+#include "common/cpu-utils.h"
#include <stddef.h>
#define CRYPTO_HASH_SIZE_MAX 32
@@ -28,6 +29,7 @@ int hash_sha256(const u8 *buf, size_t length, u8 *out);
int hash_blake2b(const u8 *buf, size_t length, u8 *out);
void hash_init_accel(void);
+void hash_force_accel(enum cpu_feature f);
void hash_init_crc32c(void);
#endif
diff --git a/crypto/sha.h b/crypto/sha.h
index ea387c212dc6..0292b292f357 100644
--- a/crypto/sha.h
+++ b/crypto/sha.h
@@ -71,6 +71,7 @@
*/
#include <stdint.h>
+#include "common/cpu-utils.h"
/*
* If you do not have the ISO standard stdint.h header file, then you
* must typedef the following:
@@ -210,6 +211,7 @@ extern int hmacResult(HMACContext *context,
uint8_t digest[USHAMaxHashSize]);
void sha256_init_accel(void);
+void sha256_force_accel(enum cpu_feature f);
/* Export for optimized version to silent -Wmissing-prototypes. */
void sha256_process_x86(uint32_t state[8], const uint8_t data[], uint32_t length);
diff --git a/crypto/sha224-256.c b/crypto/sha224-256.c
index 69e7ce5b9bd2..1df03825fa8f 100644
--- a/crypto/sha224-256.c
+++ b/crypto/sha224-256.c
@@ -110,11 +110,23 @@ static void sha256_process_x86_dispatch(SHA256Context *context)
void sha256_init_accel(void)
{
#if HAVE_CFLAG_msha == 1
- if (cpu_has_feature(CPU_FLAG_X64_SHA))
+ if (cpu_has_feature(CPU_FLAG_X64_SHA)) {
sha256_process_message_block = sha256_process_x86_dispatch;
- else
+ return;
+ }
#endif
- sha256_process_message_block = SHA224_256ProcessMessageBlock;
+ sha256_process_message_block = SHA224_256ProcessMessageBlock;
+}
+
+void sha256_force_accel(enum cpu_feature f)
+{
+#if HAVE_CFLAG_msha == 1
+ if (f == CPU_FLAG_X64_SHA) {
+ sha256_process_message_block = sha256_process_x86_dispatch;
+ return;
+ }
+#endif
+ sha256_process_message_block = SHA224_256ProcessMessageBlock;
}
/*
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 6/7] btrfs-progs: crypto: hash-speedtest: cover more block sizes
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
` (4 preceding siblings ...)
2026-11-09 4:09 ` [PATCH v2 5/7] btrfs-progs: crypto: select accelerated algo directly for testing Qu Wenruo
@ 2026-11-09 4:10 ` Qu Wenruo
2026-11-09 4:10 ` [PATCH v2 7/7] btrfs-progs: crypto: hash-vectest: " Qu Wenruo
6 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:10 UTC (permalink / raw)
To: linux-btrfs
Currently hash-speedtest only benchmarks 4K blocks, but btrfs hashes
buffers of very different sizes:
- btrfs_name_hash() on file names, up to 255 bytes
- data checksum on 4K sectors
- metadata checksum on tree blocks, 16K by default
Run every contestant against 16, 255 (BTRFS_NAME_LEN), 4K and 16K,
printing a separate section for each block size.
For the 16K case, the real metadata checksum length is 16K - 32 as the
csum header is skipped, but the difference to a full 16K is minimal, so
just use 16K.
Also fix the MiB/s calculation, which can overflow int for large sizes.
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
crypto/hash-speedtest.c | 132 ++++++++++++++++++++++------------------
1 file changed, 74 insertions(+), 58 deletions(-)
diff --git a/crypto/hash-speedtest.c b/crypto/hash-speedtest.c
index a26959ae66e8..9a7d81d582fb 100644
--- a/crypto/hash-speedtest.c
+++ b/crypto/hash-speedtest.c
@@ -27,7 +27,9 @@
#endif
#include "crypto/hash.h"
#include "common/messages.h"
+#include "kernel-lib/sizes.h"
#include "common/cpu-utils.h"
+#include "kernel-shared/uapi/btrfs_tree.h"
#ifdef __x86_64__
#include <x86intrin.h>
@@ -42,7 +44,15 @@ enum {
UNITS_PERF,
};
-const int blocksize = 4096;
+/*
+ * Default sizes:
+ * - 16, 255 btrfs_name_hash() on short and max name length
+ * - 4096 data checksum with 4K sectorsize
+ * - 16384 metadata checksum with 16K nodesize, the difference from the
+ * real size (16K - 32, no csum header) is minimal
+ */
+static const size_t sizes[] = { SZ_16, BTRFS_NAME_LEN, SZ_4K, SZ_16K };
+
int iterations = 100000;
#ifdef __x86_64__
@@ -162,10 +172,8 @@ static const char *units_to_str(int units)
}
int main(int argc, char **argv) {
- u8 buf[blocksize];
+ u8 *buf;
u8 hash[32];
- int idx;
- int iter;
char *filter = NULL;
struct contestant {
char name[20];
@@ -282,69 +290,77 @@ int main(int argc, char **argv) {
iterations = 1;
}
- memset(buf, 0, 4096);
+ buf = malloc(SZ_16K);
+ if (!buf) {
+ error_mem("buffer");
+ return 1;
+ }
- printf("Block size: %d\n", blocksize);
printf("Iterations: %d\n", iterations);
printf("Implementation: %s\n", CRYPTOPROVIDER);
printf("Units: %s\n", units_to_desc(units));
- printf("\n");
- for (idx = 0; idx < ARRAY_SIZE(contestants); idx++) {
- struct contestant *c = &contestants[idx];
- u64 start, end;
- u64 tstart, tend;
- u64 total = 0;
+ for (int i = 0; i < ARRAY_SIZE(sizes); i++) {
+ size_t size = sizes[i];
- if (c->cpu_flag != 0 && !cpu_has_feature(c->cpu_flag)) {
- printf("%16s: no CPU support\n", c->name);
- continue;
+ printf("\nBlock size: %zu\n", size);
+ for (int idx = 0; idx < ARRAY_SIZE(contestants); idx++) {
+ struct contestant *c = &contestants[idx];
+ u64 start, end;
+ u64 tstart, tend;
+ u64 total = 0;
+
+ if (c->cpu_flag != 0 && !cpu_has_feature(c->cpu_flag)) {
+ printf("%16s: no CPU support\n", c->name);
+ continue;
+ }
+ /* Backend not compiled in */
+ if (c->backend == 1)
+ continue;
+
+ if (c->digest == hash_null_memcpy)
+ /* Always run NULL-MEMCPY to warm up memory. */;
+ else if (filter && fnmatch(filter, c->name, FNM_CASEFOLD) != 0)
+ continue;
+
+ printf("%16s: ", c->name);
+ fflush(stdout);
+
+ if (c->cpu_flag)
+ hash_force_accel(c->cpu_flag);
+ tstart = get_time();
+ start = get_cycles(units);
+ for (int iter = 0; iter < iterations; iter++) {
+ memset(buf, iter & 0xFF, size);
+ memset(hash, 0, 32);
+ c->digest(buf, size, hash);
+ }
+ end = get_cycles(units);
+ tend = get_time();
+ c->cycles = end - start;
+ c->time = tend - tstart;
+
+ if (units == UNITS_CYCLES || units == UNITS_PERF)
+ total = c->cycles;
+ if (units == UNITS_TIME)
+ total = c->time;
+
+ printf("%s: %12llu, %s/i %8llu",
+ units_to_str(units), total,
+ units_to_str(units), total / iterations);
+ if (idx > 0) {
+ float t;
+ float mb;
+
+ t = (float)c->time / 1000 / 1000 / 1000;
+ mb = (float)size * iterations / 1024 / 1024;
+ printf(", %12.3f MiB/s", mb / t);
+ }
+ putchar('\n');
}
- /* Backend not compiled in */
- if (c->backend == 1)
- continue;
-
- if (c->digest == hash_null_memcpy)
- /* Always run NULL-MEMCPY to warm up memory. */;
- else if (filter && fnmatch(filter, c->name, FNM_CASEFOLD) != 0)
- continue;
-
- printf("%16s: ", c->name);
- fflush(stdout);
-
- if (c->cpu_flag)
- hash_force_accel(c->cpu_flag);
- tstart = get_time();
- start = get_cycles(units);
- for (iter = 0; iter < iterations; iter++) {
- memset(buf, iter & 0xFF, blocksize);
- memset(hash, 0, 32);
- c->digest(buf, blocksize, hash);
- }
- end = get_cycles(units);
- tend = get_time();
- c->cycles = end - start;
- c->time = tend - tstart;
-
- if (units == UNITS_CYCLES || units == UNITS_PERF)
- total = c->cycles;
- if (units == UNITS_TIME)
- total = c->time;
-
- printf("%s: %12llu, %s/i %8llu",
- units_to_str(units), total,
- units_to_str(units), total / iterations);
- if (idx > 0) {
- float t;
- float mb;
-
- t = (float)c->time / 1000 / 1000 / 1000;
- mb = blocksize * iterations / 1024 / 1024;
- printf(", %12.3f MiB/s", mb / t);
- }
- putchar('\n');
}
perf_finish();
+ free(buf);
free(filter);
return 0;
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH v2 7/7] btrfs-progs: crypto: hash-vectest: cover more block sizes
2026-11-09 4:09 [PATCH v2 0/7] btrfs-progs: crypto: cleanup and prepare for new architectures Qu Wenruo
` (5 preceding siblings ...)
2026-11-09 4:10 ` [PATCH v2 6/7] btrfs-progs: crypto: hash-speedtest: cover more block sizes Qu Wenruo
@ 2026-11-09 4:10 ` Qu Wenruo
6 siblings, 0 replies; 10+ messages in thread
From: Qu Wenruo @ 2026-11-09 4:10 UTC (permalink / raw)
To: linux-btrfs
Currently hash-vectest only has small test vectors (up to 1023 bytes),
which does not exercise the code paths used for real btrfs workloads,
especially the accelerated ones which have different handling for
different lengths.
Add test vectors for the following sizes for all algorithms:
- BTRFS_NAME_LEN (255), the max file name length for btrfs_name_hash()
- SZ_4K, data checksum on 4K sectors
- SZ_16K - BTRFS_CSUM_SIZE, metadata checksum on 16K tree blocks
- SZ_16K
For those large vectors, the plaintext is generated at runtime by an
common LCG from "Numerical Recipes in C", instead of embedding tens of
KiB of data.
The expected digests are calculated by independent tools using python.
Also add the CRC32C test patterns from RFC 3720 (iSCSI).
Finally add a gitignore entry for hash-vectest.
Assisted-by: LLM (the idea of using LCG, coding)
Signed-off-by: Qu Wenruo <wqu@suse.com>
---
.gitignore | 1 +
crypto/hash-vectest.c | 166 +++++++++++++++++++++++++++++++++++++++++-
2 files changed, 163 insertions(+), 4 deletions(-)
diff --git a/.gitignore b/.gitignore
index 78333d679a7d..b93a9f872c65 100644
--- a/.gitignore
+++ b/.gitignore
@@ -49,6 +49,7 @@
/quick-test
/json-formatter-test
/hash-speedtest
+/hash-vectest
/aclocal.m4
/autom4te.cache
diff --git a/crypto/hash-vectest.c b/crypto/hash-vectest.c
index c190a7a01b95..6032daa030f9 100644
--- a/crypto/hash-vectest.c
+++ b/crypto/hash-vectest.c
@@ -15,10 +15,16 @@
*/
#include "kerncompat.h"
+#include "kernel-lib/sizes.h"
+#include "kernel-shared/uapi/btrfs_tree.h"
#include "crypto/hash.h"
#include "common/messages.h"
#include "common/cpu-utils.h"
+/*
+ * For test vectors with no plaintext but a non-zero psize, the plaintext is
+ * generated by fill_pattern().
+ */
struct hash_testvec {
const char *plaintext;
size_t psize;
@@ -45,6 +51,55 @@ static const struct hash_testvec crc32c_tv[] = {
.psize = 7,
.digest = "\x41\xf4\x27\xe6",
},
+ /* CRC32C test patterns from RFC 3720 (iSCSI), section B.4 */
+ {
+ .plaintext = "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00"
+ "\x00\x00\x00\x00\x00\x00\x00\x00",
+ .psize = 32,
+ .digest = "\xaa\x36\x91\x8a",
+ },
+ {
+ .plaintext = "\xff\xff\xff\xff\xff\xff\xff\xff"
+ "\xff\xff\xff\xff\xff\xff\xff\xff"
+ "\xff\xff\xff\xff\xff\xff\xff\xff"
+ "\xff\xff\xff\xff\xff\xff\xff\xff",
+ .psize = 32,
+ .digest = "\x43\xab\xa8\x62",
+ },
+ {
+ .plaintext = "\x00\x01\x02\x03\x04\x05\x06\x07"
+ "\x08\x09\x0a\x0b\x0c\x0d\x0e\x0f"
+ "\x10\x11\x12\x13\x14\x15\x16\x17"
+ "\x18\x19\x1a\x1b\x1c\x1d\x1e\x1f",
+ .psize = 32,
+ .digest = "\x4e\x79\xdd\x46",
+ },
+ {
+ .plaintext = "\x1f\x1e\x1d\x1c\x1b\x1a\x19\x18"
+ "\x17\x16\x15\x14\x13\x12\x11\x10"
+ "\x0f\x0e\x0d\x0c\x0b\x0a\x09\x08"
+ "\x07\x06\x05\x04\x03\x02\x01\x00",
+ .psize = 32,
+ .digest = "\x5c\xdb\x3f\x11",
+ },
+ {
+ .psize = BTRFS_NAME_LEN,
+ .digest = "\xbb\xd7\xaa\xea",
+ },
+ {
+ .psize = SZ_4K,
+ .digest = "\xb6\xaa\xa5\x04",
+ },
+ {
+ .psize = SZ_16K - BTRFS_CSUM_SIZE,
+ .digest = "\x1d\xb1\xa7\x39",
+ },
+ {
+ .psize = SZ_16K,
+ .digest = "\xd7\xd1\x5b\x37",
+ },
};
static const struct hash_testvec xxhash64_tv[] = {
@@ -94,7 +149,23 @@ static const struct hash_testvec xxhash64_tv[] = {
"\xed\xfd\x08\xf7\xe8\x04",
.psize = 222,
.digest = "\x41\xfc\xd4\x29\xfe\xe7\x85\x17",
- }
+ },
+ {
+ .psize = BTRFS_NAME_LEN,
+ .digest = "\x83\x5a\xfd\x3d\xdb\xda\x73\xfe",
+ },
+ {
+ .psize = SZ_4K,
+ .digest = "\x8a\x21\x49\xcf\x03\x49\x7c\x70",
+ },
+ {
+ .psize = SZ_16K - BTRFS_CSUM_SIZE,
+ .digest = "\xda\x59\x52\x99\x9f\x4e\x0b\x4e",
+ },
+ {
+ .psize = SZ_16K,
+ .digest = "\xf8\xec\x5d\xe3\x99\x47\xaa\x5d",
+ },
};
static const struct hash_testvec sha256_tv[] = {
@@ -260,7 +331,35 @@ static const struct hash_testvec sha256_tv[] = {
"\x32\x32\x17\xcc\xd4\x6a\x71\xa9"
"\xf3\xed\x50\x10\x64\x8e\x06\xbe"
"\x9b\x4a\xa6\xbb\x05\x89\x59\x51",
- }
+ },
+ {
+ .psize = BTRFS_NAME_LEN,
+ .digest = "\xde\x26\x80\x6a\x0d\x54\x41\x6d"
+ "\xc6\x11\x04\x97\x16\xc5\xd1\x46"
+ "\x7f\x90\x15\xb1\xe8\x99\x10\x4e"
+ "\x16\xd5\x62\x46\xb8\x55\x01\x6c",
+ },
+ {
+ .psize = SZ_4K,
+ .digest = "\x28\xc7\x4f\x56\xd2\xc9\x59\x95"
+ "\x5f\x64\xec\x0e\x74\x0b\xe7\xd0"
+ "\x8a\x02\x3a\x0a\xbf\x03\x2c\x25"
+ "\x7e\x8e\xf7\x58\x6a\x6b\xb7\x75",
+ },
+ {
+ .psize = SZ_16K - BTRFS_CSUM_SIZE,
+ .digest = "\x9e\x81\xe5\x25\xe3\x9f\xe6\x1b"
+ "\x69\x74\xb0\x83\xb8\x30\x3d\x4e"
+ "\xc7\x38\xf0\xb4\x66\x73\x61\x25"
+ "\xa8\x2e\x4c\x6b\x58\xb9\x55\xa3",
+ },
+ {
+ .psize = SZ_16K,
+ .digest = "\xfb\xbb\xb4\x2b\xbd\xf4\xee\xb7"
+ "\x85\xdd\x39\x84\xd8\x88\xa5\xa2"
+ "\xa4\x38\xd4\xff\xb3\x45\xed\x5e"
+ "\xa1\x2f\x06\x1d\x86\xa5\x4b\x77",
+ },
};
static const struct hash_testvec blake2b_256_tv[] = {
@@ -423,7 +522,35 @@ static const struct hash_testvec blake2b_256_tv[] = {
"\xbf\xe6\x82\x94\x3f\x59\x91\xee"
"\x18\xa6\x27\xc3\x00\x12\xa5\xd0"
"\x92\x3a\xb1\xc6\xa3\x46\x5a\xea",
- }
+ },
+ {
+ .psize = BTRFS_NAME_LEN,
+ .digest = "\x1e\x1f\xab\x3d\xb0\x47\x44\x16"
+ "\x0a\xa7\x57\xd7\xc3\x5b\x61\xe0"
+ "\x8b\xe5\xba\x1e\x4b\x6a\x31\xec"
+ "\xc3\xcd\x5e\x33\x98\x21\x0a\xac",
+ },
+ {
+ .psize = SZ_4K,
+ .digest = "\x8b\x28\x0b\xea\xd0\x4d\x22\x0f"
+ "\x6f\x20\xc8\xdb\x23\x91\xdc\x2e"
+ "\x97\x90\xee\x86\x73\x12\xbc\x56"
+ "\xe7\x17\x08\x34\xd9\x00\xf8\xc8",
+ },
+ {
+ .psize = SZ_16K - BTRFS_CSUM_SIZE,
+ .digest = "\x71\x89\xeb\x26\x42\x2e\xb5\x1d"
+ "\x30\xb5\x76\xe5\x76\x8a\xf7\x53"
+ "\x3a\x39\xb9\x1d\xad\x13\xcf\x92"
+ "\x17\xe3\x70\x32\x34\xd2\xd4\x23",
+ },
+ {
+ .psize = SZ_16K,
+ .digest = "\x28\x4d\xcc\xe6\x6b\x9e\x55\xb1"
+ "\x27\x0a\xa6\x7a\x6e\x5f\x8f\xca"
+ "\xcf\x45\xff\x6e\xd4\xbc\x0d\x6d"
+ "\x33\x24\x22\x7a\xab\x3e\xe4\x90",
+ },
};
static const struct hash_testspec test_spec[] = {
@@ -594,6 +721,24 @@ static const struct hash_testspec test_spec[] = {
}
};
+/*
+ * Fill the buffer with bytes from a 32-bit LCG, x = x * 1664525 + 1013904223,
+ * as used in "Numerical Recipes in C". The seed is arbitrary.
+ *
+ * Only the top byte is used, since the low bits of a power-of-2 modulus LCG
+ * have very short periods.
+ */
+static void fill_pattern(u8 *buf, size_t size)
+{
+ u32 x = 1;
+ size_t i;
+
+ for (i = 0; i < size; i++) {
+ x = x * 1664525 + 1013904223;
+ buf[i] = x >> 24;
+ }
+}
+
static int test_hash(const struct hash_testspec *spec)
{
int i;
@@ -603,6 +748,8 @@ static int test_hash(const struct hash_testspec *spec)
int ret;
const struct hash_testvec *vec = &spec->testvec[i];
u8 csum[CRYPTO_HASH_SIZE_MAX];
+ const u8 *data = (const u8 *)vec->plaintext;
+ u8 *buf = NULL;
if (spec->cpu_flag != 0 && !cpu_has_feature(spec->cpu_flag)) {
printf("%s skipped, no CPU support\n", spec->name);
@@ -617,9 +764,20 @@ static int test_hash(const struct hash_testspec *spec)
header = true;
}
+ if (!data && vec->psize) {
+ buf = malloc(vec->psize);
+ if (!buf) {
+ error_mem("test vector");
+ return 1;
+ }
+ fill_pattern(buf, vec->psize);
+ data = buf;
+ }
+
if (spec->cpu_flag)
hash_force_accel(spec->cpu_flag);
- ret = spec->hash((const u8 *)vec->plaintext, vec->psize, csum);
+ ret = spec->hash(data, vec->psize, csum);
+ free(buf);
if (ret < 0) {
error("hash %s = %d", spec->name, ret);
return 1;
--
2.56.0
^ permalink raw reply related [flat|nested] 10+ messages in thread