[PATCH 0/5] can: flexcan: Add NXP S32N79 SoC support

[PATCH 0/5] can: flexcan: Add NXP S32N79 SoC support

[Ciprian Costea]

From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

This patch series adds FlexCAN support for the NXP S32N79 SoC.

The S32N79 is an automotive-grade processor from NXP with multiple
FlexCAN instances. The FlexCAN IP integration on S32N79 differs from
other SoCs in the interrupt routing - it uses two separate interrupt
lines:
  - one interrupt for mailboxes 0-127
  - one interrupt for bus error detection and state changes

The CAN controllers are connected through an irqsteer interrupt
controller in the RCU (Resource Control Unit) domain.

This series:
  1. Adds dt-bindings documentation for S32N79 FlexCAN
  2. Introduces FLEXCAN_QUIRK_NR_IRQ_2 to handle the two-interrupt
     configuration
  3. Adds S32N79 device data and compatible string to the driver
  4. Adds FlexCAN device tree nodes for S32N79 SoC
  5. Enables FlexCAN devices on the S32N79-RDB board

Tested on S32N79-RDB board with CAN and CAN FD communication.

Ciprian Marian Costea (5):
  dt-bindings: can: fsl,flexcan: add NXP S32N79 SoC support
  can: flexcan: add FLEXCAN_QUIRK_NR_IRQ_2 quirk for two interrupt lines
  can: flexcan: add NXP S32N79 SoC support
  arm64: dts: s32n79: add FlexCAN nodes
  arm64: dts: s32n79: enable FlexCAN devices

 .../bindings/net/can/fsl,flexcan.yaml         | 30 ++++++++++-
 arch/arm64/boot/dts/freescale/s32n79-rdb.dts  | 12 +++++
 arch/arm64/boot/dts/freescale/s32n79.dtsi     | 50 +++++++++++++++++++
 drivers/net/can/flexcan/flexcan-core.c        | 31 ++++++++++--
 drivers/net/can/flexcan/flexcan.h             | 16 +++---
 5 files changed, 128 insertions(+), 11 deletions(-)

-- 
2.43.0

[PATCH 1/5] dt-bindings: can: fsl,flexcan: add NXP S32N79 SoC support

[Ciprian Costea]

From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

Add NXP S32N79 SoC compatible string and interrupt properties.

On S32N79, FlexCAN IP is integrated with two interrupt lines:
one for the mailbox interrupts (0-127) and one for signaling
errors and bus state changes.

Co-developed-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
 .../bindings/net/can/fsl,flexcan.yaml         | 30 ++++++++++++++++++-
 1 file changed, 29 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
index f81d56f7c12a..131fae2739fa 100644
--- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
+++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
@@ -26,6 +26,7 @@ properties:
           - fsl,ls1021ar2-flexcan
           - fsl,lx2160ar1-flexcan
           - nxp,s32g2-flexcan
+          - nxp,s32n79-flexcan
       - items:
           - enum:
               - fsl,imx53-flexcan
@@ -173,11 +174,38 @@ allOf:
             - const: mb-1
       required:
         - interrupt-names
-    else:
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: nxp,s32n79-flexcan
+    then:
+      properties:
+        interrupts:
+          items:
+            - description: Message Buffer interrupt for mailboxes 0-127
+            - description: Bus Error interrupt
+        interrupt-names:
+          items:
+            - const: mb-0
+            - const: berr
+      required:
+        - interrupt-names
+
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - nxp,s32g2-flexcan
+                - nxp,s32n79-flexcan
+    then:
       properties:
         interrupts:
           maxItems: 1
         interrupt-names: false
+
   - if:
       required:
         - xceiver-supply
-- 
2.43.0

Re: [PATCH 1/5] dt-bindings: can: fsl,flexcan: add NXP S32N79 SoC support

[Marc Kleine-Budde]

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On 18.03.2026 10:22:11, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Add NXP S32N79 SoC compatible string and interrupt properties.
>
> On S32N79, FlexCAN IP is integrated with two interrupt lines:
> one for the mailbox interrupts (0-127) and one for signaling
> errors and bus state changes.

Comment from patch#2 applies here, too:

Usually it's "bus error" and "state changes", as the errors happen
visible for everyone on the bus, while the state change is local to the
controller (every controller has it's own state).

> Co-developed-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
> Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
> Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
>  .../bindings/net/can/fsl,flexcan.yaml         | 30 ++++++++++++++++++-
>  1 file changed, 29 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
> index f81d56f7c12a..131fae2739fa 100644
> --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
> +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
> @@ -26,6 +26,7 @@ properties:
>            - fsl,ls1021ar2-flexcan
>            - fsl,lx2160ar1-flexcan
>            - nxp,s32g2-flexcan
> +          - nxp,s32n79-flexcan
>        - items:
>            - enum:
>                - fsl,imx53-flexcan
> @@ -173,11 +174,38 @@ allOf:
>              - const: mb-1
>        required:
>          - interrupt-names
> -    else:
> +  - if:
> +      properties:
> +        compatible:
> +          contains:
> +            const: nxp,s32n79-flexcan
> +    then:
> +      properties:
> +        interrupts:
> +          items:
> +            - description: Message Buffer interrupt for mailboxes 0-127
> +            - description: Bus Error interrupt

It's a combined Device state change and Bus Error detection interrupt?

> +        interrupt-names:
> +          items:
> +            - const: mb-0
> +            - const: berr
> +      required:
> +        - interrupt-names
> +
> +  - if:
> +      not:
> +        properties:
> +          compatible:
> +            contains:
> +              enum:
> +                - nxp,s32g2-flexcan
> +                - nxp,s32n79-flexcan

Is there else if or something like that in YAML?

> +    then:
>        properties:
>          interrupts:
>            maxItems: 1
>          interrupt-names: false
> +
>    - if:
>        required:
>          - xceiver-supply
> --
> 2.43.0
>
>
>

regards,
Marc

--
Pengutronix e.K.                 | Marc Kleine-Budde          |
Embedded Linux                   | https://www.pengutronix.de |
Vertretung Nürnberg              | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-9   |

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Re: [PATCH 1/5] dt-bindings: can: fsl,flexcan: add NXP S32N79 SoC support

[Ciprian Marian Costea]

On 3/18/2026 12:47 PM, Marc Kleine-Budde wrote:
> On 18.03.2026 10:22:11, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>
>> Add NXP S32N79 SoC compatible string and interrupt properties.
>>
>> On S32N79, FlexCAN IP is integrated with two interrupt lines:
>> one for the mailbox interrupts (0-127) and one for signaling
>> errors and bus state changes.
> 

Hello Marc,

Thank you for your review.

Correct, I will update the commit message in V2 to clearly state the two 
different CAN concepts (bus error vs device state changes -- not bus 
state changes).

> Comment from patch#2 applies here, too:
> 
> Usually it's "bus error" and "state changes", as the errors happen
> visible for everyone on the bus, while the state change is local to the
> controller (every controller has it's own state).
> 
>> Co-developed-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
>> Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
>> Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
>> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>> ---
>>   .../bindings/net/can/fsl,flexcan.yaml         | 30 ++++++++++++++++++-
>>   1 file changed, 29 insertions(+), 1 deletion(-)
>>
>> diff --git a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
>> index f81d56f7c12a..131fae2739fa 100644
>> --- a/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
>> +++ b/Documentation/devicetree/bindings/net/can/fsl,flexcan.yaml
>> @@ -26,6 +26,7 @@ properties:
>>             - fsl,ls1021ar2-flexcan
>>             - fsl,lx2160ar1-flexcan
>>             - nxp,s32g2-flexcan
>> +          - nxp,s32n79-flexcan
>>         - items:
>>             - enum:
>>                 - fsl,imx53-flexcan
>> @@ -173,11 +174,38 @@ allOf:
>>               - const: mb-1
>>         required:
>>           - interrupt-names
>> -    else:
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: nxp,s32n79-flexcan
>> +    then:
>> +      properties:
>> +        interrupts:
>> +          items:
>> +            - description: Message Buffer interrupt for mailboxes 0-127
>> +            - description: Bus Error interrupt
> 
> It's a combined Device state change and Bus Error detection interrupt?
> 

I will update the description in V2 to: 'Bus Error detection and Device
state change interrupt'.

>> +        interrupt-names:
>> +          items:
>> +            - const: mb-0
>> +            - const: berr
>> +      required:
>> +        - interrupt-names
>> +
>> +  - if:
>> +      not:
>> +        properties:
>> +          compatible:
>> +            contains:
>> +              enum:
>> +                - nxp,s32g2-flexcan
>> +                - nxp,s32n79-flexcan
> 
> Is there else if or something like that in YAML?
> 

AFAIK, dt-schema YAML doesn't have else if.
The negated if (not/contains/enum) seems to be the standard approach 
used elsewhere in the dt-bindings tree, e.g., in [1], [2], [3].

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/thermal/rcar-thermal.yaml#n70 

[2] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/phy/realtek,usb2phy.yaml#n151
[3] 
https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/Documentation/devicetree/bindings/thermal/rockchip-thermal.yaml#n148

Best Regards,
Ciprian

>> +    then:
>>         properties:
>>           interrupts:
>>             maxItems: 1
>>           interrupt-names: false
>> +
>>     - if:
>>         required:
>>           - xceiver-supply
>> --
>> 2.43.0
>>
>>
>>
> 
> regards,
> Marc
> 
> --
> Pengutronix e.K.                 | Marc Kleine-Budde          |
> Embedded Linux                   | https://www.pengutronix.de |
> Vertretung Nürnberg              | Phone: +49-5121-206917-129 |
> Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-9   |

[PATCH 2/5] can: flexcan: add FLEXCAN_QUIRK_NR_IRQ_2 quirk for two interrupt lines

[Ciprian Costea]

From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

Introduce FLEXCAN_QUIRK_NR_IRQ_2 quirk to handle hardware integration
where the FlexCAN module has two separate interrupt lines:
- one for signaling error and bus state changes
- one for mailboxes 0-127

This is required for NXP S32N79 SoC support.

Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
 drivers/net/can/flexcan/flexcan-core.c | 21 ++++++++++++++++++---
 drivers/net/can/flexcan/flexcan.h      | 16 +++++++++-------
 2 files changed, 27 insertions(+), 10 deletions(-)

diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
index f5d22c61503f..a6b15496853c 100644
--- a/drivers/net/can/flexcan/flexcan-core.c
+++ b/drivers/net/can/flexcan/flexcan-core.c
@@ -1770,7 +1770,10 @@ static int flexcan_open(struct net_device *dev)
 				  flexcan_irq, IRQF_SHARED, dev->name, dev);
 		if (err)
 			goto out_free_irq;
+	}
 
+	if (priv->devtype_data.quirks &
+			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3)) {
 		err = request_irq(priv->irq_err,
 				  flexcan_irq, IRQF_SHARED, dev->name, dev);
 		if (err)
@@ -1791,7 +1794,8 @@ static int flexcan_open(struct net_device *dev)
 	return 0;
 
  out_free_irq_err:
-	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
+	if (priv->devtype_data.quirks &
+			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3))
 		free_irq(priv->irq_err, dev);
  out_free_irq_boff:
 	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
@@ -1823,10 +1827,12 @@ static int flexcan_close(struct net_device *dev)
 	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ)
 		free_irq(priv->irq_secondary_mb, dev);
 
-	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
+	if (priv->devtype_data.quirks &
+			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3))
 		free_irq(priv->irq_err, dev);
+
+	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
 		free_irq(priv->irq_boff, dev);
-	}
 
 	free_irq(dev->irq, dev);
 	can_rx_offload_disable(&priv->offload);
@@ -2213,12 +2219,21 @@ static int flexcan_probe(struct platform_device *pdev)
 	if (transceiver)
 		priv->can.bitrate_max = transceiver->attrs.max_link_rate;
 
+	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_2) {
+		priv->irq_err = platform_get_irq(pdev, 1);
+		if (priv->irq_err < 0) {
+			err = priv->irq_err;
+			goto failed_platform_get_irq;
+		}
+	}
+
 	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
 		priv->irq_boff = platform_get_irq(pdev, 1);
 		if (priv->irq_boff < 0) {
 			err = priv->irq_boff;
 			goto failed_platform_get_irq;
 		}
+
 		priv->irq_err = platform_get_irq(pdev, 2);
 		if (priv->irq_err < 0) {
 			err = priv->irq_err;
diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h
index 16692a2502eb..f05036ca54f5 100644
--- a/drivers/net/can/flexcan/flexcan.h
+++ b/drivers/net/can/flexcan/flexcan.h
@@ -58,22 +58,24 @@
 #define FLEXCAN_QUIRK_SUPPORT_ECC BIT(10)
 /* Setup stop mode with SCU firmware to support wakeup */
 #define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW BIT(11)
+/* Setup 2 separate interrupts, main and err */
+#define FLEXCAN_QUIRK_NR_IRQ_2 BIT(12)
 /* Setup 3 separate interrupts, main, boff and err */
-#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(12)
+#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(13)
 /* Setup 16 mailboxes */
-#define FLEXCAN_QUIRK_NR_MB_16 BIT(13)
+#define FLEXCAN_QUIRK_NR_MB_16 BIT(14)
 /* Device supports RX via mailboxes */
-#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(14)
+#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(15)
 /* Device supports RTR reception via mailboxes */
-#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(15)
+#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(16)
 /* Device supports RX via FIFO */
-#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16)
+#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(17)
 /* Setup stop mode with ATF SCMI protocol to support wakeup */
-#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(17)
+#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(18)
 /* Device has two separate interrupt lines for two mailbox ranges, which
  * both need to have an interrupt handler registered.
  */
-#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(18)
+#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(19)
 
 struct flexcan_devtype_data {
 	u32 quirks;		/* quirks needed for different IP cores */
-- 
2.43.0

Re: [PATCH 2/5] can: flexcan: add FLEXCAN_QUIRK_NR_IRQ_2 quirk for two interrupt lines

[Marc Kleine-Budde]

[-- Attachment #1: Type: text/plain, Size: 5787 bytes --]

On 18.03.2026 10:22:12, Ciprian Costea wrote:
> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>
> Introduce FLEXCAN_QUIRK_NR_IRQ_2 quirk to handle hardware integration

I understand, you followed the pattern and introduced
FLEXCAN_QUIRK_NR_IRQ_2.

I think it would be better to describe the actual reason why this IP
integration uses 2 IRQs: it has a dedicated combined bus error and state
change IRQ. What about: FLEXCAN_QUIRK_IRQ_BERR, this would match the
interrupt name from the bindings.

In a separate patch, we could migrate the s32g compatible SoCs to the
new quirk. But that's not subject to this patch series.

> where the FlexCAN module has two separate interrupt lines:
> - one for signaling error and bus state changes

Usually it's "bus error" and "state changes", as the errors happen
visible for everyone on the bus, while the state change is local to the
controller (every controller has it's own state).

> - one for mailboxes 0-127
>
> This is required for NXP S32N79 SoC support.
>
> Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
> ---
>  drivers/net/can/flexcan/flexcan-core.c | 21 ++++++++++++++++++---
>  drivers/net/can/flexcan/flexcan.h      | 16 +++++++++-------
>  2 files changed, 27 insertions(+), 10 deletions(-)
>
> diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
> index f5d22c61503f..a6b15496853c 100644
> --- a/drivers/net/can/flexcan/flexcan-core.c
> +++ b/drivers/net/can/flexcan/flexcan-core.c
> @@ -1770,7 +1770,10 @@ static int flexcan_open(struct net_device *dev)
>  				  flexcan_irq, IRQF_SHARED, dev->name, dev);
>  		if (err)
>  			goto out_free_irq;
> +	}
>
> +	if (priv->devtype_data.quirks &
> +			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3)) {
>  		err = request_irq(priv->irq_err,
>  				  flexcan_irq, IRQF_SHARED, dev->name, dev);
>  		if (err)
> @@ -1791,7 +1794,8 @@ static int flexcan_open(struct net_device *dev)
>  	return 0;
>
>   out_free_irq_err:
> -	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
> +	if (priv->devtype_data.quirks &
> +			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3))
>  		free_irq(priv->irq_err, dev);
>   out_free_irq_boff:
>  	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
> @@ -1823,10 +1827,12 @@ static int flexcan_close(struct net_device *dev)
>  	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ)
>  		free_irq(priv->irq_secondary_mb, dev);
>
> -	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
> +	if (priv->devtype_data.quirks &
> +			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3))
>  		free_irq(priv->irq_err, dev);
> +
> +	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
>  		free_irq(priv->irq_boff, dev);
> -	}
>
>  	free_irq(dev->irq, dev);
>  	can_rx_offload_disable(&priv->offload);
> @@ -2213,12 +2219,21 @@ static int flexcan_probe(struct platform_device *pdev)
>  	if (transceiver)
>  		priv->can.bitrate_max = transceiver->attrs.max_link_rate;
>
> +	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_2) {
> +		priv->irq_err = platform_get_irq(pdev, 1);

Please use platform_get_irq_byname()

> +		if (priv->irq_err < 0) {
> +			err = priv->irq_err;
> +			goto failed_platform_get_irq;
> +		}
> +	}
> +
>  	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
>  		priv->irq_boff = platform_get_irq(pdev, 1);
>  		if (priv->irq_boff < 0) {
>  			err = priv->irq_boff;
>  			goto failed_platform_get_irq;
>  		}
> +
>  		priv->irq_err = platform_get_irq(pdev, 2);
>  		if (priv->irq_err < 0) {
>  			err = priv->irq_err;
> diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h
> index 16692a2502eb..f05036ca54f5 100644
> --- a/drivers/net/can/flexcan/flexcan.h
> +++ b/drivers/net/can/flexcan/flexcan.h
> @@ -58,22 +58,24 @@
>  #define FLEXCAN_QUIRK_SUPPORT_ECC BIT(10)
>  /* Setup stop mode with SCU firmware to support wakeup */
>  #define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW BIT(11)
> +/* Setup 2 separate interrupts, main and err */
> +#define FLEXCAN_QUIRK_NR_IRQ_2 BIT(12)
>  /* Setup 3 separate interrupts, main, boff and err */
> -#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(12)
> +#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(13)
>  /* Setup 16 mailboxes */
> -#define FLEXCAN_QUIRK_NR_MB_16 BIT(13)
> +#define FLEXCAN_QUIRK_NR_MB_16 BIT(14)
>  /* Device supports RX via mailboxes */
> -#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(14)
> +#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(15)
>  /* Device supports RTR reception via mailboxes */
> -#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(15)
> +#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(16)
>  /* Device supports RX via FIFO */
> -#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16)
> +#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(17)
>  /* Setup stop mode with ATF SCMI protocol to support wakeup */
> -#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(17)
> +#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(18)
>  /* Device has two separate interrupt lines for two mailbox ranges, which
>   * both need to have an interrupt handler registered.
>   */
> -#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(18)
> +#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(19)

As I want to change the quirks anyways, just add new quirk at the end.

regards,
Marc

-- 
Pengutronix e.K.                 | Marc Kleine-Budde          |
Embedded Linux                   | https://www.pengutronix.de |
Vertretung Nürnberg              | Phone: +49-5121-206917-129 |
Amtsgericht Hildesheim, HRA 2686 | Fax:   +49-5121-206917-9   |

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Re: [PATCH 2/5] can: flexcan: add FLEXCAN_QUIRK_NR_IRQ_2 quirk for two interrupt lines

[Ciprian Marian Costea]

On 3/18/2026 12:42 PM, Marc Kleine-Budde wrote:
> On 18.03.2026 10:22:12, Ciprian Costea wrote:
>> From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>>
>> Introduce FLEXCAN_QUIRK_NR_IRQ_2 quirk to handle hardware integration
> 
> I understand, you followed the pattern and introduced
> FLEXCAN_QUIRK_NR_IRQ_2.
> 
> I think it would be better to describe the actual reason why this IP
> integration uses 2 IRQs: it has a dedicated combined bus error and state
> change IRQ. What about: FLEXCAN_QUIRK_IRQ_BERR, this would match the
> interrupt name from the bindings.
> 

Good suggestion, I will rename the quirk in V2.

> In a separate patch, we could migrate the s32g compatible SoCs to the
> new quirk. But that's not subject to this patch series.
>

True. There is also 'mcf5441x' SoC which uses 'FLEXCAN_QUIRK_NR_IRQ_3' 
quirk and needs to be considered, besides s32g.

>> where the FlexCAN module has two separate interrupt lines:
>> - one for signaling error and bus state changes
> 
> Usually it's "bus error" and "state changes", as the errors happen
> visible for everyone on the bus, while the state change is local to the
> controller (every controller has it's own state).
> 
>> - one for mailboxes 0-127
>>
>> This is required for NXP S32N79 SoC support.
>>
>> Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
>> Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
>> Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
>> ---
>>   drivers/net/can/flexcan/flexcan-core.c | 21 ++++++++++++++++++---
>>   drivers/net/can/flexcan/flexcan.h      | 16 +++++++++-------
>>   2 files changed, 27 insertions(+), 10 deletions(-)
>>
>> diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
>> index f5d22c61503f..a6b15496853c 100644
>> --- a/drivers/net/can/flexcan/flexcan-core.c
>> +++ b/drivers/net/can/flexcan/flexcan-core.c
>> @@ -1770,7 +1770,10 @@ static int flexcan_open(struct net_device *dev)
>>   				  flexcan_irq, IRQF_SHARED, dev->name, dev);
>>   		if (err)
>>   			goto out_free_irq;
>> +	}
>>
>> +	if (priv->devtype_data.quirks &
>> +			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3)) {
>>   		err = request_irq(priv->irq_err,
>>   				  flexcan_irq, IRQF_SHARED, dev->name, dev);
>>   		if (err)
>> @@ -1791,7 +1794,8 @@ static int flexcan_open(struct net_device *dev)
>>   	return 0;
>>
>>    out_free_irq_err:
>> -	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
>> +	if (priv->devtype_data.quirks &
>> +			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3))
>>   		free_irq(priv->irq_err, dev);
>>    out_free_irq_boff:
>>   	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
>> @@ -1823,10 +1827,12 @@ static int flexcan_close(struct net_device *dev)
>>   	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_SECONDARY_MB_IRQ)
>>   		free_irq(priv->irq_secondary_mb, dev);
>>
>> -	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
>> +	if (priv->devtype_data.quirks &
>> +			(FLEXCAN_QUIRK_NR_IRQ_2 | FLEXCAN_QUIRK_NR_IRQ_3))
>>   		free_irq(priv->irq_err, dev);
>> +
>> +	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3)
>>   		free_irq(priv->irq_boff, dev);
>> -	}
>>
>>   	free_irq(dev->irq, dev);
>>   	can_rx_offload_disable(&priv->offload);
>> @@ -2213,12 +2219,21 @@ static int flexcan_probe(struct platform_device *pdev)
>>   	if (transceiver)
>>   		priv->can.bitrate_max = transceiver->attrs.max_link_rate;
>>
>> +	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_2) {
>> +		priv->irq_err = platform_get_irq(pdev, 1);
> 
> Please use platform_get_irq_byname()
> 

Makes sense, I will update in V2.

>> +		if (priv->irq_err < 0) {
>> +			err = priv->irq_err;
>> +			goto failed_platform_get_irq;
>> +		}
>> +	}
>> +
>>   	if (priv->devtype_data.quirks & FLEXCAN_QUIRK_NR_IRQ_3) {
>>   		priv->irq_boff = platform_get_irq(pdev, 1);
>>   		if (priv->irq_boff < 0) {
>>   			err = priv->irq_boff;
>>   			goto failed_platform_get_irq;
>>   		}
>> +
>>   		priv->irq_err = platform_get_irq(pdev, 2);
>>   		if (priv->irq_err < 0) {
>>   			err = priv->irq_err;
>> diff --git a/drivers/net/can/flexcan/flexcan.h b/drivers/net/can/flexcan/flexcan.h
>> index 16692a2502eb..f05036ca54f5 100644
>> --- a/drivers/net/can/flexcan/flexcan.h
>> +++ b/drivers/net/can/flexcan/flexcan.h
>> @@ -58,22 +58,24 @@
>>   #define FLEXCAN_QUIRK_SUPPORT_ECC BIT(10)
>>   /* Setup stop mode with SCU firmware to support wakeup */
>>   #define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCFW BIT(11)
>> +/* Setup 2 separate interrupts, main and err */
>> +#define FLEXCAN_QUIRK_NR_IRQ_2 BIT(12)
>>   /* Setup 3 separate interrupts, main, boff and err */
>> -#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(12)
>> +#define FLEXCAN_QUIRK_NR_IRQ_3 BIT(13)
>>   /* Setup 16 mailboxes */
>> -#define FLEXCAN_QUIRK_NR_MB_16 BIT(13)
>> +#define FLEXCAN_QUIRK_NR_MB_16 BIT(14)
>>   /* Device supports RX via mailboxes */
>> -#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(14)
>> +#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX BIT(15)
>>   /* Device supports RTR reception via mailboxes */
>> -#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(15)
>> +#define FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR BIT(16)
>>   /* Device supports RX via FIFO */
>> -#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(16)
>> +#define FLEXCAN_QUIRK_SUPPORT_RX_FIFO BIT(17)
>>   /* Setup stop mode with ATF SCMI protocol to support wakeup */
>> -#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(17)
>> +#define FLEXCAN_QUIRK_SETUP_STOP_MODE_SCMI BIT(18)
>>   /* Device has two separate interrupt lines for two mailbox ranges, which
>>    * both need to have an interrupt handler registered.
>>    */
>> -#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(18)
>> +#define FLEXCAN_QUIRK_SECONDARY_MB_IRQ	BIT(19)
> 
> As I want to change the quirks anyways, just add new quirk at the end.
> 

Sure. They do need some sort of ordering.
I will add the new quirk at the end in V2.

Best Regards,
Ciprian

> regards,
> Marc
> 

[PATCH 3/5] can: flexcan: add NXP S32N79 SoC support

[Ciprian Costea]

From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

Add device data and compatible string for NXP S32N79 SoC.

FlexCAN IP integration on S32N79 SoC uses two interrupts:
- one for signaling error and bus state changes
- one for mailboxes 0-127

Co-developed-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Co-developed-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Larisa Grigore <larisa.grigore@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
 drivers/net/can/flexcan/flexcan-core.c | 10 ++++++++++
 1 file changed, 10 insertions(+)

diff --git a/drivers/net/can/flexcan/flexcan-core.c b/drivers/net/can/flexcan/flexcan-core.c
index a6b15496853c..1fc7540c8b52 100644
--- a/drivers/net/can/flexcan/flexcan-core.c
+++ b/drivers/net/can/flexcan/flexcan-core.c
@@ -397,6 +397,15 @@ static const struct flexcan_devtype_data nxp_s32g2_devtype_data = {
 		FLEXCAN_QUIRK_SECONDARY_MB_IRQ,
 };
 
+static const struct flexcan_devtype_data nxp_s32n_devtype_data = {
+	.quirks = FLEXCAN_QUIRK_DISABLE_RXFG | FLEXCAN_QUIRK_ENABLE_EACEN_RRS |
+		FLEXCAN_QUIRK_DISABLE_MECR | FLEXCAN_QUIRK_BROKEN_PERR_STATE |
+		FLEXCAN_QUIRK_USE_RX_MAILBOX | FLEXCAN_QUIRK_SUPPORT_FD |
+		FLEXCAN_QUIRK_SUPPORT_ECC | FLEXCAN_QUIRK_NR_IRQ_2 |
+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX |
+		FLEXCAN_QUIRK_SUPPORT_RX_MAILBOX_RTR,
+};
+
 static const struct can_bittiming_const flexcan_bittiming_const = {
 	.name = DRV_NAME,
 	.tseg1_min = 4,
@@ -2076,6 +2085,7 @@ static const struct of_device_id flexcan_of_match[] = {
 	{ .compatible = "fsl,ls1021ar2-flexcan", .data = &fsl_ls1021a_r2_devtype_data, },
 	{ .compatible = "fsl,lx2160ar1-flexcan", .data = &fsl_lx2160a_r1_devtype_data, },
 	{ .compatible = "nxp,s32g2-flexcan", .data = &nxp_s32g2_devtype_data, },
+	{ .compatible = "nxp,s32n79-flexcan", .data = &nxp_s32n_devtype_data, },
 	{ /* sentinel */ },
 };
 MODULE_DEVICE_TABLE(of, flexcan_of_match);
-- 
2.43.0

[PATCH 4/5] arm64: dts: s32n79: add FlexCAN nodes

[Ciprian Costea]

From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

The S32N79 integrates multiple FlexCAN instances connected through the RCU
irqsteer interrupt controller.

Co-developed-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Andra-Teodora Ilie <andra.ilie@nxp.com>
Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
 arch/arm64/boot/dts/freescale/s32n79.dtsi | 50 +++++++++++++++++++++++
 1 file changed, 50 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32n79.dtsi b/arch/arm64/boot/dts/freescale/s32n79.dtsi
index 94ab58783fdc..c1a4fdead91d 100644
--- a/arch/arm64/boot/dts/freescale/s32n79.dtsi
+++ b/arch/arm64/boot/dts/freescale/s32n79.dtsi
@@ -352,6 +352,56 @@ pmu: pmu {
 		interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
 	};
 
+	rcu-bus {
+		compatible = "simple-bus";
+		ranges = <0x54000000 0x0 0x54000000 0x4000000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+
+		irqsteer_rcu: interrupt-controller@55101000 {
+			compatible = "nxp,s32n79-irqsteer";
+			reg = <0x55101000 0x1000>;
+			#interrupt-cells = <1>;
+			interrupt-controller;
+			interrupt-parent = <&gic>;
+			interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>,
+				<GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&clks 0xf9>;
+			clock-names = "ipg";
+			fsl,channel = <0>;
+			fsl,num-irqs = <512>;
+			status = "disabled";
+		};
+
+		can0: can@55b60000 {
+			compatible = "nxp,s32n79-flexcan";
+			reg = <0x55b60000 0x4000>;
+			interrupt-parent = <&irqsteer_rcu>;
+			interrupts = <0>, <64>;
+			interrupt-names = "mb-0", "berr";
+			clocks = <&clks 0xf9>, <&clks 0xfc>;
+			clock-names = "ipg", "per";
+			status = "disabled";
+		};
+
+		can1: can@55b70000 {
+			compatible = "nxp,s32n79-flexcan";
+			reg = <0x55b70000 0x4000>;
+			interrupt-parent = <&irqsteer_rcu>;
+			interrupts = <1>, <65>;
+			interrupt-names = "mb-0", "berr";
+			clocks = <&clks 0xf9>, <&clks 0xfc>;
+			clock-names = "ipg", "per";
+			status = "disabled";
+		};
+	};
+
 	timer: timer {
 		compatible = "arm,armv8-timer";
 		interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
-- 
2.43.0

[PATCH 5/5] arm64: dts: s32n79: enable FlexCAN devices

[Ciprian Costea]

From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>

Enable FlexCAN controller instances (can0 and can1) and the required RCU
irqsteer interrupt controller on S32N79-RDB board.

Signed-off-by: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com>
---
 arch/arm64/boot/dts/freescale/s32n79-rdb.dts | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/arch/arm64/boot/dts/freescale/s32n79-rdb.dts b/arch/arm64/boot/dts/freescale/s32n79-rdb.dts
index 1feccd61258e..65a595d7535f 100644
--- a/arch/arm64/boot/dts/freescale/s32n79-rdb.dts
+++ b/arch/arm64/boot/dts/freescale/s32n79-rdb.dts
@@ -43,10 +43,22 @@ memory@80000000 {
 	};
 };
 
+&can0 {
+	status = "okay";
+};
+
+&can1 {
+	status = "okay";
+};
+
 &irqsteer_coss {
 	status = "okay";
 };
 
+&irqsteer_rcu {
+	status = "okay";
+};
+
 &uart0 {
 	status = "okay";
 };
-- 
2.43.0