Linux clock framework development
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From: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
To: Luca Weiss <luca.weiss@fairphone.com>,
	Bjorn Andersson <andersson@kernel.org>,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Konrad Dybcio <konradybcio@kernel.org>,
	Danila Tikhonov <danila@jiaxyga.com>,
	Taniya Das <taniya.das@oss.qualcomm.com>
Cc: ~postmarketos/upstreaming@lists.sr.ht,
	phone-devel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH 1/2] clk: qcom: camcc-sm6350: Fix PLL config of PLL2
Date: Wed, 22 Oct 2025 13:19:16 +0200	[thread overview]
Message-ID: <06aec134-4795-4111-801a-469afdd8977d@oss.qualcomm.com> (raw)
In-Reply-To: <20251021-agera-pll-fixups-v1-1-8c1d8aff4afc@fairphone.com>

On 10/21/25 8:08 PM, Luca Weiss wrote:
> The 'Agera' PLLs (with clk_agera_pll_configure) do not take some of the
> parameters that are provided in the vendor driver. Instead the upstream
> configuration should provide the final user_ctl value that is written to
> the USER_CTL register.

This is perhaps wishful thinking due to potential complexity, but maybe
we could add some sanity checks to make sure that putting things in
unused fields doesn't happen

Konrad

  parent reply	other threads:[~2025-10-22 11:19 UTC|newest]

Thread overview: 11+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-21 18:08 [PATCH 0/2] Fix Agera PLL config of CAMCC for SM6350 & SM7150 Luca Weiss
2025-10-21 18:08 ` [PATCH 1/2] clk: qcom: camcc-sm6350: Fix PLL config of PLL2 Luca Weiss
2025-10-22  6:37   ` Taniya Das
2025-10-22  9:07   ` Abel Vesa
2025-10-22 11:19   ` Konrad Dybcio [this message]
2025-10-22 15:09     ` Dmitry Baryshkov
2025-10-22 15:19       ` Konrad Dybcio
2025-10-21 18:08 ` [PATCH 2/2] clk: qcom: camcc-sm7150: " Luca Weiss
2025-10-22  6:37   ` Taniya Das
2025-10-22  9:08   ` Abel Vesa
2025-10-27 14:09 ` [PATCH 0/2] Fix Agera PLL config of CAMCC for SM6350 & SM7150 Bjorn Andersson

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