From: Alex Elder <elder@linaro.org>
To: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>,
Andy Gross <agross@kernel.org>,
Bjorn Andersson <andersson@kernel.org>,
Konrad Dybcio <konrad.dybcio@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Taniya Das <quic_tdas@quicinc.com>
Cc: linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org
Subject: Re: [PATCH 12/16] clk: qcom: smd-rpm: simplify SMD_RPM/_BRANCH/_QDSS clock definitions
Date: Mon, 5 Dec 2022 11:05:18 -0600 [thread overview]
Message-ID: <0bae98ff-8302-8ef7-1db3-a8bcb9cc4afc@linaro.org> (raw)
In-Reply-To: <20221203175808.859067-13-dmitry.baryshkov@linaro.org>
On 12/3/22 11:58 AM, Dmitry Baryshkov wrote:
> Remove the duplication between the names of the normal and active-only
> clocks by moving common sufixes to the clock definition macros. This
> simplifies adding new clock definitions and reviewing existing defs.
>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Looks good.
Reviewed-by: Alex Elder <elder@linaro.org>
> ---
> drivers/clk/qcom/clk-smd-rpm.c | 90 ++++++++++++++++++----------------
> 1 file changed, 49 insertions(+), 41 deletions(-)
>
> diff --git a/drivers/clk/qcom/clk-smd-rpm.c b/drivers/clk/qcom/clk-smd-rpm.c
> index 9f33dbd60e96..59abc6bf475d 100644
> --- a/drivers/clk/qcom/clk-smd-rpm.c
> +++ b/drivers/clk/qcom/clk-smd-rpm.c
> @@ -62,7 +62,7 @@
> }
>
> #define __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, type, r_id, \
> - r, key) \
> + r, key) \
Thank you for fixing the alignment above.
> static struct clk_smd_rpm _platform##_##_active; \
> static struct clk_smd_rpm _platform##_##_name = { \
> .rpm_res_type = (type), \
> @@ -100,16 +100,24 @@
> }, \
> }
>
> -#define DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id) \
> - __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, \
> +#define DEFINE_CLK_SMD_RPM(_platform, _name, type, r_id) \
> + __DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id, \
> QCOM_RPM_SMD_KEY_RATE)
>
> -#define DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, type, r_id, r) \
> - __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _active, type, \
> +#define DEFINE_CLK_SMD_RPM_CLK_SRC(_platform, _name, type, r_id) \
> + __DEFINE_CLK_SMD_RPM(_platform, _name##_clk_src, _name##_a_clk_src, type, r_id, \
> + QCOM_RPM_SMD_KEY_RATE)
> +
> +#define DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, type, r_id, r) \
> + __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name##_clk, _name##_a_clk, type, \
> + r_id, r, QCOM_RPM_SMD_KEY_ENABLE)
> +
> +#define DEFINE_CLK_SMD_RPM_BRANCH_A(_platform, _name, type, r_id, r) \
> + __DEFINE_CLK_SMD_RPM_BRANCH(_platform, _name, _name##_a, type,\
> r_id, r, QCOM_RPM_SMD_KEY_ENABLE)
>
> -#define DEFINE_CLK_SMD_RPM_QDSS(_platform, _name, _active, type, r_id) \
> - __DEFINE_CLK_SMD_RPM(_platform, _name, _active, type, r_id, \
> +#define DEFINE_CLK_SMD_RPM_QDSS(_platform, _name, type, r_id) \
> + __DEFINE_CLK_SMD_RPM(_platform, _name##_clk, _name##_a_clk, type, r_id, \
> QCOM_RPM_SMD_KEY_STATE)
>
> #define DEFINE_CLK_SMD_RPM_XO_BUFFER(_platform, _name, r_id, r) \
> @@ -410,51 +418,51 @@ static const struct clk_ops clk_smd_rpm_branch_ops = {
> .recalc_rate = clk_smd_rpm_recalc_rate,
> };
>
> -DEFINE_CLK_SMD_RPM_BRANCH(sdm660, bi_tcxo, bi_tcxo_a, QCOM_SMD_RPM_MISC_CLK, 0, 19200000);
> -DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss_clk, qdss_a_clk, QCOM_SMD_RPM_MISC_CLK, 1, 19200000);
> -DEFINE_CLK_SMD_RPM_QDSS(msm8916, qdss_clk, qdss_a_clk, QCOM_SMD_RPM_MISC_CLK, 1);
> -DEFINE_CLK_SMD_RPM_BRANCH(sm6375, bimc_freq_log, bimc_freq_log_a, QCOM_SMD_RPM_MISC_CLK, 4, 1);
> +DEFINE_CLK_SMD_RPM_BRANCH_A(sdm660, bi_tcxo, QCOM_SMD_RPM_MISC_CLK, 0, 19200000);
> +DEFINE_CLK_SMD_RPM_BRANCH(sm6125, qdss, QCOM_SMD_RPM_MISC_CLK, 1, 19200000);
> +DEFINE_CLK_SMD_RPM_QDSS(msm8916, qdss, QCOM_SMD_RPM_MISC_CLK, 1);
> +DEFINE_CLK_SMD_RPM_BRANCH_A(sm6375, bimc_freq_log, QCOM_SMD_RPM_MISC_CLK, 4, 1);
>
> -DEFINE_CLK_SMD_RPM_BRANCH(msm8992, mss_cfg_ahb_clk, mss_cfg_ahb_a_clk, QCOM_SMD_RPM_MCFG_CLK, 0, 19200000);
> +DEFINE_CLK_SMD_RPM_BRANCH(msm8992, mss_cfg_ahb, QCOM_SMD_RPM_MCFG_CLK, 0, 19200000);
>
> -DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre1_noc_clk, aggre1_noc_a_clk, QCOM_SMD_RPM_AGGR_CLK, 1, 1000);
> -DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc_clk, aggre2_noc_a_clk, QCOM_SMD_RPM_AGGR_CLK, 2, 1000);
> -DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc_clk, aggre1_noc_a_clk, QCOM_SMD_RPM_AGGR_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc_clk, aggre2_noc_a_clk, QCOM_SMD_RPM_AGGR_CLK, 2);
> +DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre1_noc, QCOM_SMD_RPM_AGGR_CLK, 1, 1000);
> +DEFINE_CLK_SMD_RPM_BRANCH(msm8996, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2, 1000);
> +DEFINE_CLK_SMD_RPM(msm8998, aggre1_noc, QCOM_SMD_RPM_AGGR_CLK, 1);
> +DEFINE_CLK_SMD_RPM(msm8998, aggre2_noc, QCOM_SMD_RPM_AGGR_CLK, 2);
>
> -DEFINE_CLK_SMD_RPM(msm8916, pcnoc_clk, pcnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 0);
> -DEFINE_CLK_SMD_RPM(msm8916, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc_clk, sysmmnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(msm8974, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb_clk, mmssnoc_ahb_a_clk, QCOM_SMD_RPM_BUS_CLK, 3);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_periph_clk, snoc_periph_a_clk, QCOM_SMD_RPM_BUS_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6125, cnoc_clk, cnoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 1);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_clk, snoc_a_clk, QCOM_SMD_RPM_BUS_CLK, 2);
> -DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass_clk, snoc_lpass_a_clk, QCOM_SMD_RPM_BUS_CLK, 5);
> +DEFINE_CLK_SMD_RPM(msm8916, pcnoc, QCOM_SMD_RPM_BUS_CLK, 0);
> +DEFINE_CLK_SMD_RPM(msm8916, snoc, QCOM_SMD_RPM_BUS_CLK, 1);
> +DEFINE_CLK_SMD_RPM(msm8936, sysmmnoc, QCOM_SMD_RPM_BUS_CLK, 2);
> +DEFINE_CLK_SMD_RPM(msm8974, cnoc, QCOM_SMD_RPM_BUS_CLK, 2);
> +DEFINE_CLK_SMD_RPM(msm8974, mmssnoc_ahb, QCOM_SMD_RPM_BUS_CLK, 3);
> +DEFINE_CLK_SMD_RPM(sm6125, snoc_periph, QCOM_SMD_RPM_BUS_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sm6125, cnoc, QCOM_SMD_RPM_BUS_CLK, 1);
> +DEFINE_CLK_SMD_RPM(sm6125, snoc, QCOM_SMD_RPM_BUS_CLK, 2);
> +DEFINE_CLK_SMD_RPM(sm6125, snoc_lpass, QCOM_SMD_RPM_BUS_CLK, 5);
>
> -DEFINE_CLK_SMD_RPM(msm8916, bimc_clk, bimc_a_clk, QCOM_SMD_RPM_MEM_CLK, 0);
> -DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc_clk, cpuss_gnoc_a_clk, QCOM_SMD_RPM_MEM_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8974, gfx3d_clk_src, gfx3d_a_clk_src, QCOM_SMD_RPM_MEM_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8974, ocmemgx_clk, ocmemgx_a_clk, QCOM_SMD_RPM_MEM_CLK, 2);
> -DEFINE_CLK_SMD_RPM(qcs404, bimc_gpu_clk, bimc_gpu_a_clk, QCOM_SMD_RPM_MEM_CLK, 2);
> +DEFINE_CLK_SMD_RPM(msm8916, bimc, QCOM_SMD_RPM_MEM_CLK, 0);
> +DEFINE_CLK_SMD_RPM(qcm2290, cpuss_gnoc, QCOM_SMD_RPM_MEM_CLK, 1);
> +DEFINE_CLK_SMD_RPM_CLK_SRC(msm8974, gfx3d, QCOM_SMD_RPM_MEM_CLK, 1);
> +DEFINE_CLK_SMD_RPM(msm8974, ocmemgx, QCOM_SMD_RPM_MEM_CLK, 2);
> +DEFINE_CLK_SMD_RPM(qcs404, bimc_gpu, QCOM_SMD_RPM_MEM_CLK, 2);
>
> -DEFINE_CLK_SMD_RPM(msm8992, ce1_clk, ce1_a_clk, QCOM_SMD_RPM_CE_CLK, 0);
> -DEFINE_CLK_SMD_RPM(msm8992, ce2_clk, ce2_a_clk, QCOM_SMD_RPM_CE_CLK, 1);
> -DEFINE_CLK_SMD_RPM(msm8994, ce3_clk, ce3_a_clk, QCOM_SMD_RPM_CE_CLK, 2);
> +DEFINE_CLK_SMD_RPM(msm8992, ce1, QCOM_SMD_RPM_CE_CLK, 0);
> +DEFINE_CLK_SMD_RPM(msm8992, ce2, QCOM_SMD_RPM_CE_CLK, 1);
> +DEFINE_CLK_SMD_RPM(msm8994, ce3, QCOM_SMD_RPM_CE_CLK, 2);
>
> -DEFINE_CLK_SMD_RPM(msm8976, ipa_clk, ipa_a_clk, QCOM_SMD_RPM_IPA_CLK, 0);
> +DEFINE_CLK_SMD_RPM(msm8976, ipa, QCOM_SMD_RPM_IPA_CLK, 0);
>
> -DEFINE_CLK_SMD_RPM(qcm2290, hwkm_clk, hwkm_a_clk, QCOM_SMD_RPM_HWKM_CLK, 0);
> +DEFINE_CLK_SMD_RPM(qcm2290, hwkm, QCOM_SMD_RPM_HWKM_CLK, 0);
>
> -DEFINE_CLK_SMD_RPM(msm8996, mmssnoc_axi_rpm_clk, mmssnoc_axi_rpm_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6125, mmnrt_clk, mmnrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 0);
> -DEFINE_CLK_SMD_RPM(sm6125, mmrt_clk, mmrt_a_clk, QCOM_SMD_RPM_MMAXI_CLK, 1);
> +DEFINE_CLK_SMD_RPM(msm8996, mmssnoc_axi_rpm, QCOM_SMD_RPM_MMAXI_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sm6125, mmnrt, QCOM_SMD_RPM_MMAXI_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sm6125, mmrt, QCOM_SMD_RPM_MMAXI_CLK, 1);
>
> -DEFINE_CLK_SMD_RPM(qcm2290, pka_clk, pka_a_clk, QCOM_SMD_RPM_PKA_CLK, 0);
> +DEFINE_CLK_SMD_RPM(qcm2290, pka, QCOM_SMD_RPM_PKA_CLK, 0);
>
> -DEFINE_CLK_SMD_RPM(qcs404, qpic_clk, qpic_a_clk, QCOM_SMD_RPM_QPIC_CLK, 0);
> +DEFINE_CLK_SMD_RPM(qcs404, qpic, QCOM_SMD_RPM_QPIC_CLK, 0);
>
> -DEFINE_CLK_SMD_RPM(sm6125, qup_clk, qup_a_clk, QCOM_SMD_RPM_QUP_CLK, 0);
> +DEFINE_CLK_SMD_RPM(sm6125, qup, QCOM_SMD_RPM_QUP_CLK, 0);
>
> DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk1, 1, 19200000);
> DEFINE_CLK_SMD_RPM_XO_BUFFER_PINCTRL(msm8916, bb_clk2, 2, 19200000);
next prev parent reply other threads:[~2022-12-05 17:05 UTC|newest]
Thread overview: 58+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-03 17:57 [PATCH 00/16] clk: qcom: smd-rpm: drop platform names Dmitry Baryshkov
2022-12-03 17:57 ` [PATCH 01/16] clk: qcom: smd-rpm: remove duplication between sm6375 and sm6125 clocks Dmitry Baryshkov
2022-12-05 11:13 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-03 17:57 ` [PATCH 02/16] clk: qcom: smd-rpm: enable pin-controlled ln_bb_clk clocks on qcs404 Dmitry Baryshkov
2022-12-05 11:14 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-03 17:57 ` [PATCH 03/16] clk: qcom: smd-rpm: remove duplication between qcs404 and qcm2290 clocks Dmitry Baryshkov
2022-12-05 11:15 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-06 23:18 ` Dmitry Baryshkov
2022-12-03 17:57 ` [PATCH 04/16] clk: qcom: smd-rpm: add missing ln_bb_clkN clocks Dmitry Baryshkov
2022-12-05 11:17 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-06 23:19 ` Dmitry Baryshkov
2022-12-03 17:57 ` [PATCH 05/16] clk: qcom: smd-rpm: use msm8998_ln_bb_clk2 for qcm2290 SoC Dmitry Baryshkov
2022-12-05 11:18 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-03 17:57 ` [PATCH 06/16] clk: qcom: smd-rpm: rename msm8992_ln_bb_* clocks to qcs404_ln_bb_* Dmitry Baryshkov
2022-12-05 11:19 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-06 23:26 ` Dmitry Baryshkov
2022-12-06 23:26 ` Dmitry Baryshkov
2022-12-03 17:57 ` [PATCH 07/16] clk: qcom: smd-rpm: add XO_BUFFER clock for each XO_BUFFER_PINCTRL clock Dmitry Baryshkov
2022-12-05 11:20 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-03 17:58 ` [PATCH 08/16] clk: qcom: smd-rpm: drop the rpm_status_id field Dmitry Baryshkov
2022-12-05 11:21 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-05 21:38 ` Dmitry Baryshkov
2022-12-05 21:54 ` Alex Elder
2022-12-03 17:58 ` [PATCH 09/16] clk: qcom: smd-rpm: move clock definitions together Dmitry Baryshkov
2022-12-05 11:23 ` Konrad Dybcio
2022-12-05 17:04 ` Alex Elder
2022-12-03 17:58 ` [PATCH 10/16] clk: qcom: smd-rpm: rename some msm8974 active-only clocks Dmitry Baryshkov
2022-12-05 11:25 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder
2022-12-05 21:40 ` Dmitry Baryshkov
2022-12-03 17:58 ` [PATCH 11/16] clk: qcom: smd-rpm: simplify XO_BUFFER clocks definitions Dmitry Baryshkov
2022-12-05 11:27 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder
2022-12-06 23:30 ` Dmitry Baryshkov
2022-12-03 17:58 ` [PATCH 12/16] clk: qcom: smd-rpm: simplify SMD_RPM/_BRANCH/_QDSS clock definitions Dmitry Baryshkov
2022-12-05 11:28 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder [this message]
2022-12-03 17:58 ` [PATCH 13/16] clk: qcom: smd-rpm: rename SMD_RPM_BRANCH clock symbols Dmitry Baryshkov
2022-12-05 11:30 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder
2022-12-03 17:58 ` [PATCH 14/16] clk: qcom: smd-rpm: rename the qcm2290 rf_clk3 clocks Dmitry Baryshkov
2022-12-05 11:31 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder
2022-12-03 17:58 ` [PATCH 15/16] clk: qcom: smd-rpm: rename SMD_RPM_BUS clocks Dmitry Baryshkov
2022-12-05 11:34 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder
2022-12-05 21:42 ` Dmitry Baryshkov
2022-12-03 17:58 ` [PATCH 16/16] clk: qcom: smd-rpm: remove usage of platform name Dmitry Baryshkov
2022-12-05 11:35 ` Konrad Dybcio
2022-12-05 17:05 ` Alex Elder
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