* [PATCH] clk: qcom: clk-alpha-pll: Do not use random stack value for recalc rate
@ 2024-11-27 9:36 Krzysztof Kozlowski
2024-12-03 5:08 ` Stephen Boyd
0 siblings, 1 reply; 3+ messages in thread
From: Krzysztof Kozlowski @ 2024-11-27 9:36 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, linux-arm-msm,
linux-clk, linux-kernel
Cc: Krzysztof Kozlowski
If regmap_read() fails, random stack value was used in calculating new
frequency in recalc_rate() callbacks. Such failure is really not
expected as these are all MMIO reads, however code should be here
correct and bail out. This also avoids possible warning on
uninitialized value.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
---
drivers/clk/qcom/clk-alpha-pll.c | 41 ++++++++++++++++++++++----------
1 file changed, 29 insertions(+), 12 deletions(-)
diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
index 5e9217ea3760..0cd937ab47d0 100644
--- a/drivers/clk/qcom/clk-alpha-pll.c
+++ b/drivers/clk/qcom/clk-alpha-pll.c
@@ -682,9 +682,12 @@ clk_alpha_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
u32 alpha_width = pll_alpha_width(pll);
- regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
+ if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
+ return 0;
+
+ if (regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl))
+ return 0;
- regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
if (ctl & PLL_ALPHA_EN) {
regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);
if (alpha_width > 32) {
@@ -915,8 +918,11 @@ alpha_pll_huayra_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
u32 l, alpha = 0, ctl, alpha_m, alpha_n;
- regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
- regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
+ if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
+ return 0;
+
+ if (regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl))
+ return 0;
if (ctl & PLL_ALPHA_EN) {
regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &alpha);
@@ -1110,8 +1116,11 @@ clk_trion_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
u32 l, frac, alpha_width = pll_alpha_width(pll);
- regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
- regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac);
+ if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
+ return 0;
+
+ if (regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &frac))
+ return 0;
return alpha_pll_calc_rate(parent_rate, l, frac, alpha_width);
}
@@ -1169,7 +1178,8 @@ clk_alpha_pll_postdiv_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
struct clk_alpha_pll_postdiv *pll = to_clk_alpha_pll_postdiv(hw);
u32 ctl;
- regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
+ if (regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl))
+ return 0;
ctl >>= PLL_POST_DIV_SHIFT;
ctl &= PLL_POST_DIV_MASK(pll);
@@ -1385,8 +1395,11 @@ static unsigned long alpha_pll_fabia_recalc_rate(struct clk_hw *hw,
struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
u32 l, frac, alpha_width = pll_alpha_width(pll);
- regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
- regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac);
+ if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
+ return 0;
+
+ if (regmap_read(pll->clkr.regmap, PLL_FRAC(pll), &frac))
+ return 0;
return alpha_pll_calc_rate(parent_rate, l, frac, alpha_width);
}
@@ -2457,9 +2470,12 @@ static unsigned long alpha_pll_lucid_evo_recalc_rate(struct clk_hw *hw,
struct regmap *regmap = pll->clkr.regmap;
u32 l, frac;
- regmap_read(regmap, PLL_L_VAL(pll), &l);
+ if (regmap_read(regmap, PLL_L_VAL(pll), &l))
+ return 0;
l &= LUCID_EVO_PLL_L_VAL_MASK;
- regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac);
+
+ if (regmap_read(regmap, PLL_ALPHA_VAL(pll), &frac))
+ return 0;
return alpha_pll_calc_rate(parent_rate, l, frac, pll_alpha_width(pll));
}
@@ -2534,7 +2550,8 @@ static unsigned long clk_rivian_evo_pll_recalc_rate(struct clk_hw *hw,
struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
u32 l;
- regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
+ if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
+ return 0;
return parent_rate * l;
}
--
2.43.0
^ permalink raw reply related [flat|nested] 3+ messages in thread
* Re: [PATCH] clk: qcom: clk-alpha-pll: Do not use random stack value for recalc rate
2024-11-27 9:36 [PATCH] clk: qcom: clk-alpha-pll: Do not use random stack value for recalc rate Krzysztof Kozlowski
@ 2024-12-03 5:08 ` Stephen Boyd
2024-12-03 7:21 ` Krzysztof Kozlowski
0 siblings, 1 reply; 3+ messages in thread
From: Stephen Boyd @ 2024-12-03 5:08 UTC (permalink / raw)
To: Bjorn Andersson, Krzysztof Kozlowski, Michael Turquette,
linux-arm-msm, linux-clk, linux-kernel
Cc: Krzysztof Kozlowski
Quoting Krzysztof Kozlowski (2024-11-27 01:36:23)
> If regmap_read() fails, random stack value was used in calculating new
> frequency in recalc_rate() callbacks. Such failure is really not
> expected as these are all MMIO reads, however code should be here
> correct and bail out. This also avoids possible warning on
> uninitialized value.
>
> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
> ---
> drivers/clk/qcom/clk-alpha-pll.c | 41 ++++++++++++++++++++++----------
> 1 file changed, 29 insertions(+), 12 deletions(-)
>
> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
> index 5e9217ea3760..0cd937ab47d0 100644
> --- a/drivers/clk/qcom/clk-alpha-pll.c
> +++ b/drivers/clk/qcom/clk-alpha-pll.c
> @@ -682,9 +682,12 @@ clk_alpha_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
> struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
> u32 alpha_width = pll_alpha_width(pll);
>
> - regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
> + if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
> + return 0;
> +
> + if (regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl))
> + return 0;
>
> - regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
> if (ctl & PLL_ALPHA_EN) {
> regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);
What about 'low'?
> if (alpha_width > 32) {
^ permalink raw reply [flat|nested] 3+ messages in thread
* Re: [PATCH] clk: qcom: clk-alpha-pll: Do not use random stack value for recalc rate
2024-12-03 5:08 ` Stephen Boyd
@ 2024-12-03 7:21 ` Krzysztof Kozlowski
0 siblings, 0 replies; 3+ messages in thread
From: Krzysztof Kozlowski @ 2024-12-03 7:21 UTC (permalink / raw)
To: Stephen Boyd, Bjorn Andersson, Michael Turquette, linux-arm-msm,
linux-clk, linux-kernel
On 03/12/2024 06:08, Stephen Boyd wrote:
>> diff --git a/drivers/clk/qcom/clk-alpha-pll.c b/drivers/clk/qcom/clk-alpha-pll.c
>> index 5e9217ea3760..0cd937ab47d0 100644
>> --- a/drivers/clk/qcom/clk-alpha-pll.c
>> +++ b/drivers/clk/qcom/clk-alpha-pll.c
>> @@ -682,9 +682,12 @@ clk_alpha_pll_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
>> struct clk_alpha_pll *pll = to_clk_alpha_pll(hw);
>> u32 alpha_width = pll_alpha_width(pll);
>>
>> - regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l);
>> + if (regmap_read(pll->clkr.regmap, PLL_L_VAL(pll), &l))
>> + return 0;
>> +
>> + if (regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl))
>> + return 0;
>>
>> - regmap_read(pll->clkr.regmap, PLL_USER_CTL(pll), &ctl);
>> if (ctl & PLL_ALPHA_EN) {
>> regmap_read(pll->clkr.regmap, PLL_ALPHA_VAL(pll), &low);
>
> What about 'low'?
Indeed, this and one more below regmap_read also need it.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 3+ messages in thread
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2024-11-27 9:36 [PATCH] clk: qcom: clk-alpha-pll: Do not use random stack value for recalc rate Krzysztof Kozlowski
2024-12-03 5:08 ` Stephen Boyd
2024-12-03 7:21 ` Krzysztof Kozlowski
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