[GIT PULL] clk: renesas: Updates for v6.18 (take two)

[GIT PULL] clk: renesas: Updates for v6.18 (take two)

[Geert Uytterhoeven]

	Hi Mike, Stephen,

The following changes since commit 6bbf77bb22565332744c74e9806f8fb50402d73e:

  clk: renesas: r9a09g047: Add GPT clocks and resets (2025-08-25 15:57:49 +0200)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.18-tag2

for you to fetch changes up to b5788b96cba97da01e1f0e1316133427c1102ff6:

  clk: renesas: r9a09g05[67]: Reduce differences (2025-09-12 09:53:37 +0200)

----------------------------------------------------------------
clk: renesas: Updates for v6.18 (take two)

  - Add Ethernet clocks on RZ/T2H and RZ/N2H,
  - Add USB3.0 clocks and resets on RZ/G3E,
  - Add I3C clocks and resets on RZ/V2H and RZ/V2N,
  - Miscellaneous fixes and improvements.

Note that this includes DT binding definition updates for the RZ/T2H,
RZ/N2H, and RZ/G3E SoCs, which are shared by clock driver and DT source
files.

Thanks for pulling!

----------------------------------------------------------------
Biju Das (2):
      dt-bindings: clock: renesas,r9a09g047-cpg: Add USB3.0 core clocks
      clk: renesas: r9a09g047: Add USB3.0 clocks/resets

Geert Uytterhoeven (3):
      Merge tag 'renesas-r9a09g077-dt-binding-defs-tag4' into renesas-clk-for-v6.18
      Merge tag 'renesas-r9a09g047-dt-binding-defs-tag4' into renesas-clk-for-v6.18
      clk: renesas: r9a09g05[67]: Reduce differences

Lad Prabhakar (4):
      dt-bindings: clock: renesas,r9a09g077/87: Add Ethernet clock IDs
      clk: renesas: r9a09g077: Add Ethernet Subsystem core and module clocks
      clk: renesas: r9a09g057: Add clock and reset entries for I3C
      clk: renesas: r9a09g056: Add clock and reset entries for I3C

Tommaso Merciai (4):
      clk: renesas: rzg2l: Simplify rzg2l_cpg_assert() and rzg2l_cpg_deassert()
      clk: renesas: rzg2l: Re-assert reset on deassert timeout
      clk: renesas: rzv2h: Re-assert reset on deassert timeout
      clk: renesas: rzv2h: Simplify polling condition in __rzv2h_cpg_assert()

Yuan CHen (1):
      clk: renesas: cpg-mssr: Fix memory leak in cpg_mssr_reserved_init()

 drivers/clk/renesas/r9a09g047-cpg.c                |  9 +++-
 drivers/clk/renesas/r9a09g056-cpg.c                | 16 +++++--
 drivers/clk/renesas/r9a09g057-cpg.c                | 11 ++++-
 drivers/clk/renesas/r9a09g077-cpg.c                | 14 +++++-
 drivers/clk/renesas/renesas-cpg-mssr.c             |  7 ++-
 drivers/clk/renesas/rzg2l-cpg.c                    | 52 +++++++++-------------
 drivers/clk/renesas/rzv2h-cpg.c                    | 12 +++--
 include/dt-bindings/clock/renesas,r9a09g047-cpg.h  |  2 +
 .../dt-bindings/clock/renesas,r9a09g077-cpg-mssr.h |  5 +++
 .../dt-bindings/clock/renesas,r9a09g087-cpg-mssr.h |  5 +++
 10 files changed, 90 insertions(+), 43 deletions(-)

Gr{oetje,eeting}s,

						Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
							    -- Linus Torvalds

Re: [GIT PULL] clk: renesas: Updates for v6.18 (take two)

[Stephen Boyd]

Quoting Geert Uytterhoeven (2025-09-12 04:14:15)
>         Hi Mike, Stephen,
> 
> The following changes since commit 6bbf77bb22565332744c74e9806f8fb50402d73e:
> 
>   clk: renesas: r9a09g047: Add GPT clocks and resets (2025-08-25 15:57:49 +0200)
> 
> are available in the Git repository at:
> 
>   git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers.git tags/renesas-clk-for-v6.18-tag2
> 
> for you to fetch changes up to b5788b96cba97da01e1f0e1316133427c1102ff6:
> 
>   clk: renesas: r9a09g05[67]: Reduce differences (2025-09-12 09:53:37 +0200)
> 
> ----------------------------------------------------------------

Thanks. Pulled into to clk-next