* [PATCH v2 1/5] clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocks
2016-03-30 14:58 [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Wolfram Sang
@ 2016-03-30 14:58 ` Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 2/5] clk: renesas: r8a7795: add OSC and RINT clocks Wolfram Sang
` (4 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Wolfram Sang @ 2016-03-30 14:58 UTC (permalink / raw)
To: linux-clk; +Cc: Wolfram Sang, linux-renesas-soc, Geert Uytterhoeven
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Gen3 has two clocks (OSC and R) which look like a DIV6 clock but their
divider value is read-only and depends on MD pins at bootup. Add support
for such clocks by reading the value and adding a fixed clock.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Since V1, rebased and tag added.
drivers/clk/renesas/renesas-cpg-mssr.c | 18 ++++++++++++------
drivers/clk/renesas/renesas-cpg-mssr.h | 3 +++
2 files changed, 15 insertions(+), 6 deletions(-)
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.c b/drivers/clk/renesas/renesas-cpg-mssr.c
index 886e0fa3c00d20..1f2dc3629f0e02 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.c
+++ b/drivers/clk/renesas/renesas-cpg-mssr.c
@@ -254,7 +254,7 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
{
struct clk *clk = NULL, *parent;
struct device *dev = priv->dev;
- unsigned int id = core->id;
+ unsigned int id = core->id, div = core->div;
const char *parent_name;
WARN_DEBUG(id >= priv->num_core_clks);
@@ -267,6 +267,7 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
case CLK_TYPE_FF:
case CLK_TYPE_DIV6P1:
+ case CLK_TYPE_DIV6_RO:
WARN_DEBUG(core->parent >= priv->num_core_clks);
parent = priv->clks[core->parent];
if (IS_ERR(parent)) {
@@ -275,13 +276,18 @@ static void __init cpg_mssr_register_core_clk(const struct cpg_core_clk *core,
}
parent_name = __clk_get_name(parent);
- if (core->type == CLK_TYPE_FF) {
- clk = clk_register_fixed_factor(NULL, core->name,
- parent_name, 0,
- core->mult, core->div);
- } else {
+
+ if (core->type == CLK_TYPE_DIV6_RO)
+ /* Multiply with the DIV6 register value */
+ div *= (readl(priv->base + core->offset) & 0x3f) + 1;
+
+ if (core->type == CLK_TYPE_DIV6P1) {
clk = cpg_div6_register(core->name, 1, &parent_name,
priv->base + core->offset);
+ } else {
+ clk = clk_register_fixed_factor(NULL, core->name,
+ parent_name, 0,
+ core->mult, div);
}
break;
diff --git a/drivers/clk/renesas/renesas-cpg-mssr.h b/drivers/clk/renesas/renesas-cpg-mssr.h
index cad3c7d1b0c6f0..0d1e3e811e79bf 100644
--- a/drivers/clk/renesas/renesas-cpg-mssr.h
+++ b/drivers/clk/renesas/renesas-cpg-mssr.h
@@ -37,6 +37,7 @@ enum clk_types {
CLK_TYPE_IN, /* External Clock Input */
CLK_TYPE_FF, /* Fixed Factor Clock */
CLK_TYPE_DIV6P1, /* DIV6 Clock with 1 parent clock */
+ CLK_TYPE_DIV6_RO, /* DIV6 Clock read only with extra divisor */
/* Custom definitions start here */
CLK_TYPE_CUSTOM,
@@ -53,6 +54,8 @@ enum clk_types {
DEF_BASE(_name, _id, CLK_TYPE_FF, _parent, .div = _div, .mult = _mult)
#define DEF_DIV6P1(_name, _id, _parent, _offset) \
DEF_BASE(_name, _id, CLK_TYPE_DIV6P1, _parent, .offset = _offset)
+#define DEF_DIV6_RO(_name, _id, _parent, _offset, _div) \
+ DEF_BASE(_name, _id, CLK_TYPE_DIV6_RO, _parent, .offset = _offset, .div = _div, .mult = 1)
/*
* Definitions of Module Clocks
--
2.7.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 2/5] clk: renesas: r8a7795: add OSC and RINT clocks
2016-03-30 14:58 [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 1/5] clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocks Wolfram Sang
@ 2016-03-30 14:58 ` Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 3/5] clk: renesas: r8a7795: add R clk Wolfram Sang
` (3 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Wolfram Sang @ 2016-03-30 14:58 UTC (permalink / raw)
To: linux-clk; +Cc: Wolfram Sang, linux-renesas-soc, Geert Uytterhoeven
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Since V1: * don't export RINT to DT bindings, keep it internal.
* also, introduce RCKCR already here to not hardcode address
drivers/clk/renesas/r8a7795-cpg-mssr.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 9dc2b735ead85d..08715ca2ebb49d 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -26,6 +26,7 @@
#include "renesas-cpg-mssr.h"
+#define CPG_RCKCR 0x240
enum clk_ids {
/* Core Clock Outputs exported to DT */
@@ -50,6 +51,7 @@ enum clk_ids {
CLK_S3,
CLK_SDSRC,
CLK_SSPSRC,
+ CLK_RINT,
/* Module Clocks */
MOD_CLK_BASE
@@ -116,6 +118,9 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014),
DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV2, 0x250),
DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
+
+ DEF_DIV6_RO("osc", R8A7795_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
+ DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
};
static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
--
2.7.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 3/5] clk: renesas: r8a7795: add R clk
2016-03-30 14:58 [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 1/5] clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocks Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 2/5] clk: renesas: r8a7795: add OSC and RINT clocks Wolfram Sang
@ 2016-03-30 14:58 ` Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 4/5] clk: renesas: r8a7795: add stop for " Wolfram Sang
` (2 subsequent siblings)
5 siblings, 0 replies; 9+ messages in thread
From: Wolfram Sang @ 2016-03-30 14:58 UTC (permalink / raw)
To: linux-clk; +Cc: Wolfram Sang, linux-renesas-soc, Geert Uytterhoeven
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
R can select between two parents. We deal with it like this: During
initialization, check if EXTALR is populated. If so, use it for R. If
not, use R_Internal. clk_mux doesn't help here because we don't want to
switch parents depending on the clock rate. The clock rate (and source)
should stay constant for the watchdog, so I think a setup like this
during initialization makes sense.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
---
Since V1: drop comment about EXTALR and RCKCR was moved to previous patch
drivers/clk/renesas/r8a7795-cpg-mssr.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 08715ca2ebb49d..19b02645771876 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -13,6 +13,7 @@
*/
#include <linux/bug.h>
+#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/device.h>
#include <linux/err.h>
@@ -65,6 +66,7 @@ enum r8a7795_clk_types {
CLK_TYPE_GEN3_PLL3,
CLK_TYPE_GEN3_PLL4,
CLK_TYPE_GEN3_SD,
+ CLK_TYPE_GEN3_R,
};
#define DEF_GEN3_SD(_name, _id, _parent, _offset) \
@@ -121,6 +123,8 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
DEF_DIV6_RO("osc", R8A7795_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
+
+ DEF_BASE("r", R8A7795_CLK_R, CLK_TYPE_GEN3_R, CLK_RINT),
};
static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
@@ -587,6 +591,18 @@ struct clk * __init r8a7795_cpg_clk_register(struct device *dev,
case CLK_TYPE_GEN3_SD:
return cpg_sd_clk_register(core, base, __clk_get_name(parent));
+ case CLK_TYPE_GEN3_R:
+ /* RINT is default. Only if EXTALR is populated, we switch to it */
+ value = readl(base + CPG_RCKCR) & 0x3f;
+
+ if (clk_get_rate(clks[CLK_EXTALR])) {
+ parent = clks[CLK_EXTALR];
+ value |= BIT(15);
+ }
+
+ writel(value, base + CPG_RCKCR);
+ break;
+
default:
return ERR_PTR(-EINVAL);
}
--
2.7.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 4/5] clk: renesas: r8a7795: add stop for R clk
2016-03-30 14:58 [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Wolfram Sang
` (2 preceding siblings ...)
2016-03-30 14:58 ` [PATCH v2 3/5] clk: renesas: r8a7795: add R clk Wolfram Sang
@ 2016-03-30 14:58 ` Wolfram Sang
2016-03-30 14:58 ` [PATCH v2 5/5] arm64: dts: salvator-x: populate EXTALR Wolfram Sang
2016-04-06 7:53 ` [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Geert Uytterhoeven
5 siblings, 0 replies; 9+ messages in thread
From: Wolfram Sang @ 2016-03-30 14:58 UTC (permalink / raw)
To: linux-clk; +Cc: Wolfram Sang, linux-renesas-soc, Geert Uytterhoeven
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
No change since V1.
drivers/clk/renesas/r8a7795-cpg-mssr.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/renesas/r8a7795-cpg-mssr.c b/drivers/clk/renesas/r8a7795-cpg-mssr.c
index 19b02645771876..6af7f5b6e8240b 100644
--- a/drivers/clk/renesas/r8a7795-cpg-mssr.c
+++ b/drivers/clk/renesas/r8a7795-cpg-mssr.c
@@ -151,6 +151,7 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
DEF_MOD("usb3-if0", 328, R8A7795_CLK_S3D1),
DEF_MOD("usb-dmac0", 330, R8A7795_CLK_S3D1),
DEF_MOD("usb-dmac1", 331, R8A7795_CLK_S3D1),
+ DEF_MOD("rwdt0", 402, R8A7795_CLK_R),
DEF_MOD("intc-ex", 407, R8A7795_CLK_CP),
DEF_MOD("intc-ap", 408, R8A7795_CLK_S3D1),
DEF_MOD("audmac0", 502, R8A7795_CLK_S3D4),
--
2.7.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* [PATCH v2 5/5] arm64: dts: salvator-x: populate EXTALR
2016-03-30 14:58 [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Wolfram Sang
` (3 preceding siblings ...)
2016-03-30 14:58 ` [PATCH v2 4/5] clk: renesas: r8a7795: add stop for " Wolfram Sang
@ 2016-03-30 14:58 ` Wolfram Sang
2016-04-06 1:12 ` [v2,5/5] " Simon Horman
2016-04-06 7:53 ` [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Geert Uytterhoeven
5 siblings, 1 reply; 9+ messages in thread
From: Wolfram Sang @ 2016-03-30 14:58 UTC (permalink / raw)
To: linux-clk; +Cc: Wolfram Sang, linux-renesas-soc, Geert Uytterhoeven
From: Wolfram Sang <wsa+renesas@sang-engineering.com>
It can be used for the watchdog.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
Since V1, added tag.
arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
index 26f140d7cb6d1e..dbea5078fec367 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
+++ b/arch/arm64/boot/dts/renesas/r8a7795-salvator-x.dts
@@ -289,6 +289,10 @@
clock-frequency = <16666666>;
};
+&extalr_clk {
+ clock-frequency = <32768>;
+};
+
&pfc {
pinctrl-0 = <&scif_clk_pins>;
pinctrl-names = "default";
--
2.7.0
^ permalink raw reply related [flat|nested] 9+ messages in thread* Re: [v2,5/5] arm64: dts: salvator-x: populate EXTALR
2016-03-30 14:58 ` [PATCH v2 5/5] arm64: dts: salvator-x: populate EXTALR Wolfram Sang
@ 2016-04-06 1:12 ` Simon Horman
2016-04-06 7:30 ` Wolfram Sang
0 siblings, 1 reply; 9+ messages in thread
From: Simon Horman @ 2016-04-06 1:12 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linux-clk, linux-renesas-soc, Geert Uytterhoeven
On Wed, Mar 30, 2016 at 04:58:22PM +0200, Wolfram Sang wrote:
> From: Wolfram Sang <wsa+renesas@sang-engineering.com>
>
> It can be used for the watchdog.
>
> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Thanks, I have queued this up.
^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [v2,5/5] arm64: dts: salvator-x: populate EXTALR
2016-04-06 1:12 ` [v2,5/5] " Simon Horman
@ 2016-04-06 7:30 ` Wolfram Sang
0 siblings, 0 replies; 9+ messages in thread
From: Wolfram Sang @ 2016-04-06 7:30 UTC (permalink / raw)
To: Simon Horman; +Cc: linux-clk, linux-renesas-soc, Geert Uytterhoeven
[-- Attachment #1: Type: text/plain, Size: 548 bytes --]
On Wed, Apr 06, 2016 at 10:12:03AM +0900, Simon Horman wrote:
> On Wed, Mar 30, 2016 at 04:58:22PM +0200, Wolfram Sang wrote:
> > From: Wolfram Sang <wsa+renesas@sang-engineering.com>
> >
> > It can be used for the watchdog.
> >
> > Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
> > Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
>
> Thanks, I have queued this up.
Thanks, although I didn't get message that Geert picked the clock
patches yet. Geert? Still, shouldn't hurt to have this DTS patch in yet.
[-- Attachment #2: signature.asc --]
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^ permalink raw reply [flat|nested] 9+ messages in thread
* Re: [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs
2016-03-30 14:58 [PATCH v2 0/5] clk: renesas: r8a7795: add clocks for the watchdogs Wolfram Sang
` (4 preceding siblings ...)
2016-03-30 14:58 ` [PATCH v2 5/5] arm64: dts: salvator-x: populate EXTALR Wolfram Sang
@ 2016-04-06 7:53 ` Geert Uytterhoeven
5 siblings, 0 replies; 9+ messages in thread
From: Geert Uytterhoeven @ 2016-04-06 7:53 UTC (permalink / raw)
To: Wolfram Sang; +Cc: linux-clk, linux-renesas-soc, Geert Uytterhoeven
Hi Wolfram,
On Wed, Mar 30, 2016 at 4:58 PM, Wolfram Sang <wsa@the-dreams.de> wrote:
> Okay, here is the again updated series. And rebased to latest renesas-drivers
> (renesas-drivers-2016-03-29-v4.6-rc1). Tested with both parent clocks for R.
> Still works fine.
Thanks!
> Wolfram Sang (5):
> clk: renesas: cpg-mssr: add generic support for read-only DIV6 clocks
> clk: renesas: r8a7795: add OSC and RINT clocks
> clk: renesas: r8a7795: add R clk
> clk: renesas: r8a7795: add stop for R clk
I've queued up the 4 patches above in clk-renesas-for-v4.7, after changing
the one-line summary for the last patch to "clk: renesas: r8a7795: add RWDT
clock".
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
^ permalink raw reply [flat|nested] 9+ messages in thread