From: Leo Yan <leo.yan@linaro.org>
To: Stephen Boyd <sboyd@kernel.org>
Cc: Michael Turquette <mturquette@baylibre.com>,
linux-clk@vger.kernel.org, linux-kernel@vger.kernel.org,
stable@vger.kernel.org, Zhong Kaihua <zhongkaihua@huawei.com>,
John Stultz <john.stultz@linaro.org>,
Zhangfei Gao <zhangfei.gao@linaro.org>
Subject: Re: [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical
Date: Wed, 20 Mar 2019 08:59:58 +0800 [thread overview]
Message-ID: <20190320005958.GA18687@leoy-ThinkPad-X240s> (raw)
In-Reply-To: <155302456384.20095.11089482394019450818@swboyd.mtv.corp.google.com>
On Tue, Mar 19, 2019 at 12:42:43PM -0700, Stephen Boyd wrote:
> Quoting Leo Yan (2019-03-19 02:31:48)
> > diff --git a/drivers/clk/hisilicon/clk-hi3660.c b/drivers/clk/hisilicon/clk-hi3660.c
> > index f40419959656..32ba80181cc6 100644
> > --- a/drivers/clk/hisilicon/clk-hi3660.c
> > +++ b/drivers/clk/hisilicon/clk-hi3660.c
> > @@ -164,7 +164,7 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = {
> > { HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2",
> > "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, },
> > { HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",
> > - CLK_SET_RATE_PARENT, 0x50, 21, 0, },
> > + CLK_SET_RATE_PARENT|CLK_IS_CRITICAL, 0x50, 21, 0, },
>
> Nitpick: Please add space around | and also comment in the code why this
> is a critical clk.
Will fix it and spin a new patch.
Thanks for suggestions, Stephen.
> > { HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",
> > CLK_SET_RATE_PARENT, 0x50, 28, 0, },
> > { HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",
prev parent reply other threads:[~2019-03-20 1:00 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-03-19 9:31 [RESEND PATCH] clk: hi3660: Mark clk_gate_ufs_subsys as critical Leo Yan
2019-03-19 19:42 ` Stephen Boyd
2019-03-20 0:59 ` Leo Yan [this message]
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