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From: Sascha Hauer <s.hauer@pengutronix.de>
To: Abel Vesa <abel.vesa@nxp.com>
Cc: linux-clk@vger.kernel.org,
	Michael Turquette <mturquette@baylibre.com>,
	Stephen Boyd <sboyd@kernel.org>,
	Pengutronix Kernel Team <kernel@pengutronix.de>,
	Fabio Estevam <festevam@gmail.com>,
	NXP Linux Team <linux-imx@nxp.com>,
	Adrian Alonso <adrian.alonso@nxp.com>,
	Mads Bligaard Nielsen <bli@bang-olufsen.dk>
Subject: Re: [PATCH 2/8] clk: imx: pll14xx: Fix masking
Date: Wed, 23 Feb 2022 12:46:43 +0100	[thread overview]
Message-ID: <20220223114643.GP9136@pengutronix.de> (raw)
In-Reply-To: <YhYa/TWsd9C4ebtX@abelvesa>

On Wed, Feb 23, 2022 at 01:31:09PM +0200, Abel Vesa wrote:
> On 22-02-23 08:55:55, Sascha Hauer wrote:
> > The code tries to mask the bits in SDIV_MASK from 'tmp'. SDIV_MASK
> > already contains the shifted value, so shifting it again is wrong.
> > 
> > Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
> 
> Do we need some fixes tag, maybe?

Not really. I just realized that SDIV_SHIFT is 0, so this is really only
a cosmetic change.

Sascha

> 
> Reviewed-by: Abel Vesa <abel.vesa@nxp.com>
> 
> > ---
> >  drivers/clk/imx/clk-pll14xx.c | 4 ++--
> >  1 file changed, 2 insertions(+), 2 deletions(-)
> > 
> > diff --git a/drivers/clk/imx/clk-pll14xx.c b/drivers/clk/imx/clk-pll14xx.c
> > index cae64d750672e..b295d8a049009 100644
> > --- a/drivers/clk/imx/clk-pll14xx.c
> > +++ b/drivers/clk/imx/clk-pll14xx.c
> > @@ -195,7 +195,7 @@ static int clk_pll1416x_set_rate(struct clk_hw *hw, unsigned long drate,
> >  	tmp = readl_relaxed(pll->base + DIV_CTL0);
> >  
> >  	if (!clk_pll14xx_mp_change(rate, tmp)) {
> > -		tmp &= ~(SDIV_MASK) << SDIV_SHIFT;
> > +		tmp &= ~SDIV_MASK;
> >  		tmp |= rate->sdiv << SDIV_SHIFT;
> >  		writel_relaxed(tmp, pll->base + DIV_CTL0);
> >  
> > @@ -261,7 +261,7 @@ static int clk_pll1443x_set_rate(struct clk_hw *hw, unsigned long drate,
> >  	tmp = readl_relaxed(pll->base + DIV_CTL0);
> >  
> >  	if (!clk_pll14xx_mp_change(rate, tmp)) {
> > -		tmp &= ~(SDIV_MASK) << SDIV_SHIFT;
> > +		tmp &= ~SDIV_MASK;
> >  		tmp |= rate->sdiv << SDIV_SHIFT;
> >  		writel_relaxed(tmp, pll->base + DIV_CTL0);
> >  
> > -- 
> > 2.30.2
> >
> 

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  reply	other threads:[~2022-02-23 11:46 UTC|newest]

Thread overview: 16+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-02-23  7:55 [PATCH 0/8] clk: i.MX: PLL14xx: Support dynamic rates Sascha Hauer
2022-02-23  7:55 ` [PATCH 1/8] clk: imx: pll14xx: Use register defines consistently Sascha Hauer
2022-02-23 11:29   ` Abel Vesa
2022-02-23  7:55 ` [PATCH 2/8] clk: imx: pll14xx: Fix masking Sascha Hauer
2022-02-23 11:31   ` Abel Vesa
2022-02-23 11:46     ` Sascha Hauer [this message]
2022-02-23  7:55 ` [PATCH 3/8] clk: imx: pll14xx: Use FIELD_GET/FIELD_PREP Sascha Hauer
2022-02-23 11:34   ` Abel Vesa
2022-02-23 13:09   ` kernel test robot
2022-02-23  7:55 ` [PATCH 4/8] clk: imx: pll14xx: consolidate rate calculation Sascha Hauer
2022-02-23  7:55 ` [PATCH 5/8] clk: imx: pll14xx: name variables after usage Sascha Hauer
2022-02-23  7:55 ` [PATCH 6/8] clk: imx: pll14xx: explicitly return lowest rate Sascha Hauer
2022-02-23  7:56 ` [PATCH 7/8] clk: imx: pll14xx: Add pr_fmt Sascha Hauer
2022-02-23 12:47   ` kernel test robot
2022-02-23  7:56 ` [PATCH 8/8] clk: imx: pll14xx: Support dynamic rates Sascha Hauer
2022-02-23 12:48   ` kernel test robot

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