* [PATCH] clk: renesas: r9a07g044: Fix OSTM1 module clock name.
@ 2022-05-02 12:35 Geert Uytterhoeven
2022-05-05 17:54 ` Stephen Boyd
0 siblings, 1 reply; 2+ messages in thread
From: Geert Uytterhoeven @ 2022-05-02 12:35 UTC (permalink / raw)
To: Michael Turquette, Stephen Boyd, Biju Das, Lad Prabhakar
Cc: linux-renesas-soc, linux-clk, Geert Uytterhoeven
Fix a typo in the name of the "ostm1_pclk" clock.
This change has no run-time impact.
Fixes: 161450134ae9bab3 ("clk: renesas: r9a07g044: Add OSTM clock and reset entries")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
---
To be queued in renesas-clk for v5.19.
---
drivers/clk/renesas/r9a07g044-cpg.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/renesas/r9a07g044-cpg.c b/drivers/clk/renesas/r9a07g044-cpg.c
index bdfabb992a20782d..df9d5d91e065fdb8 100644
--- a/drivers/clk/renesas/r9a07g044-cpg.c
+++ b/drivers/clk/renesas/r9a07g044-cpg.c
@@ -180,7 +180,7 @@ static const struct {
0x52c, 1),
DEF_MOD("ostm0_pclk", R9A07G044_OSTM0_PCLK, R9A07G044_CLK_P0,
0x534, 0),
- DEF_MOD("ostm1_clk", R9A07G044_OSTM1_PCLK, R9A07G044_CLK_P0,
+ DEF_MOD("ostm1_pclk", R9A07G044_OSTM1_PCLK, R9A07G044_CLK_P0,
0x534, 1),
DEF_MOD("ostm2_pclk", R9A07G044_OSTM2_PCLK, R9A07G044_CLK_P0,
0x534, 2),
--
2.25.1
^ permalink raw reply related [flat|nested] 2+ messages in thread
end of thread, other threads:[~2022-05-05 17:54 UTC | newest]
Thread overview: 2+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2022-05-02 12:35 [PATCH] clk: renesas: r9a07g044: Fix OSTM1 module clock name Geert Uytterhoeven
2022-05-05 17:54 ` Stephen Boyd
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox