From: Chanho Park <chanho61.park@samsung.com>
To: Sylwester Nawrocki <s.nawrocki@samsung.com>,
Tomasz Figa <tomasz.figa@gmail.com>,
Chanwoo Choi <cw00.choi@samsung.com>,
Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>,
Stephen Boyd <sboyd@kernel.org>,
Michael Turquette <mturquette@baylibre.com>,
Rob Herring <robh+dt@kernel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>
Cc: Alim Akhtar <alim.akhtar@samsung.com>,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
Chanho Park <chanho61.park@samsung.com>
Subject: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
Date: Mon, 27 Jun 2022 09:52:08 +0900 [thread overview]
Message-ID: <20220627005210.6473-2-chanho61.park@samsung.com> (raw)
In-Reply-To: <20220627005210.6473-1-chanho61.park@samsung.com>
There are duplicated definitions of peric0 and peric1 cmu blocks. Thus,
they should be defined correctly as numerical order.
Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding definitions for Exynos Auto v9")
Signed-off-by: Chanho Park <chanho61.park@samsung.com>
---
.../dt-bindings/clock/samsung,exynosautov9.h | 56 +++++++++----------
1 file changed, 28 insertions(+), 28 deletions(-)
diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h b/include/dt-bindings/clock/samsung,exynosautov9.h
index ea9f91b4eb1a..a7db6516593f 100644
--- a/include/dt-bindings/clock/samsung,exynosautov9.h
+++ b/include/dt-bindings/clock/samsung,exynosautov9.h
@@ -226,21 +226,21 @@
#define CLK_GOUT_PERIC0_IPCLK_8 28
#define CLK_GOUT_PERIC0_IPCLK_9 29
#define CLK_GOUT_PERIC0_IPCLK_10 30
-#define CLK_GOUT_PERIC0_IPCLK_11 30
-#define CLK_GOUT_PERIC0_PCLK_0 31
-#define CLK_GOUT_PERIC0_PCLK_1 32
-#define CLK_GOUT_PERIC0_PCLK_2 33
-#define CLK_GOUT_PERIC0_PCLK_3 34
-#define CLK_GOUT_PERIC0_PCLK_4 35
-#define CLK_GOUT_PERIC0_PCLK_5 36
-#define CLK_GOUT_PERIC0_PCLK_6 37
-#define CLK_GOUT_PERIC0_PCLK_7 38
-#define CLK_GOUT_PERIC0_PCLK_8 39
-#define CLK_GOUT_PERIC0_PCLK_9 40
-#define CLK_GOUT_PERIC0_PCLK_10 41
-#define CLK_GOUT_PERIC0_PCLK_11 42
+#define CLK_GOUT_PERIC0_IPCLK_11 31
+#define CLK_GOUT_PERIC0_PCLK_0 32
+#define CLK_GOUT_PERIC0_PCLK_1 33
+#define CLK_GOUT_PERIC0_PCLK_2 34
+#define CLK_GOUT_PERIC0_PCLK_3 35
+#define CLK_GOUT_PERIC0_PCLK_4 36
+#define CLK_GOUT_PERIC0_PCLK_5 37
+#define CLK_GOUT_PERIC0_PCLK_6 38
+#define CLK_GOUT_PERIC0_PCLK_7 39
+#define CLK_GOUT_PERIC0_PCLK_8 40
+#define CLK_GOUT_PERIC0_PCLK_9 41
+#define CLK_GOUT_PERIC0_PCLK_10 42
+#define CLK_GOUT_PERIC0_PCLK_11 43
-#define PERIC0_NR_CLK 43
+#define PERIC0_NR_CLK 44
/* CMU_PERIC1 */
#define CLK_MOUT_PERIC1_BUS_USER 1
@@ -272,21 +272,21 @@
#define CLK_GOUT_PERIC1_IPCLK_8 28
#define CLK_GOUT_PERIC1_IPCLK_9 29
#define CLK_GOUT_PERIC1_IPCLK_10 30
-#define CLK_GOUT_PERIC1_IPCLK_11 30
-#define CLK_GOUT_PERIC1_PCLK_0 31
-#define CLK_GOUT_PERIC1_PCLK_1 32
-#define CLK_GOUT_PERIC1_PCLK_2 33
-#define CLK_GOUT_PERIC1_PCLK_3 34
-#define CLK_GOUT_PERIC1_PCLK_4 35
-#define CLK_GOUT_PERIC1_PCLK_5 36
-#define CLK_GOUT_PERIC1_PCLK_6 37
-#define CLK_GOUT_PERIC1_PCLK_7 38
-#define CLK_GOUT_PERIC1_PCLK_8 39
-#define CLK_GOUT_PERIC1_PCLK_9 40
-#define CLK_GOUT_PERIC1_PCLK_10 41
-#define CLK_GOUT_PERIC1_PCLK_11 42
+#define CLK_GOUT_PERIC1_IPCLK_11 31
+#define CLK_GOUT_PERIC1_PCLK_0 32
+#define CLK_GOUT_PERIC1_PCLK_1 33
+#define CLK_GOUT_PERIC1_PCLK_2 34
+#define CLK_GOUT_PERIC1_PCLK_3 35
+#define CLK_GOUT_PERIC1_PCLK_4 36
+#define CLK_GOUT_PERIC1_PCLK_5 37
+#define CLK_GOUT_PERIC1_PCLK_6 38
+#define CLK_GOUT_PERIC1_PCLK_7 39
+#define CLK_GOUT_PERIC1_PCLK_8 40
+#define CLK_GOUT_PERIC1_PCLK_9 41
+#define CLK_GOUT_PERIC1_PCLK_10 42
+#define CLK_GOUT_PERIC1_PCLK_11 43
-#define PERIC1_NR_CLK 43
+#define PERIC1_NR_CLK 44
/* CMU_PERIS */
#define CLK_MOUT_PERIS_BUS_USER 1
--
2.36.1
next prev parent reply other threads:[~2022-06-27 0:54 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20220627005413epcas2p3b3a22da2bf40b77b942cb2c6427135d5@epcas2p3.samsung.com>
2022-06-27 0:52 ` [PATCH 0/3] fixes for exynosautov9 clock Chanho Park
2022-06-27 0:52 ` Chanho Park [this message]
2022-06-27 11:33 ` [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1 Krzysztof Kozlowski
2022-06-28 2:15 ` Chanho Park
2022-06-28 10:02 ` Krzysztof Kozlowski
2022-07-04 7:32 ` Chanho Park
2022-06-27 0:52 ` [PATCH 2/3] clk: samsung: exynosautov9: add missing gate clks for peric0/c1 Chanho Park
2022-06-27 11:30 ` Krzysztof Kozlowski
2022-06-28 2:10 ` Chanho Park
2022-06-28 6:58 ` Krzysztof Kozlowski
2022-06-27 0:52 ` [PATCH 3/3] clk: samsung: exynosautov9: correct register offsets of peric0/c1 Chanho Park
2022-06-27 11:31 ` Krzysztof Kozlowski
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