From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
To: Chanho Park <chanho61.park@samsung.com>,
'Sylwester Nawrocki' <s.nawrocki@samsung.com>,
'Tomasz Figa' <tomasz.figa@gmail.com>,
'Chanwoo Choi' <cw00.choi@samsung.com>,
'Stephen Boyd' <sboyd@kernel.org>,
'Michael Turquette' <mturquette@baylibre.com>,
'Rob Herring' <robh+dt@kernel.org>,
'Krzysztof Kozlowski' <krzysztof.kozlowski+dt@linaro.org>
Cc: 'Alim Akhtar' <alim.akhtar@samsung.com>,
linux-samsung-soc@vger.kernel.org, devicetree@vger.kernel.org,
linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org
Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1
Date: Tue, 28 Jun 2022 12:02:08 +0200 [thread overview]
Message-ID: <354b2ae2-92b4-bb56-387a-599f0451a1c0@linaro.org> (raw)
In-Reply-To: <001901d88a94$e87208d0$b9561a70$@samsung.com>
On 28/06/2022 04:15, Chanho Park wrote:
>> Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock
>> numbering of peric0/c1
>>
>> On 27/06/2022 02:52, Chanho Park wrote:
>>> There are duplicated definitions of peric0 and peric1 cmu blocks.
>>> Thus, they should be defined correctly as numerical order.
>>>
>>> Fixes: 680e1c8370a2 ("dt-bindings: clock: add clock binding
>>> definitions for Exynos Auto v9")
>>> Signed-off-by: Chanho Park <chanho61.park@samsung.com>
>>> ---
>>> .../dt-bindings/clock/samsung,exynosautov9.h | 56
>>> +++++++++----------
>>> 1 file changed, 28 insertions(+), 28 deletions(-)
>>>
>>> diff --git a/include/dt-bindings/clock/samsung,exynosautov9.h
>>> b/include/dt-bindings/clock/samsung,exynosautov9.h
>>> index ea9f91b4eb1a..a7db6516593f 100644
>>> --- a/include/dt-bindings/clock/samsung,exynosautov9.h
>>> +++ b/include/dt-bindings/clock/samsung,exynosautov9.h
>>> @@ -226,21 +226,21 @@
>>> #define CLK_GOUT_PERIC0_IPCLK_8 28
>>> #define CLK_GOUT_PERIC0_IPCLK_9 29
>>> #define CLK_GOUT_PERIC0_IPCLK_10 30
>>> -#define CLK_GOUT_PERIC0_IPCLK_11 30
>>> -#define CLK_GOUT_PERIC0_PCLK_0 31
>>> -#define CLK_GOUT_PERIC0_PCLK_1 32
>>> -#define CLK_GOUT_PERIC0_PCLK_2 33
>>> -#define CLK_GOUT_PERIC0_PCLK_3 34
>>> -#define CLK_GOUT_PERIC0_PCLK_4 35
>>> -#define CLK_GOUT_PERIC0_PCLK_5 36
>>> -#define CLK_GOUT_PERIC0_PCLK_6 37
>>> -#define CLK_GOUT_PERIC0_PCLK_7 38
>>> -#define CLK_GOUT_PERIC0_PCLK_8 39
>>> -#define CLK_GOUT_PERIC0_PCLK_9 40
>>> -#define CLK_GOUT_PERIC0_PCLK_10 41
>>> -#define CLK_GOUT_PERIC0_PCLK_11 42
>>> +#define CLK_GOUT_PERIC0_IPCLK_11 31
>>> +#define CLK_GOUT_PERIC0_PCLK_0 32
>>> +#define CLK_GOUT_PERIC0_PCLK_1 33
>>
>> Is this a fix for current cycle? If yes, it's ok, otherwise all other IDs
>> should not be changed, because it's part of ABI.
>
> What is the current cycle? 5.19-rc or 5.20?
> I prefer this goes on 5.19-rc but if it's not possible due to the ABI breakage, I'm okay this can be going to v5.20.
The change was introduced indeed in v5.19-rc1, so this should go to
current cycle as well (v5.19) and your patch is fine.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Sylwester or Stephen,
Please kindly grab it for fixes.
Best regards,
Krzysztof
next prev parent reply other threads:[~2022-06-28 10:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
[not found] <CGME20220627005413epcas2p3b3a22da2bf40b77b942cb2c6427135d5@epcas2p3.samsung.com>
2022-06-27 0:52 ` [PATCH 0/3] fixes for exynosautov9 clock Chanho Park
2022-06-27 0:52 ` [PATCH 1/3] dt-bindings: clock: exynosautov9: correct clock numbering of peric0/c1 Chanho Park
2022-06-27 11:33 ` Krzysztof Kozlowski
2022-06-28 2:15 ` Chanho Park
2022-06-28 10:02 ` Krzysztof Kozlowski [this message]
2022-07-04 7:32 ` Chanho Park
2022-06-27 0:52 ` [PATCH 2/3] clk: samsung: exynosautov9: add missing gate clks for peric0/c1 Chanho Park
2022-06-27 11:30 ` Krzysztof Kozlowski
2022-06-28 2:10 ` Chanho Park
2022-06-28 6:58 ` Krzysztof Kozlowski
2022-06-27 0:52 ` [PATCH 3/3] clk: samsung: exynosautov9: correct register offsets of peric0/c1 Chanho Park
2022-06-27 11:31 ` Krzysztof Kozlowski
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