From: Svyatoslav Ryhel <clamor95@gmail.com>
To: "David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"Rob Herring" <robh@kernel.org>,
"Krzysztof Kozlowski" <krzk+dt@kernel.org>,
"Conor Dooley" <conor+dt@kernel.org>,
"Thierry Reding" <thierry.reding@gmail.com>,
"Jonathan Hunter" <jonathanh@nvidia.com>,
"Sowjanya Komatineni" <skomatineni@nvidia.com>,
"Luca Ceresoli" <luca.ceresoli@bootlin.com>,
"Prashant Gaikwad" <pgaikwad@nvidia.com>,
"Michael Turquette" <mturquette@baylibre.com>,
"Stephen Boyd" <sboyd@kernel.org>,
"Mikko Perttunen" <mperttunen@nvidia.com>,
"Linus Walleij" <linus.walleij@linaro.org>,
"Mauro Carvalho Chehab" <mchehab@kernel.org>,
"Greg Kroah-Hartman" <gregkh@linuxfoundation.org>,
"Svyatoslav Ryhel" <clamor95@gmail.com>,
"Jonas Schwöbel" <jonasschwoebel@yahoo.de>,
"Dmitry Osipenko" <digetx@gmail.com>,
"Charan Pedumuru" <charan.pedumuru@gmail.com>,
"Diogo Ivo" <diogo.ivo@tecnico.ulisboa.pt>,
"Aaron Kling" <webgeek1234@gmail.com>,
"Arnd Bergmann" <arnd@arndb.de>
Cc: dri-devel@lists.freedesktop.org, devicetree@vger.kernel.org,
linux-tegra@vger.kernel.org, linux-kernel@vger.kernel.org,
linux-media@vger.kernel.org, linux-clk@vger.kernel.org,
linux-gpio@vger.kernel.org, linux-staging@lists.linux.dev
Subject: [PATCH v3 00/22] tegra-video: add CSI support for Tegra20 and Tegra30
Date: Thu, 25 Sep 2025 18:16:26 +0300 [thread overview]
Message-ID: <20250925151648.79510-1-clamor95@gmail.com> (raw)
Add support for MIPI CSI device found in Tegra20 and Tegra30 SoC along
with a set of changes required for that.
---
Changes in v2:
- vi_sensor gated through csus
- TEGRA30_CLK_CLK_MAX moved to clk-tegra30
- adjusted commit titles and messages
- clk_register_clkdev dropped from pad clock registration
- removed tegra30-vi/vip and used tegra20 fallback
- added separate csi schema for tegra20-csi and tegra30-csi
- fixet number of VI channels
- adjusted tegra_vi_out naming
- fixed yuv_input_format to main_input_format
- MIPI calibration refsctored for Tegra114+ and added support for
pre-Tegra114 to use CSI as a MIPI calibration device
- switched ENOMEM to EBUSY
- added check into tegra_channel_get_remote_csi_subdev
- moved avdd-dsi-csi-supply into CSI
- next_fs_sp_idx > next_fs_sp_value
- removed host1x_syncpt_incr from framecounted syncpoint
- csi subdev request moved before frame cycle
Changes in v3:
- tegra20 and tegra30 csi schema merged
- removed unneeded properties and requirements from schema
- improved vendor specific properties description
- added tegra20 csus parent mux
- improved commit descriptions
- redesigned MIPI-calibration to expose less SoC related data into header
- commit "staging: media: tegra-video: csi: add support for SoCs with integrated
MIPI calibration" dropped as unneeded
- improved tegra_channel_get_remote_device_subdev logic
- avdd-dsi-csi-supply moved from vi to csi for p2597 and p3450-0000
- software syncpoint counters switched to direct reading
- adjusted planar formats offset calculation
---
Svyatoslav Ryhel (22):
clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and
Tegra114
dt-bindings: clock: tegra30: Add IDs for CSI pad clocks
clk: tegra30: add CSI pad clock gates
dt-bindings: display: tegra: document Tegra30 VI and VIP
staging: media: tegra-video: expand VI and VIP support to Tegra30
staging: media: tegra-video: vi: adjust get_selection op check
staging: media: tegra-video: vi: add flip controls only if no source
controls are provided
staging: media: tegra-video: csi: move CSI helpers to header
gpu: host1x: convert MIPI to use operation function pointers
staging: media: tegra-video: vi: improve logic of source requesting
staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to
CSI
arm64: tegra: move avdd-dsi-csi-supply into CSI node
staging: media: tegra-video: tegra20: set correct maximum width and
height
staging: media: tegra-video: tegra20: add support for second output of
VI
staging: media: tegra-video: tegra20: simplify format align
calculations
staging: media: tegra-video: tegra20: set VI HW revision
staging: media: tegra-video: tegra20: increase maximum VI clock
frequency
staging: media: tegra-video: tegra20: expand format support with
RAW8/10 and YUV422 1X16
staging: media: tegra-video: tegra20: adjust luma buffer stride
dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI
ARM: tegra: add CSI nodes for Tegra20 and Tegra30
staging: media: tegra-video: add CSI support for Tegra20 and Tegra30
.../display/tegra/nvidia,tegra20-csi.yaml | 135 +++
.../display/tegra/nvidia,tegra20-vi.yaml | 19 +-
.../display/tegra/nvidia,tegra20-vip.yaml | 9 +-
arch/arm/boot/dts/nvidia/tegra20.dtsi | 19 +-
arch/arm/boot/dts/nvidia/tegra30.dtsi | 24 +-
.../arm64/boot/dts/nvidia/tegra210-p2597.dtsi | 4 +-
.../boot/dts/nvidia/tegra210-p3450-0000.dts | 4 +-
drivers/clk/tegra/clk-tegra114.c | 7 +-
drivers/clk/tegra/clk-tegra20.c | 20 +-
drivers/clk/tegra/clk-tegra30.c | 21 +-
drivers/gpu/drm/tegra/dsi.c | 1 +
drivers/gpu/host1x/Makefile | 1 +
drivers/gpu/host1x/dev.c | 2 +
drivers/gpu/host1x/dev.h | 2 +
drivers/gpu/host1x/mipi.c | 501 +----------
drivers/gpu/host1x/tegra114-mipi.c | 483 ++++++++++
drivers/pinctrl/tegra/pinctrl-tegra20.c | 7 +
drivers/staging/media/tegra-video/Makefile | 1 +
drivers/staging/media/tegra-video/csi.c | 66 +-
drivers/staging/media/tegra-video/csi.h | 16 +
drivers/staging/media/tegra-video/tegra20.c | 828 +++++++++++++++---
drivers/staging/media/tegra-video/vi.c | 56 +-
drivers/staging/media/tegra-video/vi.h | 9 +-
drivers/staging/media/tegra-video/video.c | 8 +-
drivers/staging/media/tegra-video/vip.c | 4 +-
include/dt-bindings/clock/tegra30-car.h | 3 +-
include/linux/host1x.h | 10 -
include/linux/tegra-mipi-cal.h | 56 ++
28 files changed, 1648 insertions(+), 668 deletions(-)
create mode 100644 Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-csi.yaml
create mode 100644 drivers/gpu/host1x/tegra114-mipi.c
create mode 100644 include/linux/tegra-mipi-cal.h
--
2.48.1
next reply other threads:[~2025-09-25 15:17 UTC|newest]
Thread overview: 50+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-09-25 15:16 Svyatoslav Ryhel [this message]
2025-09-25 15:16 ` [PATCH v3 01/22] clk: tegra: set CSUS as vi_sensor's gate for Tegra20, Tegra30 and Tegra114 Svyatoslav Ryhel
2025-10-01 4:02 ` Mikko Perttunen
2025-09-25 15:16 ` [PATCH v3 02/22] dt-bindings: clock: tegra30: Add IDs for CSI pad clocks Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 03/22] clk: tegra30: add CSI pad clock gates Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 04/22] dt-bindings: display: tegra: document Tegra30 VI and VIP Svyatoslav Ryhel
2025-10-02 1:19 ` Rob Herring (Arm)
2025-09-25 15:16 ` [PATCH v3 05/22] staging: media: tegra-video: expand VI and VIP support to Tegra30 Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 06/22] staging: media: tegra-video: vi: adjust get_selection op check Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 07/22] staging: media: tegra-video: vi: add flip controls only if no source controls are provided Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 08/22] staging: media: tegra-video: csi: move CSI helpers to header Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 09/22] gpu: host1x: convert MIPI to use operation function pointers Svyatoslav Ryhel
2025-10-01 4:18 ` Mikko Perttunen
2025-09-25 15:16 ` [PATCH v3 10/22] staging: media: tegra-video: vi: improve logic of source requesting Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 11/22] staging: media: tegra-video: csi: move avdd-dsi-csi-supply from VI to CSI Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 12/22] arm64: tegra: move avdd-dsi-csi-supply into CSI node Svyatoslav Ryhel
2025-10-01 4:27 ` Mikko Perttunen
2025-09-25 15:16 ` [PATCH v3 13/22] staging: media: tegra-video: tegra20: set correct maximum width and height Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 14/22] staging: media: tegra-video: tegra20: add support for second output of VI Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 15/22] staging: media: tegra-video: tegra20: simplify format align calculations Svyatoslav Ryhel
2025-10-01 4:38 ` Mikko Perttunen
2025-10-01 5:07 ` Svyatoslav Ryhel
2025-10-01 5:35 ` Svyatoslav Ryhel
2025-10-01 7:51 ` Mikko Perttunen
2025-10-01 7:59 ` Svyatoslav Ryhel
2025-10-02 4:00 ` Mikko Perttunen
2025-10-02 5:41 ` Svyatoslav Ryhel
2025-10-02 6:12 ` Mikko Perttunen
2025-10-02 6:20 ` Svyatoslav Ryhel
2025-10-06 18:54 ` Luca Ceresoli
2025-10-07 16:02 ` Svyatoslav Ryhel
2025-10-07 19:37 ` Luca Ceresoli
2025-10-08 5:44 ` Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 16/22] staging: media: tegra-video: tegra20: set VI HW revision Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 17/22] staging: media: tegra-video: tegra20: increase maximum VI clock frequency Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 18/22] staging: media: tegra-video: tegra20: expand format support with RAW8/10 and YUV422 1X16 Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 19/22] staging: media: tegra-video: tegra20: adjust luma buffer stride Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 20/22] dt-bindings: display: tegra: document Tegra20 and Tegra30 CSI Svyatoslav Ryhel
2025-10-02 1:52 ` Rob Herring
2025-10-02 5:14 ` Svyatoslav Ryhel
2025-10-06 20:31 ` Rob Herring
2025-10-07 5:13 ` Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 21/22] ARM: tegra: add CSI nodes for Tegra20 and Tegra30 Svyatoslav Ryhel
2025-09-25 15:16 ` [PATCH v3 22/22] staging: media: tegra-video: add CSI support " Svyatoslav Ryhel
2025-10-01 5:04 ` Mikko Perttunen
2025-10-01 5:15 ` Svyatoslav Ryhel
2025-10-01 6:38 ` Mikko Perttunen
2025-10-01 15:23 ` Svyatoslav Ryhel
2025-10-02 4:03 ` Mikko Perttunen
2025-10-02 17:49 ` Svyatoslav Ryhel
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