From: Conor Dooley <conor@kernel.org>
To: claudiu.beznea@tuxon.dev
Cc: conor@kernel.org, Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
pierre-henry.moussay@microchip.com,
valentina.fernandezalanis@microchip.com,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: [PATCH v6 7/7] MAINTAINERS: rename Microchip RISC-V entry
Date: Wed, 29 Oct 2025 16:11:23 +0000 [thread overview]
Message-ID: <20251029-timing-venue-1cd20c3450ac@spud> (raw)
In-Reply-To: <20251029-chewing-absolve-c4e6acfe0fa4@spud>
From: Conor Dooley <conor.dooley@microchip.com>
There's now non-FPGA RISC-V SoCs from Microchip, so rename the entry
to reflect that.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index a28740a7d87a..24efae3df425 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -22079,7 +22079,7 @@ T: git git://git.kernel.org/pub/scm/linux/kernel/git/iommu/linux.git
F: Documentation/devicetree/bindings/iommu/riscv,iommu.yaml
F: drivers/iommu/riscv/
-RISC-V MICROCHIP FPGA SUPPORT
+RISC-V MICROCHIP SUPPORT
M: Conor Dooley <conor.dooley@microchip.com>
M: Daire McNamara <daire.mcnamara@microchip.com>
L: linux-riscv@lists.infradead.org
--
2.51.0
next prev parent reply other threads:[~2025-10-29 16:11 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-29 16:11 [PATCH v6 0/7] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
2025-10-29 16:11 ` [PATCH v6 1/7] reset: mpfs: add non-auxiliary bus probing Conor Dooley
2025-10-30 13:40 ` Philipp Zabel
2025-10-31 11:55 ` Conor Dooley
2025-10-31 7:20 ` claudiu beznea
2025-10-31 10:58 ` Conor Dooley
2025-10-29 16:11 ` [PATCH v6 2/7] dt-bindings: clk: microchip: mpfs: remove first reg region Conor Dooley
2025-10-29 16:11 ` [PATCH v6 3/7] clk: microchip: mpfs: use regmap for clocks Conor Dooley
2025-10-31 7:14 ` claudiu beznea
2025-10-29 16:11 ` [PATCH v6 4/7] riscv: dts: microchip: fix mailbox description Conor Dooley
2025-10-29 16:11 ` [PATCH v6 5/7] riscv: dts: microchip: convert clock and reset to use syscon Conor Dooley
2025-10-29 16:11 ` [PATCH v6 6/7] MAINTAINERS: add new soc drivers to Microchip RISC-V entry Conor Dooley
2025-10-29 16:11 ` Conor Dooley [this message]
2025-11-04 8:32 ` [PATCH v6 0/7] Redo PolarFire SoC's mailbox/clock devicestrees and related code Claudiu Beznea
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