From: claudiu beznea <claudiu.beznea@tuxon.dev>
To: Conor Dooley <conor@kernel.org>
Cc: Conor Dooley <conor.dooley@microchip.com>,
Daire McNamara <daire.mcnamara@microchip.com>,
pierre-henry.moussay@microchip.com,
valentina.fernandezalanis@microchip.com,
Michael Turquette <mturquette@baylibre.com>,
Stephen Boyd <sboyd@kernel.org>, Rob Herring <robh@kernel.org>,
Krzysztof Kozlowski <krzk+dt@kernel.org>,
Philipp Zabel <p.zabel@pengutronix.de>,
linux-riscv@lists.infradead.org, linux-clk@vger.kernel.org,
devicetree@vger.kernel.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v6 3/7] clk: microchip: mpfs: use regmap for clocks
Date: Fri, 31 Oct 2025 09:14:13 +0200 [thread overview]
Message-ID: <62133fe3-cce8-4405-82b9-8ded092c7eea@tuxon.dev> (raw)
In-Reply-To: <20251029-surfboard-refocus-ca9b135ab123@spud>
On 10/29/25 18:11, Conor Dooley wrote:
> From: Conor Dooley<conor.dooley@microchip.com>
>
> Convert the PolarFire SoC clock driver to use regmaps instead of iomem
> addresses as a preparatory work for supporting the new binding for this
> device that will only provide the second of the two register regions, and
> will require the use of syscon regmap to access the "cfg" and "periph"
> clocks currently supported by the driver.
>
> This is effectively a revert of commit 4da2404bb003 ("clk: microchip:
> mpfs: convert cfg_clk to clk_divider") and commit d815569783e6 ("clk:
> microchip: mpfs: convert periph_clk to clk_gate") as it resurrects the
> ops structures removed in those commits, with the readl()s and
> writel()s replaced by regmap_read()s and regmap_writes()s.
>
> Signed-off-by: Conor Dooley<conor.dooley@microchip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
next prev parent reply other threads:[~2025-10-31 7:14 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-29 16:11 [PATCH v6 0/7] Redo PolarFire SoC's mailbox/clock devicestrees and related code Conor Dooley
2025-10-29 16:11 ` [PATCH v6 1/7] reset: mpfs: add non-auxiliary bus probing Conor Dooley
2025-10-30 13:40 ` Philipp Zabel
2025-10-31 11:55 ` Conor Dooley
2025-10-31 7:20 ` claudiu beznea
2025-10-31 10:58 ` Conor Dooley
2025-10-29 16:11 ` [PATCH v6 2/7] dt-bindings: clk: microchip: mpfs: remove first reg region Conor Dooley
2025-10-29 16:11 ` [PATCH v6 3/7] clk: microchip: mpfs: use regmap for clocks Conor Dooley
2025-10-31 7:14 ` claudiu beznea [this message]
2025-10-29 16:11 ` [PATCH v6 4/7] riscv: dts: microchip: fix mailbox description Conor Dooley
2025-10-29 16:11 ` [PATCH v6 5/7] riscv: dts: microchip: convert clock and reset to use syscon Conor Dooley
2025-10-29 16:11 ` [PATCH v6 6/7] MAINTAINERS: add new soc drivers to Microchip RISC-V entry Conor Dooley
2025-10-29 16:11 ` [PATCH v6 7/7] MAINTAINERS: rename " Conor Dooley
2025-11-04 8:32 ` [PATCH v6 0/7] Redo PolarFire SoC's mailbox/clock devicestrees and related code Claudiu Beznea
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